usb_ohci.c 43 KB

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  1. /*
  2. * URB OHCI HCD (Host Controller Driver) for USB on the S3C2400.
  3. *
  4. * (C) Copyright 2003
  5. * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. *
  25. * Note: Part of this code has been derived from linux
  26. *
  27. */
  28. /*
  29. * IMPORTANT NOTES
  30. * 1 - you MUST define LITTLEENDIAN in the configuration file for the
  31. * board or this driver will NOT work!
  32. * 2 - this driver is intended for use with USB Mass Storage Devices
  33. * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
  34. */
  35. #include <common.h>
  36. /* #include <pci.h> no PCI on the S3C24X0 */
  37. #ifdef CONFIG_USB_OHCI
  38. #if defined(CONFIG_S3C2400)
  39. #include <s3c2400.h>
  40. #elif defined(CONFIG_S3C2410)
  41. #include <s3c2410.h>
  42. #endif
  43. #include <malloc.h>
  44. #include <usb.h>
  45. #include "usb_ohci.h"
  46. #define OHCI_USE_NPS /* force NoPowerSwitching mode */
  47. #undef OHCI_VERBOSE_DEBUG /* not always helpful */
  48. /* For initializing controller (mask in an HCFS mode too) */
  49. #define OHCI_CONTROL_INIT \
  50. (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
  51. #define readl(a) (*((vu_long *)(a)))
  52. #define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
  53. #define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
  54. #undef DEBUG
  55. #ifdef DEBUG
  56. #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
  57. #else
  58. #define dbg(format, arg...) do {} while(0)
  59. #endif /* DEBUG */
  60. #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
  61. #undef SHOW_INFO
  62. #ifdef SHOW_INFO
  63. #define info(format, arg...) printf("INFO: " format "\n", ## arg)
  64. #else
  65. #define info(format, arg...) do {} while(0)
  66. #endif
  67. #define m16_swap(x) swap_16(x)
  68. #define m32_swap(x) swap_32(x)
  69. /* global ohci_t */
  70. static ohci_t gohci;
  71. /* this must be aligned to a 256 byte boundary */
  72. struct ohci_hcca ghcca[1];
  73. /* a pointer to the aligned storage */
  74. struct ohci_hcca *phcca;
  75. /* this allocates EDs for all possible endpoints */
  76. struct ohci_device ohci_dev;
  77. /* urb_priv */
  78. urb_priv_t urb_priv;
  79. /* RHSC flag */
  80. int got_rhsc;
  81. /* device which was disconnected */
  82. struct usb_device *devgone;
  83. /*-------------------------------------------------------------------------*/
  84. /* AMD-756 (D2 rev) reports corrupt register contents in some cases.
  85. * The erratum (#4) description is incorrect. AMD's workaround waits
  86. * till some bits (mostly reserved) are clear; ok for all revs.
  87. */
  88. #define OHCI_QUIRK_AMD756 0xabcd
  89. #define read_roothub(hc, register, mask) ({ \
  90. u32 temp = readl (&hc->regs->roothub.register); \
  91. if (hc->flags & OHCI_QUIRK_AMD756) \
  92. while (temp & mask) \
  93. temp = readl (&hc->regs->roothub.register); \
  94. temp; })
  95. static u32 roothub_a (struct ohci *hc)
  96. { return read_roothub (hc, a, 0xfc0fe000); }
  97. static inline u32 roothub_b (struct ohci *hc)
  98. { return readl (&hc->regs->roothub.b); }
  99. static inline u32 roothub_status (struct ohci *hc)
  100. { return readl (&hc->regs->roothub.status); }
  101. static u32 roothub_portstatus (struct ohci *hc, int i)
  102. { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
  103. /* forward declaration */
  104. static int hc_interrupt (void);
  105. static void
  106. td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
  107. int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
  108. /*-------------------------------------------------------------------------*
  109. * URB support functions
  110. *-------------------------------------------------------------------------*/
  111. /* free HCD-private data associated with this URB */
  112. static void urb_free_priv (urb_priv_t * urb)
  113. {
  114. int i;
  115. int last;
  116. struct td * td;
  117. last = urb->length - 1;
  118. if (last >= 0) {
  119. for (i = 0; i <= last; i++) {
  120. td = urb->td[i];
  121. if (td) {
  122. td->usb_dev = NULL;
  123. urb->td[i] = NULL;
  124. }
  125. }
  126. }
  127. }
  128. /*-------------------------------------------------------------------------*/
  129. #ifdef DEBUG
  130. static int sohci_get_current_frame_number (struct usb_device * dev);
  131. /* debug| print the main components of an URB
  132. * small: 0) header + data packets 1) just header */
  133. static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
  134. int transfer_len, struct devrequest * setup, char * str, int small)
  135. {
  136. urb_priv_t * purb = &urb_priv;
  137. dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
  138. str,
  139. sohci_get_current_frame_number (dev),
  140. usb_pipedevice (pipe),
  141. usb_pipeendpoint (pipe),
  142. usb_pipeout (pipe)? 'O': 'I',
  143. usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
  144. (usb_pipecontrol (pipe)? "CTRL": "BULK"),
  145. purb->actual_length,
  146. transfer_len, dev->status);
  147. #ifdef OHCI_VERBOSE_DEBUG
  148. if (!small) {
  149. int i, len;
  150. if (usb_pipecontrol (pipe)) {
  151. printf (__FILE__ ": cmd(8):");
  152. for (i = 0; i < 8 ; i++)
  153. printf (" %02x", ((__u8 *) setup) [i]);
  154. printf ("\n");
  155. }
  156. if (transfer_len > 0 && buffer) {
  157. printf (__FILE__ ": data(%d/%d):",
  158. purb->actual_length,
  159. transfer_len);
  160. len = usb_pipeout (pipe)?
  161. transfer_len: purb->actual_length;
  162. for (i = 0; i < 16 && i < len; i++)
  163. printf (" %02x", ((__u8 *) buffer) [i]);
  164. printf ("%s\n", i < len? "...": "");
  165. }
  166. }
  167. #endif
  168. }
  169. /* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
  170. void ep_print_int_eds (ohci_t *ohci, char * str) {
  171. int i, j;
  172. __u32 * ed_p;
  173. for (i= 0; i < 32; i++) {
  174. j = 5;
  175. ed_p = &(ohci->hcca->int_table [i]);
  176. if (*ed_p == 0)
  177. continue;
  178. printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
  179. while (*ed_p != 0 && j--) {
  180. ed_t *ed = (ed_t *)m32_swap(ed_p);
  181. printf (" ed: %4x;", ed->hwINFO);
  182. ed_p = &ed->hwNextED;
  183. }
  184. printf ("\n");
  185. }
  186. }
  187. static void ohci_dump_intr_mask (char *label, __u32 mask)
  188. {
  189. dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
  190. label,
  191. mask,
  192. (mask & OHCI_INTR_MIE) ? " MIE" : "",
  193. (mask & OHCI_INTR_OC) ? " OC" : "",
  194. (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
  195. (mask & OHCI_INTR_FNO) ? " FNO" : "",
  196. (mask & OHCI_INTR_UE) ? " UE" : "",
  197. (mask & OHCI_INTR_RD) ? " RD" : "",
  198. (mask & OHCI_INTR_SF) ? " SF" : "",
  199. (mask & OHCI_INTR_WDH) ? " WDH" : "",
  200. (mask & OHCI_INTR_SO) ? " SO" : ""
  201. );
  202. }
  203. static void maybe_print_eds (char *label, __u32 value)
  204. {
  205. ed_t *edp = (ed_t *)value;
  206. if (value) {
  207. dbg ("%s %08x", label, value);
  208. dbg ("%08x", edp->hwINFO);
  209. dbg ("%08x", edp->hwTailP);
  210. dbg ("%08x", edp->hwHeadP);
  211. dbg ("%08x", edp->hwNextED);
  212. }
  213. }
  214. static char * hcfs2string (int state)
  215. {
  216. switch (state) {
  217. case OHCI_USB_RESET: return "reset";
  218. case OHCI_USB_RESUME: return "resume";
  219. case OHCI_USB_OPER: return "operational";
  220. case OHCI_USB_SUSPEND: return "suspend";
  221. }
  222. return "?";
  223. }
  224. /* dump control and status registers */
  225. static void ohci_dump_status (ohci_t *controller)
  226. {
  227. struct ohci_regs *regs = controller->regs;
  228. __u32 temp;
  229. temp = readl (&regs->revision) & 0xff;
  230. if (temp != 0x10)
  231. dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
  232. temp = readl (&regs->control);
  233. dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
  234. (temp & OHCI_CTRL_RWE) ? " RWE" : "",
  235. (temp & OHCI_CTRL_RWC) ? " RWC" : "",
  236. (temp & OHCI_CTRL_IR) ? " IR" : "",
  237. hcfs2string (temp & OHCI_CTRL_HCFS),
  238. (temp & OHCI_CTRL_BLE) ? " BLE" : "",
  239. (temp & OHCI_CTRL_CLE) ? " CLE" : "",
  240. (temp & OHCI_CTRL_IE) ? " IE" : "",
  241. (temp & OHCI_CTRL_PLE) ? " PLE" : "",
  242. temp & OHCI_CTRL_CBSR
  243. );
  244. temp = readl (&regs->cmdstatus);
  245. dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
  246. (temp & OHCI_SOC) >> 16,
  247. (temp & OHCI_OCR) ? " OCR" : "",
  248. (temp & OHCI_BLF) ? " BLF" : "",
  249. (temp & OHCI_CLF) ? " CLF" : "",
  250. (temp & OHCI_HCR) ? " HCR" : ""
  251. );
  252. ohci_dump_intr_mask ("intrstatus", readl (&regs->intrstatus));
  253. ohci_dump_intr_mask ("intrenable", readl (&regs->intrenable));
  254. maybe_print_eds ("ed_periodcurrent", readl (&regs->ed_periodcurrent));
  255. maybe_print_eds ("ed_controlhead", readl (&regs->ed_controlhead));
  256. maybe_print_eds ("ed_controlcurrent", readl (&regs->ed_controlcurrent));
  257. maybe_print_eds ("ed_bulkhead", readl (&regs->ed_bulkhead));
  258. maybe_print_eds ("ed_bulkcurrent", readl (&regs->ed_bulkcurrent));
  259. maybe_print_eds ("donehead", readl (&regs->donehead));
  260. }
  261. static void ohci_dump_roothub (ohci_t *controller, int verbose)
  262. {
  263. __u32 temp, ndp, i;
  264. temp = roothub_a (controller);
  265. ndp = (temp & RH_A_NDP);
  266. if (verbose) {
  267. dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
  268. ((temp & RH_A_POTPGT) >> 24) & 0xff,
  269. (temp & RH_A_NOCP) ? " NOCP" : "",
  270. (temp & RH_A_OCPM) ? " OCPM" : "",
  271. (temp & RH_A_DT) ? " DT" : "",
  272. (temp & RH_A_NPS) ? " NPS" : "",
  273. (temp & RH_A_PSM) ? " PSM" : "",
  274. ndp
  275. );
  276. temp = roothub_b (controller);
  277. dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
  278. temp,
  279. (temp & RH_B_PPCM) >> 16,
  280. (temp & RH_B_DR)
  281. );
  282. temp = roothub_status (controller);
  283. dbg ("roothub.status: %08x%s%s%s%s%s%s",
  284. temp,
  285. (temp & RH_HS_CRWE) ? " CRWE" : "",
  286. (temp & RH_HS_OCIC) ? " OCIC" : "",
  287. (temp & RH_HS_LPSC) ? " LPSC" : "",
  288. (temp & RH_HS_DRWE) ? " DRWE" : "",
  289. (temp & RH_HS_OCI) ? " OCI" : "",
  290. (temp & RH_HS_LPS) ? " LPS" : ""
  291. );
  292. }
  293. for (i = 0; i < ndp; i++) {
  294. temp = roothub_portstatus (controller, i);
  295. dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
  296. i,
  297. temp,
  298. (temp & RH_PS_PRSC) ? " PRSC" : "",
  299. (temp & RH_PS_OCIC) ? " OCIC" : "",
  300. (temp & RH_PS_PSSC) ? " PSSC" : "",
  301. (temp & RH_PS_PESC) ? " PESC" : "",
  302. (temp & RH_PS_CSC) ? " CSC" : "",
  303. (temp & RH_PS_LSDA) ? " LSDA" : "",
  304. (temp & RH_PS_PPS) ? " PPS" : "",
  305. (temp & RH_PS_PRS) ? " PRS" : "",
  306. (temp & RH_PS_POCI) ? " POCI" : "",
  307. (temp & RH_PS_PSS) ? " PSS" : "",
  308. (temp & RH_PS_PES) ? " PES" : "",
  309. (temp & RH_PS_CCS) ? " CCS" : ""
  310. );
  311. }
  312. }
  313. static void ohci_dump (ohci_t *controller, int verbose)
  314. {
  315. dbg ("OHCI controller usb-%s state", controller->slot_name);
  316. /* dumps some of the state we know about */
  317. ohci_dump_status (controller);
  318. if (verbose)
  319. ep_print_int_eds (controller, "hcca");
  320. dbg ("hcca frame #%04x", controller->hcca->frame_no);
  321. ohci_dump_roothub (controller, 1);
  322. }
  323. #endif /* DEBUG */
  324. /*-------------------------------------------------------------------------*
  325. * Interface functions (URB)
  326. *-------------------------------------------------------------------------*/
  327. /* get a transfer request */
  328. int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
  329. int transfer_len, struct devrequest *setup, int interval)
  330. {
  331. ohci_t *ohci;
  332. ed_t * ed;
  333. urb_priv_t *purb_priv;
  334. int i, size = 0;
  335. ohci = &gohci;
  336. /* when controller's hung, permit only roothub cleanup attempts
  337. * such as powering down ports */
  338. if (ohci->disabled) {
  339. err("sohci_submit_job: EPIPE");
  340. return -1;
  341. }
  342. /* every endpoint has a ed, locate and fill it */
  343. if (!(ed = ep_add_ed (dev, pipe))) {
  344. err("sohci_submit_job: ENOMEM");
  345. return -1;
  346. }
  347. /* for the private part of the URB we need the number of TDs (size) */
  348. switch (usb_pipetype (pipe)) {
  349. case PIPE_BULK: /* one TD for every 4096 Byte */
  350. size = (transfer_len - 1) / 4096 + 1;
  351. break;
  352. case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
  353. size = (transfer_len == 0)? 2:
  354. (transfer_len - 1) / 4096 + 3;
  355. break;
  356. }
  357. if (size >= (N_URB_TD - 1)) {
  358. err("need %d TDs, only have %d", size, N_URB_TD);
  359. return -1;
  360. }
  361. purb_priv = &urb_priv;
  362. purb_priv->pipe = pipe;
  363. /* fill the private part of the URB */
  364. purb_priv->length = size;
  365. purb_priv->ed = ed;
  366. purb_priv->actual_length = 0;
  367. /* allocate the TDs */
  368. /* note that td[0] was allocated in ep_add_ed */
  369. for (i = 0; i < size; i++) {
  370. purb_priv->td[i] = td_alloc (dev);
  371. if (!purb_priv->td[i]) {
  372. purb_priv->length = i;
  373. urb_free_priv (purb_priv);
  374. err("sohci_submit_job: ENOMEM");
  375. return -1;
  376. }
  377. }
  378. if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
  379. urb_free_priv (purb_priv);
  380. err("sohci_submit_job: EINVAL");
  381. return -1;
  382. }
  383. /* link the ed into a chain if is not already */
  384. if (ed->state != ED_OPER)
  385. ep_link (ohci, ed);
  386. /* fill the TDs and link it to the ed */
  387. td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
  388. return 0;
  389. }
  390. /*-------------------------------------------------------------------------*/
  391. #ifdef DEBUG
  392. /* tell us the current USB frame number */
  393. static int sohci_get_current_frame_number (struct usb_device *usb_dev)
  394. {
  395. ohci_t *ohci = &gohci;
  396. return m16_swap (ohci->hcca->frame_no);
  397. }
  398. #endif
  399. /*-------------------------------------------------------------------------*
  400. * ED handling functions
  401. *-------------------------------------------------------------------------*/
  402. /* link an ed into one of the HC chains */
  403. static int ep_link (ohci_t *ohci, ed_t *edi)
  404. {
  405. volatile ed_t *ed = edi;
  406. ed->state = ED_OPER;
  407. switch (ed->type) {
  408. case PIPE_CONTROL:
  409. ed->hwNextED = 0;
  410. if (ohci->ed_controltail == NULL) {
  411. writel (ed, &ohci->regs->ed_controlhead);
  412. } else {
  413. ohci->ed_controltail->hwNextED = m32_swap (ed);
  414. }
  415. ed->ed_prev = ohci->ed_controltail;
  416. if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
  417. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  418. ohci->hc_control |= OHCI_CTRL_CLE;
  419. writel (ohci->hc_control, &ohci->regs->control);
  420. }
  421. ohci->ed_controltail = edi;
  422. break;
  423. case PIPE_BULK:
  424. ed->hwNextED = 0;
  425. if (ohci->ed_bulktail == NULL) {
  426. writel (ed, &ohci->regs->ed_bulkhead);
  427. } else {
  428. ohci->ed_bulktail->hwNextED = m32_swap (ed);
  429. }
  430. ed->ed_prev = ohci->ed_bulktail;
  431. if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
  432. !ohci->ed_rm_list[1] && !ohci->sleeping) {
  433. ohci->hc_control |= OHCI_CTRL_BLE;
  434. writel (ohci->hc_control, &ohci->regs->control);
  435. }
  436. ohci->ed_bulktail = edi;
  437. break;
  438. }
  439. return 0;
  440. }
  441. /*-------------------------------------------------------------------------*/
  442. /* unlink an ed from one of the HC chains.
  443. * just the link to the ed is unlinked.
  444. * the link from the ed still points to another operational ed or 0
  445. * so the HC can eventually finish the processing of the unlinked ed */
  446. static int ep_unlink (ohci_t *ohci, ed_t *ed)
  447. {
  448. ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
  449. switch (ed->type) {
  450. case PIPE_CONTROL:
  451. if (ed->ed_prev == NULL) {
  452. if (!ed->hwNextED) {
  453. ohci->hc_control &= ~OHCI_CTRL_CLE;
  454. writel (ohci->hc_control, &ohci->regs->control);
  455. }
  456. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
  457. } else {
  458. ed->ed_prev->hwNextED = ed->hwNextED;
  459. }
  460. if (ohci->ed_controltail == ed) {
  461. ohci->ed_controltail = ed->ed_prev;
  462. } else {
  463. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  464. }
  465. break;
  466. case PIPE_BULK:
  467. if (ed->ed_prev == NULL) {
  468. if (!ed->hwNextED) {
  469. ohci->hc_control &= ~OHCI_CTRL_BLE;
  470. writel (ohci->hc_control, &ohci->regs->control);
  471. }
  472. writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
  473. } else {
  474. ed->ed_prev->hwNextED = ed->hwNextED;
  475. }
  476. if (ohci->ed_bulktail == ed) {
  477. ohci->ed_bulktail = ed->ed_prev;
  478. } else {
  479. ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
  480. }
  481. break;
  482. }
  483. ed->state = ED_UNLINK;
  484. return 0;
  485. }
  486. /*-------------------------------------------------------------------------*/
  487. /* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
  488. * but the USB stack is a little bit stateless so we do it at every transaction
  489. * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
  490. * in all other cases the state is left unchanged
  491. * the ed info fields are setted anyway even though most of them should not change */
  492. static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
  493. {
  494. td_t *td;
  495. ed_t *ed_ret;
  496. volatile ed_t *ed;
  497. ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
  498. (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
  499. if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
  500. err("ep_add_ed: pending delete");
  501. /* pending delete request */
  502. return NULL;
  503. }
  504. if (ed->state == ED_NEW) {
  505. ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
  506. /* dummy td; end of td list for ed */
  507. td = td_alloc (usb_dev);
  508. ed->hwTailP = m32_swap (td);
  509. ed->hwHeadP = ed->hwTailP;
  510. ed->state = ED_UNLINK;
  511. ed->type = usb_pipetype (pipe);
  512. ohci_dev.ed_cnt++;
  513. }
  514. ed->hwINFO = m32_swap (usb_pipedevice (pipe)
  515. | usb_pipeendpoint (pipe) << 7
  516. | (usb_pipeisoc (pipe)? 0x8000: 0)
  517. | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
  518. | usb_pipeslow (pipe) << 13
  519. | usb_maxpacket (usb_dev, pipe) << 16);
  520. return ed_ret;
  521. }
  522. /*-------------------------------------------------------------------------*
  523. * TD handling functions
  524. *-------------------------------------------------------------------------*/
  525. /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
  526. static void td_fill (ohci_t *ohci, unsigned int info,
  527. void *data, int len,
  528. struct usb_device *dev, int index, urb_priv_t *urb_priv)
  529. {
  530. volatile td_t *td, *td_pt;
  531. #ifdef OHCI_FILL_TRACE
  532. int i;
  533. #endif
  534. if (index > urb_priv->length) {
  535. err("index > length");
  536. return;
  537. }
  538. /* use this td as the next dummy */
  539. td_pt = urb_priv->td [index];
  540. td_pt->hwNextTD = 0;
  541. /* fill the old dummy TD */
  542. td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
  543. td->ed = urb_priv->ed;
  544. td->next_dl_td = NULL;
  545. td->index = index;
  546. td->data = (__u32)data;
  547. #ifdef OHCI_FILL_TRACE
  548. if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
  549. for (i = 0; i < len; i++)
  550. printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
  551. printf("\n");
  552. }
  553. #endif
  554. if (!len)
  555. data = 0;
  556. td->hwINFO = m32_swap (info);
  557. td->hwCBP = m32_swap (data);
  558. if (data)
  559. td->hwBE = m32_swap (data + len - 1);
  560. else
  561. td->hwBE = 0;
  562. td->hwNextTD = m32_swap (td_pt);
  563. td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
  564. /* append to queue */
  565. td->ed->hwTailP = td->hwNextTD;
  566. }
  567. /*-------------------------------------------------------------------------*/
  568. /* prepare all TDs of a transfer */
  569. static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
  570. int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
  571. {
  572. ohci_t *ohci = &gohci;
  573. int data_len = transfer_len;
  574. void *data;
  575. int cnt = 0;
  576. __u32 info = 0;
  577. unsigned int toggle = 0;
  578. /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
  579. if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
  580. toggle = TD_T_TOGGLE;
  581. } else {
  582. toggle = TD_T_DATA0;
  583. usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
  584. }
  585. urb->td_cnt = 0;
  586. if (data_len)
  587. data = buffer;
  588. else
  589. data = 0;
  590. switch (usb_pipetype (pipe)) {
  591. case PIPE_BULK:
  592. info = usb_pipeout (pipe)?
  593. TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
  594. while(data_len > 4096) {
  595. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
  596. data += 4096; data_len -= 4096; cnt++;
  597. }
  598. info = usb_pipeout (pipe)?
  599. TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
  600. td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
  601. cnt++;
  602. if (!ohci->sleeping)
  603. writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
  604. break;
  605. case PIPE_CONTROL:
  606. info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
  607. td_fill (ohci, info, setup, 8, dev, cnt++, urb);
  608. if (data_len > 0) {
  609. info = usb_pipeout (pipe)?
  610. TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
  611. /* NOTE: mishandles transfers >8K, some >4K */
  612. td_fill (ohci, info, data, data_len, dev, cnt++, urb);
  613. }
  614. info = usb_pipeout (pipe)?
  615. TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
  616. td_fill (ohci, info, data, 0, dev, cnt++, urb);
  617. if (!ohci->sleeping)
  618. writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
  619. break;
  620. }
  621. if (urb->length != cnt)
  622. dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
  623. }
  624. /*-------------------------------------------------------------------------*
  625. * Done List handling functions
  626. *-------------------------------------------------------------------------*/
  627. /* calculate the transfer length and update the urb */
  628. static void dl_transfer_length(td_t * td)
  629. {
  630. __u32 tdINFO, tdBE, tdCBP;
  631. urb_priv_t *lurb_priv = &urb_priv;
  632. tdINFO = m32_swap (td->hwINFO);
  633. tdBE = m32_swap (td->hwBE);
  634. tdCBP = m32_swap (td->hwCBP);
  635. if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
  636. ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
  637. if (tdBE != 0) {
  638. if (td->hwCBP == 0)
  639. lurb_priv->actual_length += tdBE - td->data + 1;
  640. else
  641. lurb_priv->actual_length += tdCBP - td->data;
  642. }
  643. }
  644. }
  645. /*-------------------------------------------------------------------------*/
  646. /* replies to the request have to be on a FIFO basis so
  647. * we reverse the reversed done-list */
  648. static td_t * dl_reverse_done_list (ohci_t *ohci)
  649. {
  650. __u32 td_list_hc;
  651. td_t *td_rev = NULL;
  652. td_t *td_list = NULL;
  653. urb_priv_t *lurb_priv = NULL;
  654. td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
  655. ohci->hcca->done_head = 0;
  656. while (td_list_hc) {
  657. td_list = (td_t *)td_list_hc;
  658. if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
  659. lurb_priv = &urb_priv;
  660. dbg(" USB-error/status: %x : %p",
  661. TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
  662. if (td_list->ed->hwHeadP & m32_swap (0x1)) {
  663. if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
  664. td_list->ed->hwHeadP =
  665. (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
  666. (td_list->ed->hwHeadP & m32_swap (0x2));
  667. lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
  668. } else
  669. td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
  670. }
  671. }
  672. td_list->next_dl_td = td_rev;
  673. td_rev = td_list;
  674. td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
  675. }
  676. return td_list;
  677. }
  678. /*-------------------------------------------------------------------------*/
  679. /* td done list */
  680. static int dl_done_list (ohci_t *ohci, td_t *td_list)
  681. {
  682. td_t *td_list_next = NULL;
  683. ed_t *ed;
  684. int cc = 0;
  685. int stat = 0;
  686. /* urb_t *urb; */
  687. urb_priv_t *lurb_priv;
  688. __u32 tdINFO, edHeadP, edTailP;
  689. while (td_list) {
  690. td_list_next = td_list->next_dl_td;
  691. lurb_priv = &urb_priv;
  692. tdINFO = m32_swap (td_list->hwINFO);
  693. ed = td_list->ed;
  694. dl_transfer_length(td_list);
  695. /* error code of transfer */
  696. cc = TD_CC_GET (tdINFO);
  697. if (cc != 0) {
  698. dbg("ConditionCode %#x", cc);
  699. stat = cc_to_error[cc];
  700. }
  701. if (ed->state != ED_NEW) {
  702. edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
  703. edTailP = m32_swap (ed->hwTailP);
  704. /* unlink eds if they are not busy */
  705. if ((edHeadP == edTailP) && (ed->state == ED_OPER))
  706. ep_unlink (ohci, ed);
  707. }
  708. td_list = td_list_next;
  709. }
  710. return stat;
  711. }
  712. /*-------------------------------------------------------------------------*
  713. * Virtual Root Hub
  714. *-------------------------------------------------------------------------*/
  715. /* Device descriptor */
  716. static __u8 root_hub_dev_des[] =
  717. {
  718. 0x12, /* __u8 bLength; */
  719. 0x01, /* __u8 bDescriptorType; Device */
  720. 0x10, /* __u16 bcdUSB; v1.1 */
  721. 0x01,
  722. 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
  723. 0x00, /* __u8 bDeviceSubClass; */
  724. 0x00, /* __u8 bDeviceProtocol; */
  725. 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
  726. 0x00, /* __u16 idVendor; */
  727. 0x00,
  728. 0x00, /* __u16 idProduct; */
  729. 0x00,
  730. 0x00, /* __u16 bcdDevice; */
  731. 0x00,
  732. 0x00, /* __u8 iManufacturer; */
  733. 0x01, /* __u8 iProduct; */
  734. 0x00, /* __u8 iSerialNumber; */
  735. 0x01 /* __u8 bNumConfigurations; */
  736. };
  737. /* Configuration descriptor */
  738. static __u8 root_hub_config_des[] =
  739. {
  740. 0x09, /* __u8 bLength; */
  741. 0x02, /* __u8 bDescriptorType; Configuration */
  742. 0x19, /* __u16 wTotalLength; */
  743. 0x00,
  744. 0x01, /* __u8 bNumInterfaces; */
  745. 0x01, /* __u8 bConfigurationValue; */
  746. 0x00, /* __u8 iConfiguration; */
  747. 0x40, /* __u8 bmAttributes;
  748. Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
  749. 0x00, /* __u8 MaxPower; */
  750. /* interface */
  751. 0x09, /* __u8 if_bLength; */
  752. 0x04, /* __u8 if_bDescriptorType; Interface */
  753. 0x00, /* __u8 if_bInterfaceNumber; */
  754. 0x00, /* __u8 if_bAlternateSetting; */
  755. 0x01, /* __u8 if_bNumEndpoints; */
  756. 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
  757. 0x00, /* __u8 if_bInterfaceSubClass; */
  758. 0x00, /* __u8 if_bInterfaceProtocol; */
  759. 0x00, /* __u8 if_iInterface; */
  760. /* endpoint */
  761. 0x07, /* __u8 ep_bLength; */
  762. 0x05, /* __u8 ep_bDescriptorType; Endpoint */
  763. 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
  764. 0x03, /* __u8 ep_bmAttributes; Interrupt */
  765. 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
  766. 0x00,
  767. 0xff /* __u8 ep_bInterval; 255 ms */
  768. };
  769. static unsigned char root_hub_str_index0[] =
  770. {
  771. 0x04, /* __u8 bLength; */
  772. 0x03, /* __u8 bDescriptorType; String-descriptor */
  773. 0x09, /* __u8 lang ID */
  774. 0x04, /* __u8 lang ID */
  775. };
  776. static unsigned char root_hub_str_index1[] =
  777. {
  778. 28, /* __u8 bLength; */
  779. 0x03, /* __u8 bDescriptorType; String-descriptor */
  780. 'O', /* __u8 Unicode */
  781. 0, /* __u8 Unicode */
  782. 'H', /* __u8 Unicode */
  783. 0, /* __u8 Unicode */
  784. 'C', /* __u8 Unicode */
  785. 0, /* __u8 Unicode */
  786. 'I', /* __u8 Unicode */
  787. 0, /* __u8 Unicode */
  788. ' ', /* __u8 Unicode */
  789. 0, /* __u8 Unicode */
  790. 'R', /* __u8 Unicode */
  791. 0, /* __u8 Unicode */
  792. 'o', /* __u8 Unicode */
  793. 0, /* __u8 Unicode */
  794. 'o', /* __u8 Unicode */
  795. 0, /* __u8 Unicode */
  796. 't', /* __u8 Unicode */
  797. 0, /* __u8 Unicode */
  798. ' ', /* __u8 Unicode */
  799. 0, /* __u8 Unicode */
  800. 'H', /* __u8 Unicode */
  801. 0, /* __u8 Unicode */
  802. 'u', /* __u8 Unicode */
  803. 0, /* __u8 Unicode */
  804. 'b', /* __u8 Unicode */
  805. 0, /* __u8 Unicode */
  806. };
  807. /* Hub class-specific descriptor is constructed dynamically */
  808. /*-------------------------------------------------------------------------*/
  809. #define OK(x) len = (x); break
  810. #ifdef DEBUG
  811. #define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
  812. #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
  813. #else
  814. #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
  815. #define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
  816. #endif
  817. #define RD_RH_STAT roothub_status(&gohci)
  818. #define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
  819. /* request to virtual root hub */
  820. int rh_check_port_status(ohci_t *controller)
  821. {
  822. __u32 temp, ndp, i;
  823. int res;
  824. res = -1;
  825. temp = roothub_a (controller);
  826. ndp = (temp & RH_A_NDP);
  827. for (i = 0; i < ndp; i++) {
  828. temp = roothub_portstatus (controller, i);
  829. /* check for a device disconnect */
  830. if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
  831. (RH_PS_PESC | RH_PS_CSC)) &&
  832. ((temp & RH_PS_CCS) == 0)) {
  833. res = i;
  834. break;
  835. }
  836. }
  837. return res;
  838. }
  839. static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
  840. void *buffer, int transfer_len, struct devrequest *cmd)
  841. {
  842. void * data = buffer;
  843. int leni = transfer_len;
  844. int len = 0;
  845. int stat = 0;
  846. __u32 datab[4];
  847. __u8 *data_buf = (__u8 *)datab;
  848. __u16 bmRType_bReq;
  849. __u16 wValue;
  850. __u16 wIndex;
  851. __u16 wLength;
  852. #ifdef DEBUG
  853. urb_priv.actual_length = 0;
  854. pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
  855. #else
  856. wait_ms(1);
  857. #endif
  858. if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
  859. info("Root-Hub submit IRQ: NOT implemented");
  860. return 0;
  861. }
  862. bmRType_bReq = cmd->requesttype | (cmd->request << 8);
  863. wValue = m16_swap (cmd->value);
  864. wIndex = m16_swap (cmd->index);
  865. wLength = m16_swap (cmd->length);
  866. info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
  867. dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
  868. switch (bmRType_bReq) {
  869. /* Request Destination:
  870. without flags: Device,
  871. RH_INTERFACE: interface,
  872. RH_ENDPOINT: endpoint,
  873. RH_CLASS means HUB here,
  874. RH_OTHER | RH_CLASS almost ever means HUB_PORT here
  875. */
  876. case RH_GET_STATUS:
  877. *(__u16 *) data_buf = m16_swap (1); OK (2);
  878. case RH_GET_STATUS | RH_INTERFACE:
  879. *(__u16 *) data_buf = m16_swap (0); OK (2);
  880. case RH_GET_STATUS | RH_ENDPOINT:
  881. *(__u16 *) data_buf = m16_swap (0); OK (2);
  882. case RH_GET_STATUS | RH_CLASS:
  883. *(__u32 *) data_buf = m32_swap (
  884. RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
  885. OK (4);
  886. case RH_GET_STATUS | RH_OTHER | RH_CLASS:
  887. *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
  888. case RH_CLEAR_FEATURE | RH_ENDPOINT:
  889. switch (wValue) {
  890. case (RH_ENDPOINT_STALL): OK (0);
  891. }
  892. break;
  893. case RH_CLEAR_FEATURE | RH_CLASS:
  894. switch (wValue) {
  895. case RH_C_HUB_LOCAL_POWER:
  896. OK(0);
  897. case (RH_C_HUB_OVER_CURRENT):
  898. WR_RH_STAT(RH_HS_OCIC); OK (0);
  899. }
  900. break;
  901. case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
  902. switch (wValue) {
  903. case (RH_PORT_ENABLE):
  904. WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
  905. case (RH_PORT_SUSPEND):
  906. WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
  907. case (RH_PORT_POWER):
  908. WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
  909. case (RH_C_PORT_CONNECTION):
  910. WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
  911. case (RH_C_PORT_ENABLE):
  912. WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
  913. case (RH_C_PORT_SUSPEND):
  914. WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
  915. case (RH_C_PORT_OVER_CURRENT):
  916. WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
  917. case (RH_C_PORT_RESET):
  918. WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
  919. }
  920. break;
  921. case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
  922. switch (wValue) {
  923. case (RH_PORT_SUSPEND):
  924. WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
  925. case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
  926. if (RD_RH_PORTSTAT & RH_PS_CCS)
  927. WR_RH_PORTSTAT (RH_PS_PRS);
  928. OK (0);
  929. case (RH_PORT_POWER):
  930. WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
  931. case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
  932. if (RD_RH_PORTSTAT & RH_PS_CCS)
  933. WR_RH_PORTSTAT (RH_PS_PES );
  934. OK (0);
  935. }
  936. break;
  937. case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
  938. case RH_GET_DESCRIPTOR:
  939. switch ((wValue & 0xff00) >> 8) {
  940. case (0x01): /* device descriptor */
  941. len = min_t(unsigned int,
  942. leni,
  943. min_t(unsigned int,
  944. sizeof (root_hub_dev_des),
  945. wLength));
  946. data_buf = root_hub_dev_des; OK(len);
  947. case (0x02): /* configuration descriptor */
  948. len = min_t(unsigned int,
  949. leni,
  950. min_t(unsigned int,
  951. sizeof (root_hub_config_des),
  952. wLength));
  953. data_buf = root_hub_config_des; OK(len);
  954. case (0x03): /* string descriptors */
  955. if(wValue==0x0300) {
  956. len = min_t(unsigned int,
  957. leni,
  958. min_t(unsigned int,
  959. sizeof (root_hub_str_index0),
  960. wLength));
  961. data_buf = root_hub_str_index0;
  962. OK(len);
  963. }
  964. if(wValue==0x0301) {
  965. len = min_t(unsigned int,
  966. leni,
  967. min_t(unsigned int,
  968. sizeof (root_hub_str_index1),
  969. wLength));
  970. data_buf = root_hub_str_index1;
  971. OK(len);
  972. }
  973. default:
  974. stat = USB_ST_STALLED;
  975. }
  976. break;
  977. case RH_GET_DESCRIPTOR | RH_CLASS:
  978. {
  979. __u32 temp = roothub_a (&gohci);
  980. data_buf [0] = 9; /* min length; */
  981. data_buf [1] = 0x29;
  982. data_buf [2] = temp & RH_A_NDP;
  983. data_buf [3] = 0;
  984. if (temp & RH_A_PSM) /* per-port power switching? */
  985. data_buf [3] |= 0x1;
  986. if (temp & RH_A_NOCP) /* no overcurrent reporting? */
  987. data_buf [3] |= 0x10;
  988. else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
  989. data_buf [3] |= 0x8;
  990. /* corresponds to data_buf[4-7] */
  991. datab [1] = 0;
  992. data_buf [5] = (temp & RH_A_POTPGT) >> 24;
  993. temp = roothub_b (&gohci);
  994. data_buf [7] = temp & RH_B_DR;
  995. if (data_buf [2] < 7) {
  996. data_buf [8] = 0xff;
  997. } else {
  998. data_buf [0] += 2;
  999. data_buf [8] = (temp & RH_B_DR) >> 8;
  1000. data_buf [10] = data_buf [9] = 0xff;
  1001. }
  1002. len = min_t(unsigned int, leni,
  1003. min_t(unsigned int, data_buf [0], wLength));
  1004. OK (len);
  1005. }
  1006. case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
  1007. case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
  1008. default:
  1009. dbg ("unsupported root hub command");
  1010. stat = USB_ST_STALLED;
  1011. }
  1012. #ifdef DEBUG
  1013. ohci_dump_roothub (&gohci, 1);
  1014. #else
  1015. wait_ms(1);
  1016. #endif
  1017. len = min_t(int, len, leni);
  1018. if (data != data_buf)
  1019. memcpy (data, data_buf, len);
  1020. dev->act_len = len;
  1021. dev->status = stat;
  1022. #ifdef DEBUG
  1023. if (transfer_len)
  1024. urb_priv.actual_length = transfer_len;
  1025. pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
  1026. #else
  1027. wait_ms(1);
  1028. #endif
  1029. return stat;
  1030. }
  1031. /*-------------------------------------------------------------------------*/
  1032. /* common code for handling submit messages - used for all but root hub */
  1033. /* accesses. */
  1034. int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1035. int transfer_len, struct devrequest *setup, int interval)
  1036. {
  1037. int stat = 0;
  1038. int maxsize = usb_maxpacket(dev, pipe);
  1039. int timeout;
  1040. /* device pulled? Shortcut the action. */
  1041. if (devgone == dev) {
  1042. dev->status = USB_ST_CRC_ERR;
  1043. return 0;
  1044. }
  1045. #ifdef DEBUG
  1046. urb_priv.actual_length = 0;
  1047. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1048. #else
  1049. wait_ms(1);
  1050. #endif
  1051. if (!maxsize) {
  1052. err("submit_common_message: pipesize for pipe %lx is zero",
  1053. pipe);
  1054. return -1;
  1055. }
  1056. if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
  1057. err("sohci_submit_job failed");
  1058. return -1;
  1059. }
  1060. wait_ms(10);
  1061. /* ohci_dump_status(&gohci); */
  1062. /* allow more time for a BULK device to react - some are slow */
  1063. #define BULK_TO 5000 /* timeout in milliseconds */
  1064. if (usb_pipetype (pipe) == PIPE_BULK)
  1065. timeout = BULK_TO;
  1066. else
  1067. timeout = 100;
  1068. /* wait for it to complete */
  1069. for (;;) {
  1070. /* check whether the controller is done */
  1071. stat = hc_interrupt();
  1072. if (stat < 0) {
  1073. stat = USB_ST_CRC_ERR;
  1074. break;
  1075. }
  1076. if (stat >= 0 && stat != 0xff) {
  1077. /* 0xff is returned for an SF-interrupt */
  1078. break;
  1079. }
  1080. if (--timeout) {
  1081. wait_ms(1);
  1082. } else {
  1083. err("CTL:TIMEOUT ");
  1084. stat = USB_ST_CRC_ERR;
  1085. break;
  1086. }
  1087. }
  1088. /* we got an Root Hub Status Change interrupt */
  1089. if (got_rhsc) {
  1090. #ifdef DEBUG
  1091. ohci_dump_roothub (&gohci, 1);
  1092. #endif
  1093. got_rhsc = 0;
  1094. /* abuse timeout */
  1095. timeout = rh_check_port_status(&gohci);
  1096. if (timeout >= 0) {
  1097. #if 0 /* this does nothing useful, but leave it here in case that changes */
  1098. /* the called routine adds 1 to the passed value */
  1099. usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
  1100. #endif
  1101. /*
  1102. * XXX
  1103. * This is potentially dangerous because it assumes
  1104. * that only one device is ever plugged in!
  1105. */
  1106. devgone = dev;
  1107. }
  1108. }
  1109. dev->status = stat;
  1110. dev->act_len = transfer_len;
  1111. #ifdef DEBUG
  1112. pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
  1113. #else
  1114. wait_ms(1);
  1115. #endif
  1116. /* free TDs in urb_priv */
  1117. urb_free_priv (&urb_priv);
  1118. return 0;
  1119. }
  1120. /* submit routines called from usb.c */
  1121. int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1122. int transfer_len)
  1123. {
  1124. info("submit_bulk_msg");
  1125. return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
  1126. }
  1127. int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1128. int transfer_len, struct devrequest *setup)
  1129. {
  1130. int maxsize = usb_maxpacket(dev, pipe);
  1131. info("submit_control_msg");
  1132. #ifdef DEBUG
  1133. urb_priv.actual_length = 0;
  1134. pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
  1135. #else
  1136. wait_ms(1);
  1137. #endif
  1138. if (!maxsize) {
  1139. err("submit_control_message: pipesize for pipe %lx is zero",
  1140. pipe);
  1141. return -1;
  1142. }
  1143. if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
  1144. gohci.rh.dev = dev;
  1145. /* root hub - redirect */
  1146. return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
  1147. setup);
  1148. }
  1149. return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
  1150. }
  1151. int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
  1152. int transfer_len, int interval)
  1153. {
  1154. info("submit_int_msg");
  1155. return -1;
  1156. }
  1157. /*-------------------------------------------------------------------------*
  1158. * HC functions
  1159. *-------------------------------------------------------------------------*/
  1160. /* reset the HC and BUS */
  1161. static int hc_reset (ohci_t *ohci)
  1162. {
  1163. int timeout = 30;
  1164. int smm_timeout = 50; /* 0,5 sec */
  1165. if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
  1166. writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
  1167. info("USB HC TakeOver from SMM");
  1168. while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
  1169. wait_ms (10);
  1170. if (--smm_timeout == 0) {
  1171. err("USB HC TakeOver failed!");
  1172. return -1;
  1173. }
  1174. }
  1175. }
  1176. /* Disable HC interrupts */
  1177. writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
  1178. dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
  1179. ohci->slot_name,
  1180. readl (&ohci->regs->control));
  1181. /* Reset USB (needed by some controllers) */
  1182. writel (0, &ohci->regs->control);
  1183. /* HC Reset requires max 10 us delay */
  1184. writel (OHCI_HCR, &ohci->regs->cmdstatus);
  1185. while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
  1186. if (--timeout == 0) {
  1187. err("USB HC reset timed out!");
  1188. return -1;
  1189. }
  1190. udelay (1);
  1191. }
  1192. return 0;
  1193. }
  1194. /*-------------------------------------------------------------------------*/
  1195. /* Start an OHCI controller, set the BUS operational
  1196. * enable interrupts
  1197. * connect the virtual root hub */
  1198. static int hc_start (ohci_t * ohci)
  1199. {
  1200. __u32 mask;
  1201. unsigned int fminterval;
  1202. ohci->disabled = 1;
  1203. /* Tell the controller where the control and bulk lists are
  1204. * The lists are empty now. */
  1205. writel (0, &ohci->regs->ed_controlhead);
  1206. writel (0, &ohci->regs->ed_bulkhead);
  1207. writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
  1208. fminterval = 0x2edf;
  1209. writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
  1210. fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
  1211. writel (fminterval, &ohci->regs->fminterval);
  1212. writel (0x628, &ohci->regs->lsthresh);
  1213. /* start controller operations */
  1214. ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
  1215. ohci->disabled = 0;
  1216. writel (ohci->hc_control, &ohci->regs->control);
  1217. /* disable all interrupts */
  1218. mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
  1219. OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
  1220. OHCI_INTR_OC | OHCI_INTR_MIE);
  1221. writel (mask, &ohci->regs->intrdisable);
  1222. /* clear all interrupts */
  1223. mask &= ~OHCI_INTR_MIE;
  1224. writel (mask, &ohci->regs->intrstatus);
  1225. /* Choose the interrupts we care about now - but w/o MIE */
  1226. mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
  1227. writel (mask, &ohci->regs->intrenable);
  1228. #ifdef OHCI_USE_NPS
  1229. /* required for AMD-756 and some Mac platforms */
  1230. writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
  1231. &ohci->regs->roothub.a);
  1232. writel (RH_HS_LPSC, &ohci->regs->roothub.status);
  1233. #endif /* OHCI_USE_NPS */
  1234. #define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
  1235. /* POTPGT delay is bits 24-31, in 2 ms units. */
  1236. mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
  1237. /* connect the virtual root hub */
  1238. ohci->rh.devnum = 0;
  1239. return 0;
  1240. }
  1241. /*-------------------------------------------------------------------------*/
  1242. /* an interrupt happens */
  1243. static int
  1244. hc_interrupt (void)
  1245. {
  1246. ohci_t *ohci = &gohci;
  1247. struct ohci_regs *regs = ohci->regs;
  1248. int ints;
  1249. int stat = -1;
  1250. if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
  1251. ints = OHCI_INTR_WDH;
  1252. } else {
  1253. ints = readl (&regs->intrstatus);
  1254. }
  1255. /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
  1256. if (ints & OHCI_INTR_RHSC) {
  1257. got_rhsc = 1;
  1258. }
  1259. if (ints & OHCI_INTR_UE) {
  1260. ohci->disabled++;
  1261. err ("OHCI Unrecoverable Error, controller usb-%s disabled",
  1262. ohci->slot_name);
  1263. /* e.g. due to PCI Master/Target Abort */
  1264. #ifdef DEBUG
  1265. ohci_dump (ohci, 1);
  1266. #else
  1267. wait_ms(1);
  1268. #endif
  1269. /* FIXME: be optimistic, hope that bug won't repeat often. */
  1270. /* Make some non-interrupt context restart the controller. */
  1271. /* Count and limit the retries though; either hardware or */
  1272. /* software errors can go forever... */
  1273. hc_reset (ohci);
  1274. return -1;
  1275. }
  1276. if (ints & OHCI_INTR_WDH) {
  1277. wait_ms(1);
  1278. writel (OHCI_INTR_WDH, &regs->intrdisable);
  1279. stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
  1280. writel (OHCI_INTR_WDH, &regs->intrenable);
  1281. }
  1282. if (ints & OHCI_INTR_SO) {
  1283. dbg("USB Schedule overrun\n");
  1284. writel (OHCI_INTR_SO, &regs->intrenable);
  1285. stat = -1;
  1286. }
  1287. /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
  1288. if (ints & OHCI_INTR_SF) {
  1289. unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
  1290. wait_ms(1);
  1291. writel (OHCI_INTR_SF, &regs->intrdisable);
  1292. if (ohci->ed_rm_list[frame] != NULL)
  1293. writel (OHCI_INTR_SF, &regs->intrenable);
  1294. stat = 0xff;
  1295. }
  1296. writel (ints, &regs->intrstatus);
  1297. return stat;
  1298. }
  1299. /*-------------------------------------------------------------------------*/
  1300. /*-------------------------------------------------------------------------*/
  1301. /* De-allocate all resources.. */
  1302. static void hc_release_ohci (ohci_t *ohci)
  1303. {
  1304. dbg ("USB HC release ohci usb-%s", ohci->slot_name);
  1305. if (!ohci->disabled)
  1306. hc_reset (ohci);
  1307. }
  1308. /*-------------------------------------------------------------------------*/
  1309. /*
  1310. * low level initalisation routine, called from usb.c
  1311. */
  1312. static char ohci_inited = 0;
  1313. int usb_lowlevel_init(void)
  1314. {
  1315. S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
  1316. S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
  1317. /*
  1318. * Set the 48 MHz UPLL clocking. Values are taken from
  1319. * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
  1320. */
  1321. clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
  1322. gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
  1323. /*
  1324. * Enable USB host clock.
  1325. */
  1326. clk_power->CLKCON |= (1 << 4);
  1327. memset (&gohci, 0, sizeof (ohci_t));
  1328. memset (&urb_priv, 0, sizeof (urb_priv_t));
  1329. /* align the storage */
  1330. if ((__u32)&ghcca[0] & 0xff) {
  1331. err("HCCA not aligned!!");
  1332. return -1;
  1333. }
  1334. phcca = &ghcca[0];
  1335. info("aligned ghcca %p", phcca);
  1336. memset(&ohci_dev, 0, sizeof(struct ohci_device));
  1337. if ((__u32)&ohci_dev.ed[0] & 0x7) {
  1338. err("EDs not aligned!!");
  1339. return -1;
  1340. }
  1341. memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
  1342. if ((__u32)gtd & 0x7) {
  1343. err("TDs not aligned!!");
  1344. return -1;
  1345. }
  1346. ptd = gtd;
  1347. gohci.hcca = phcca;
  1348. memset (phcca, 0, sizeof (struct ohci_hcca));
  1349. gohci.disabled = 1;
  1350. gohci.sleeping = 0;
  1351. gohci.irq = -1;
  1352. gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
  1353. gohci.flags = 0;
  1354. gohci.slot_name = "s3c2400";
  1355. if (hc_reset (&gohci) < 0) {
  1356. hc_release_ohci (&gohci);
  1357. /* Initialization failed */
  1358. clk_power->CLKCON &= ~(1 << 4);
  1359. return -1;
  1360. }
  1361. /* FIXME this is a second HC reset; why?? */
  1362. writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
  1363. wait_ms (10);
  1364. if (hc_start (&gohci) < 0) {
  1365. err ("can't start usb-%s", gohci.slot_name);
  1366. hc_release_ohci (&gohci);
  1367. /* Initialization failed */
  1368. clk_power->CLKCON &= ~(1 << 4);
  1369. return -1;
  1370. }
  1371. #ifdef DEBUG
  1372. ohci_dump (&gohci, 1);
  1373. #else
  1374. wait_ms(1);
  1375. #endif
  1376. ohci_inited = 1;
  1377. return 0;
  1378. }
  1379. int usb_lowlevel_stop(void)
  1380. {
  1381. S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
  1382. /* this gets called really early - before the controller has */
  1383. /* even been initialized! */
  1384. if (!ohci_inited)
  1385. return 0;
  1386. /* TODO release any interrupts, etc. */
  1387. /* call hc_release_ohci() here ? */
  1388. hc_reset (&gohci);
  1389. /* may not want to do this */
  1390. clk_power->CLKCON &= ~(1 << 4);
  1391. return 0;
  1392. }
  1393. #endif /* CONFIG_USB_OHCI */