serial_s5p.c 4.2 KB

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  1. /*
  2. * (C) Copyright 2009 SAMSUNG Electronics
  3. * Minkyu Kang <mk7.kang@samsung.com>
  4. * Heungjun Kim <riverful.kim@samsung.com>
  5. *
  6. * based on drivers/serial/s3c64xx.c
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #include <common.h>
  11. #include <dm.h>
  12. #include <errno.h>
  13. #include <fdtdec.h>
  14. #include <linux/compiler.h>
  15. #include <asm/io.h>
  16. #include <asm/arch/uart.h>
  17. #include <asm/arch/clk.h>
  18. #include <serial.h>
  19. DECLARE_GLOBAL_DATA_PTR;
  20. #define RX_FIFO_COUNT_SHIFT 0
  21. #define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT)
  22. #define RX_FIFO_FULL (1 << 8)
  23. #define TX_FIFO_COUNT_SHIFT 16
  24. #define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT)
  25. #define TX_FIFO_FULL (1 << 24)
  26. /* Information about a serial port */
  27. struct s5p_serial_platdata {
  28. struct s5p_uart *reg; /* address of registers in physical memory */
  29. u8 port_id; /* uart port number */
  30. };
  31. /*
  32. * The coefficient, used to calculate the baudrate on S5P UARTs is
  33. * calculated as
  34. * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
  35. * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
  36. * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
  37. */
  38. static const int udivslot[] = {
  39. 0,
  40. 0x0080,
  41. 0x0808,
  42. 0x0888,
  43. 0x2222,
  44. 0x4924,
  45. 0x4a52,
  46. 0x54aa,
  47. 0x5555,
  48. 0xd555,
  49. 0xd5d5,
  50. 0xddd5,
  51. 0xdddd,
  52. 0xdfdd,
  53. 0xdfdf,
  54. 0xffdf,
  55. };
  56. int s5p_serial_setbrg(struct udevice *dev, int baudrate)
  57. {
  58. struct s5p_serial_platdata *plat = dev->platdata;
  59. struct s5p_uart *const uart = plat->reg;
  60. u32 uclk = get_uart_clk(plat->port_id);
  61. u32 val;
  62. val = uclk / baudrate;
  63. writel(val / 16 - 1, &uart->ubrdiv);
  64. if (s5p_uart_divslot())
  65. writew(udivslot[val % 16], &uart->rest.slot);
  66. else
  67. writeb(val % 16, &uart->rest.value);
  68. return 0;
  69. }
  70. static int s5p_serial_probe(struct udevice *dev)
  71. {
  72. struct s5p_serial_platdata *plat = dev->platdata;
  73. struct s5p_uart *const uart = plat->reg;
  74. /* enable FIFOs, auto clear Rx FIFO */
  75. writel(0x3, &uart->ufcon);
  76. writel(0, &uart->umcon);
  77. /* 8N1 */
  78. writel(0x3, &uart->ulcon);
  79. /* No interrupts, no DMA, pure polling */
  80. writel(0x245, &uart->ucon);
  81. return 0;
  82. }
  83. static int serial_err_check(const struct s5p_uart *const uart, int op)
  84. {
  85. unsigned int mask;
  86. /*
  87. * UERSTAT
  88. * Break Detect [3]
  89. * Frame Err [2] : receive operation
  90. * Parity Err [1] : receive operation
  91. * Overrun Err [0] : receive operation
  92. */
  93. if (op)
  94. mask = 0x8;
  95. else
  96. mask = 0xf;
  97. return readl(&uart->uerstat) & mask;
  98. }
  99. static int s5p_serial_getc(struct udevice *dev)
  100. {
  101. struct s5p_serial_platdata *plat = dev->platdata;
  102. struct s5p_uart *const uart = plat->reg;
  103. if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
  104. return -EAGAIN;
  105. serial_err_check(uart, 0);
  106. return (int)(readb(&uart->urxh) & 0xff);
  107. }
  108. static int s5p_serial_putc(struct udevice *dev, const char ch)
  109. {
  110. struct s5p_serial_platdata *plat = dev->platdata;
  111. struct s5p_uart *const uart = plat->reg;
  112. if (readl(&uart->ufstat) & TX_FIFO_FULL)
  113. return -EAGAIN;
  114. writeb(ch, &uart->utxh);
  115. serial_err_check(uart, 1);
  116. return 0;
  117. }
  118. static int s5p_serial_pending(struct udevice *dev, bool input)
  119. {
  120. struct s5p_serial_platdata *plat = dev->platdata;
  121. struct s5p_uart *const uart = plat->reg;
  122. uint32_t ufstat = readl(&uart->ufstat);
  123. if (input)
  124. return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
  125. else
  126. return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
  127. }
  128. static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
  129. {
  130. struct s5p_serial_platdata *plat = dev->platdata;
  131. fdt_addr_t addr;
  132. addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
  133. if (addr == FDT_ADDR_T_NONE)
  134. return -EINVAL;
  135. plat->reg = (struct s5p_uart *)addr;
  136. plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1);
  137. return 0;
  138. }
  139. static const struct dm_serial_ops s5p_serial_ops = {
  140. .putc = s5p_serial_putc,
  141. .pending = s5p_serial_pending,
  142. .getc = s5p_serial_getc,
  143. .setbrg = s5p_serial_setbrg,
  144. };
  145. static const struct udevice_id s5p_serial_ids[] = {
  146. { .compatible = "samsung,exynos4210-uart" },
  147. { }
  148. };
  149. U_BOOT_DRIVER(serial_s5p) = {
  150. .name = "serial_s5p",
  151. .id = UCLASS_SERIAL,
  152. .of_match = s5p_serial_ids,
  153. .ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
  154. .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
  155. .probe = s5p_serial_probe,
  156. .ops = &s5p_serial_ops,
  157. .flags = DM_FLAG_PRE_RELOC,
  158. };