flash.c 7.5 KB

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  1. /*
  2. * Copyright (C) 2003 ETC s.r.o.
  3. *
  4. * This code was inspired by Marius Groeger and Kyle Harris code
  5. * available in other board ports for U-Boot
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. *
  9. * Written by Peter Figuli <peposh@etc.sk>, 2003.
  10. */
  11. #include <common.h>
  12. #include "intel.h"
  13. /*
  14. * This code should handle CFI FLASH memory device. This code is very
  15. * minimalistic approach without many essential error handling code as well.
  16. * Because U-Boot actually is missing smart handling of FLASH device,
  17. * we just set flash_id to anything else to FLASH_UNKNOW, so common code
  18. * can call us without any restrictions.
  19. * TODO: Add CFI Query, to be able to determine FLASH device.
  20. * TODO: Add error handling code
  21. * NOTE: This code was tested with BUS_WIDTH 4 and ITERLEAVE 2 only, but
  22. * hopefully may work with other configurations.
  23. */
  24. #if ( SCB9328_FLASH_BUS_WIDTH == 1 )
  25. # define FLASH_BUS vu_char
  26. # define FLASH_BUS_RET u_char
  27. # if ( SCB9328_FLASH_INTERLEAVE == 1 )
  28. # define FLASH_CMD( x ) x
  29. # else
  30. # error "With 8bit bus only one chip is allowed"
  31. # endif
  32. #elif ( SCB9328_FLASH_BUS_WIDTH == 2 )
  33. # define FLASH_BUS vu_short
  34. # define FLASH_BUS_RET u_short
  35. # if ( SCB9328_FLASH_INTERLEAVE == 1 )
  36. # define FLASH_CMD( x ) x
  37. # elif ( SCB9328_FLASH_INTERLEAVE == 2 )
  38. # define FLASH_CMD( x ) (( x << 8 )| x )
  39. # else
  40. # error "With 16bit bus only 1 or 2 chip(s) are allowed"
  41. # endif
  42. #elif ( SCB9328_FLASH_BUS_WIDTH == 4 )
  43. # define FLASH_BUS vu_long
  44. # define FLASH_BUS_RET u_long
  45. # if ( SCB9328_FLASH_INTERLEAVE == 1 )
  46. # define FLASH_CMD( x ) x
  47. # elif ( SCB9328_FLASH_INTERLEAVE == 2 )
  48. # define FLASH_CMD( x ) (( x << 16 )| x )
  49. # elif ( SCB9328_FLASH_INTERLEAVE == 4 )
  50. # define FLASH_CMD( x ) (( x << 24 )|( x << 16 ) ( x << 8 )| x )
  51. # else
  52. # error "With 32bit bus only 1,2 or 4 chip(s) are allowed"
  53. # endif
  54. #else
  55. # error "Flash bus width might be 1,2,4 for 8,16,32 bit configuration"
  56. #endif
  57. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  58. static FLASH_BUS_RET flash_status_reg (void)
  59. {
  60. FLASH_BUS *addr = (FLASH_BUS *) 0;
  61. /* cppcheck-suppress nullPointer */
  62. *addr = FLASH_CMD (CFI_INTEL_CMD_READ_STATUS_REGISTER);
  63. /* cppcheck-suppress nullPointer */
  64. return *addr;
  65. }
  66. static int flash_ready (ulong timeout)
  67. {
  68. int ok = 1;
  69. ulong start;
  70. start = get_timer(0);
  71. while ((flash_status_reg () & FLASH_CMD (CFI_INTEL_SR_READY)) !=
  72. FLASH_CMD (CFI_INTEL_SR_READY)) {
  73. if (get_timer(start) > timeout && timeout != 0) {
  74. ok = 0;
  75. break;
  76. }
  77. }
  78. return ok;
  79. }
  80. #if ( CONFIG_SYS_MAX_FLASH_BANKS != 1 )
  81. # error "SCB9328 platform has only one flash bank!"
  82. #endif
  83. ulong flash_init (void)
  84. {
  85. int i;
  86. unsigned long address = SCB9328_FLASH_BASE;
  87. flash_info[0].size = SCB9328_FLASH_BANK_SIZE;
  88. flash_info[0].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
  89. flash_info[0].flash_id = INTEL_MANUFACT;
  90. memset (flash_info[0].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
  91. for (i = 0; i < CONFIG_SYS_MAX_FLASH_SECT; i++) {
  92. flash_info[0].start[i] = address;
  93. #ifdef SCB9328_FLASH_UNLOCK
  94. /* Some devices are hw locked after start. */
  95. *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_LOCK_SETUP);
  96. *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_UNLOCK_BLOCK);
  97. flash_ready (0);
  98. *((FLASH_BUS *) address) = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
  99. #endif
  100. address += SCB9328_FLASH_SECT_SIZE;
  101. }
  102. flash_protect (FLAG_PROTECT_SET,
  103. CONFIG_SYS_FLASH_BASE,
  104. CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
  105. &flash_info[0]);
  106. flash_protect (FLAG_PROTECT_SET,
  107. CONFIG_ENV_ADDR,
  108. CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
  109. return SCB9328_FLASH_BANK_SIZE;
  110. }
  111. void flash_print_info (flash_info_t * info)
  112. {
  113. int i;
  114. printf (" Intel vendor\n");
  115. printf (" Size: %ld MB in %d Sectors\n",
  116. info->size >> 20, info->sector_count);
  117. printf (" Sector Start Addresses:");
  118. for (i = 0; i < info->sector_count; i++) {
  119. if (!(i % 5)) {
  120. printf ("\n");
  121. }
  122. printf (" %08lX%s", info->start[i],
  123. info->protect[i] ? " (RO)" : " ");
  124. }
  125. printf ("\n");
  126. }
  127. int flash_erase (flash_info_t * info, int s_first, int s_last)
  128. {
  129. int flag, non_protected = 0, sector;
  130. int rc = ERR_OK;
  131. FLASH_BUS *address;
  132. for (sector = s_first; sector <= s_last; sector++) {
  133. if (!info->protect[sector]) {
  134. non_protected++;
  135. }
  136. }
  137. if (!non_protected) {
  138. return ERR_PROTECTED;
  139. }
  140. /*
  141. * Disable interrupts which might cause a timeout
  142. * here. Remember that our exception vectors are
  143. * at address 0 in the flash, and we don't want a
  144. * (ticker) exception to happen while the flash
  145. * chip is in programming mode.
  146. */
  147. flag = disable_interrupts ();
  148. /* Start erase on unprotected sectors */
  149. for (sector = s_first; sector <= s_last && !ctrlc (); sector++) {
  150. if (info->protect[sector]) {
  151. printf ("Protected sector %2d skipping...\n", sector);
  152. continue;
  153. } else {
  154. printf ("Erasing sector %2d ... ", sector);
  155. }
  156. address = (FLASH_BUS *) (info->start[sector]);
  157. *address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE);
  158. *address = FLASH_CMD (CFI_INTEL_CMD_CONFIRM);
  159. if (flash_ready (CONFIG_SYS_FLASH_ERASE_TOUT)) {
  160. *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
  161. printf ("ok.\n");
  162. } else {
  163. *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
  164. rc = ERR_TIMOUT;
  165. printf ("timeout! Aborting...\n");
  166. break;
  167. }
  168. *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
  169. }
  170. if (ctrlc ())
  171. printf ("User Interrupt!\n");
  172. /* allow flash to settle - wait 10 ms */
  173. udelay_masked (10000);
  174. if (flag) {
  175. enable_interrupts ();
  176. }
  177. return rc;
  178. }
  179. static int write_data (flash_info_t * info, ulong dest, FLASH_BUS data)
  180. {
  181. FLASH_BUS *address = (FLASH_BUS *) dest;
  182. int rc = ERR_OK;
  183. int flag;
  184. /* Check if Flash is (sufficiently) erased */
  185. if ((*address & data) != data) {
  186. return ERR_NOT_ERASED;
  187. }
  188. /*
  189. * Disable interrupts which might cause a timeout
  190. * here. Remember that our exception vectors are
  191. * at address 0 in the flash, and we don't want a
  192. * (ticker) exception to happen while the flash
  193. * chip is in programming mode.
  194. */
  195. flag = disable_interrupts ();
  196. *address = FLASH_CMD (CFI_INTEL_CMD_CLEAR_STATUS_REGISTER);
  197. *address = FLASH_CMD (CFI_INTEL_CMD_PROGRAM1);
  198. *address = data;
  199. if (!flash_ready (CONFIG_SYS_FLASH_WRITE_TOUT)) {
  200. *address = FLASH_CMD (CFI_INTEL_CMD_SUSPEND);
  201. rc = ERR_TIMOUT;
  202. printf ("timeout! Aborting...\n");
  203. }
  204. *address = FLASH_CMD (CFI_INTEL_CMD_READ_ARRAY);
  205. if (flag) {
  206. enable_interrupts ();
  207. }
  208. return rc;
  209. }
  210. int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
  211. {
  212. ulong read_addr, write_addr;
  213. FLASH_BUS data;
  214. int i, result = ERR_OK;
  215. read_addr = addr & ~(sizeof (FLASH_BUS) - 1);
  216. write_addr = read_addr;
  217. if (read_addr != addr) {
  218. data = 0;
  219. for (i = 0; i < sizeof (FLASH_BUS); i++) {
  220. if (read_addr < addr || cnt == 0) {
  221. data |= *((uchar *) read_addr) << i * 8;
  222. } else {
  223. data |= (*src++) << i * 8;
  224. cnt--;
  225. }
  226. read_addr++;
  227. }
  228. if ((result = write_data (info, write_addr, data)) != ERR_OK) {
  229. return result;
  230. }
  231. write_addr += sizeof (FLASH_BUS);
  232. }
  233. for (; cnt >= sizeof (FLASH_BUS); cnt -= sizeof (FLASH_BUS)) {
  234. if ((result = write_data (info, write_addr,
  235. *((FLASH_BUS *) src))) != ERR_OK) {
  236. return result;
  237. }
  238. write_addr += sizeof (FLASH_BUS);
  239. src += sizeof (FLASH_BUS);
  240. }
  241. if (cnt > 0) {
  242. read_addr = write_addr;
  243. data = 0;
  244. for (i = 0; i < sizeof (FLASH_BUS); i++) {
  245. if (cnt > 0) {
  246. data |= (*src++) << i * 8;
  247. cnt--;
  248. } else {
  249. data |= *((uchar *) read_addr) << i * 8;
  250. }
  251. read_addr++;
  252. }
  253. if ((result = write_data (info, write_addr, data)) != 0) {
  254. return result;
  255. }
  256. }
  257. return ERR_OK;
  258. }