tegra114.dtsi 7.2 KB

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  1. #include <dt-bindings/clock/tegra114-car.h>
  2. #include <dt-bindings/gpio/tegra-gpio.h>
  3. #include <dt-bindings/interrupt-controller/arm-gic.h>
  4. #include "skeleton.dtsi"
  5. / {
  6. compatible = "nvidia,tegra114";
  7. tegra_car: clock {
  8. compatible = "nvidia,tegra114-car";
  9. reg = <0x60006000 0x1000>;
  10. #clock-cells = <1>;
  11. };
  12. apbdma: dma {
  13. compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
  14. reg = <0x6000a000 0x1400>;
  15. interrupts = <0 104 0x04
  16. 0 105 0x04
  17. 0 106 0x04
  18. 0 107 0x04
  19. 0 108 0x04
  20. 0 109 0x04
  21. 0 110 0x04
  22. 0 111 0x04
  23. 0 112 0x04
  24. 0 113 0x04
  25. 0 114 0x04
  26. 0 115 0x04
  27. 0 116 0x04
  28. 0 117 0x04
  29. 0 118 0x04
  30. 0 119 0x04
  31. 0 128 0x04
  32. 0 129 0x04
  33. 0 130 0x04
  34. 0 131 0x04
  35. 0 132 0x04
  36. 0 133 0x04
  37. 0 134 0x04
  38. 0 135 0x04
  39. 0 136 0x04
  40. 0 137 0x04
  41. 0 138 0x04
  42. 0 139 0x04
  43. 0 140 0x04
  44. 0 141 0x04
  45. 0 142 0x04
  46. 0 143 0x04>;
  47. };
  48. gpio: gpio@6000d000 {
  49. compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
  50. reg = <0x6000d000 0x1000>;
  51. interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
  52. <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
  53. <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
  54. <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
  55. <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
  56. <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
  57. <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
  58. <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
  59. #gpio-cells = <2>;
  60. gpio-controller;
  61. #interrupt-cells = <2>;
  62. interrupt-controller;
  63. };
  64. i2c@7000c000 {
  65. compatible = "nvidia,tegra114-i2c";
  66. reg = <0x7000c000 0x100>;
  67. interrupts = <0 38 0x04>;
  68. #address-cells = <1>;
  69. #size-cells = <0>;
  70. clocks = <&tegra_car 12>;
  71. status = "disabled";
  72. };
  73. i2c@7000c400 {
  74. compatible = "nvidia,tegra114-i2c";
  75. reg = <0x7000c400 0x100>;
  76. interrupts = <0 84 0x04>;
  77. #address-cells = <1>;
  78. #size-cells = <0>;
  79. clocks = <&tegra_car 54>;
  80. status = "disabled";
  81. };
  82. i2c@7000c500 {
  83. compatible = "nvidia,tegra114-i2c";
  84. reg = <0x7000c500 0x100>;
  85. interrupts = <0 92 0x04>;
  86. #address-cells = <1>;
  87. #size-cells = <0>;
  88. clocks = <&tegra_car 67>;
  89. status = "disabled";
  90. };
  91. i2c@7000c700 {
  92. compatible = "nvidia,tegra114-i2c";
  93. reg = <0x7000c700 0x100>;
  94. interrupts = <0 120 0x04>;
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. clocks = <&tegra_car 103>;
  98. status = "disabled";
  99. };
  100. i2c@7000d000 {
  101. compatible = "nvidia,tegra114-i2c";
  102. reg = <0x7000d000 0x100>;
  103. interrupts = <0 53 0x04>;
  104. #address-cells = <1>;
  105. #size-cells = <0>;
  106. clocks = <&tegra_car 47>;
  107. status = "disabled";
  108. };
  109. uarta: serial@70006000 {
  110. compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
  111. reg = <0x70006000 0x40>;
  112. reg-shift = <2>;
  113. interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
  114. clocks = <&tegra_car TEGRA114_CLK_UARTA>;
  115. resets = <&tegra_car 6>;
  116. reset-names = "serial";
  117. dmas = <&apbdma 8>, <&apbdma 8>;
  118. dma-names = "rx", "tx";
  119. status = "disabled";
  120. };
  121. uartb: serial@70006040 {
  122. compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
  123. reg = <0x70006040 0x40>;
  124. reg-shift = <2>;
  125. interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
  126. clocks = <&tegra_car TEGRA114_CLK_UARTB>;
  127. resets = <&tegra_car 7>;
  128. reset-names = "serial";
  129. dmas = <&apbdma 9>, <&apbdma 9>;
  130. dma-names = "rx", "tx";
  131. status = "disabled";
  132. };
  133. uartc: serial@70006200 {
  134. compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
  135. reg = <0x70006200 0x100>;
  136. reg-shift = <2>;
  137. interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
  138. clocks = <&tegra_car TEGRA114_CLK_UARTC>;
  139. resets = <&tegra_car 55>;
  140. reset-names = "serial";
  141. dmas = <&apbdma 10>, <&apbdma 10>;
  142. dma-names = "rx", "tx";
  143. status = "disabled";
  144. };
  145. uartd: serial@70006300 {
  146. compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
  147. reg = <0x70006300 0x100>;
  148. reg-shift = <2>;
  149. interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
  150. clocks = <&tegra_car TEGRA114_CLK_UARTD>;
  151. resets = <&tegra_car 65>;
  152. reset-names = "serial";
  153. dmas = <&apbdma 19>, <&apbdma 19>;
  154. dma-names = "rx", "tx";
  155. status = "disabled";
  156. };
  157. spi@7000d400 {
  158. compatible = "nvidia,tegra114-spi";
  159. reg = <0x7000d400 0x200>;
  160. interrupts = <0 59 0x04>;
  161. nvidia,dma-request-selector = <&apbdma 15>;
  162. #address-cells = <1>;
  163. #size-cells = <0>;
  164. status = "disabled";
  165. /* PERIPH_ID_SBC1, PLLP_OUT0 */
  166. clocks = <&tegra_car 41>;
  167. };
  168. spi@7000d600 {
  169. compatible = "nvidia,tegra114-spi";
  170. reg = <0x7000d600 0x200>;
  171. interrupts = <0 82 0x04>;
  172. nvidia,dma-request-selector = <&apbdma 16>;
  173. #address-cells = <1>;
  174. #size-cells = <0>;
  175. status = "disabled";
  176. /* PERIPH_ID_SBC2, PLLP_OUT0 */
  177. clocks = <&tegra_car 44>;
  178. };
  179. spi@7000d800 {
  180. compatible = "nvidia,tegra114-spi";
  181. reg = <0x7000d800 0x200>;
  182. interrupts = <0 83 0x04>;
  183. nvidia,dma-request-selector = <&apbdma 17>;
  184. #address-cells = <1>;
  185. #size-cells = <0>;
  186. status = "disabled";
  187. /* PERIPH_ID_SBC3, PLLP_OUT0 */
  188. clocks = <&tegra_car 46>;
  189. };
  190. spi@7000da00 {
  191. compatible = "nvidia,tegra114-spi";
  192. reg = <0x7000da00 0x200>;
  193. interrupts = <0 93 0x04>;
  194. nvidia,dma-request-selector = <&apbdma 18>;
  195. #address-cells = <1>;
  196. #size-cells = <0>;
  197. status = "disabled";
  198. /* PERIPH_ID_SBC4, PLLP_OUT0 */
  199. clocks = <&tegra_car 68>;
  200. };
  201. spi@7000dc00 {
  202. compatible = "nvidia,tegra114-spi";
  203. reg = <0x7000dc00 0x200>;
  204. interrupts = <0 94 0x04>;
  205. nvidia,dma-request-selector = <&apbdma 27>;
  206. #address-cells = <1>;
  207. #size-cells = <0>;
  208. status = "disabled";
  209. /* PERIPH_ID_SBC5, PLLP_OUT0 */
  210. clocks = <&tegra_car 104>;
  211. };
  212. spi@7000de00 {
  213. compatible = "nvidia,tegra114-spi";
  214. reg = <0x7000de00 0x200>;
  215. interrupts = <0 79 0x04>;
  216. nvidia,dma-request-selector = <&apbdma 28>;
  217. #address-cells = <1>;
  218. #size-cells = <0>;
  219. status = "disabled";
  220. /* PERIPH_ID_SBC6, PLLP_OUT0 */
  221. clocks = <&tegra_car 105>;
  222. };
  223. sdhci@78000000 {
  224. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  225. reg = <0x78000000 0x200>;
  226. interrupts = <0 14 0x04>;
  227. clocks = <&tegra_car 14>;
  228. status = "disable";
  229. };
  230. sdhci@78000200 {
  231. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  232. reg = <0x78000200 0x200>;
  233. interrupts = <0 15 0x04>;
  234. clocks = <&tegra_car 9>;
  235. status = "disable";
  236. };
  237. sdhci@78000400 {
  238. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  239. reg = <0x78000400 0x200>;
  240. interrupts = <0 19 0x04>;
  241. clocks = <&tegra_car 69>;
  242. status = "disable";
  243. };
  244. sdhci@78000600 {
  245. compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
  246. reg = <0x78000600 0x200>;
  247. interrupts = <0 31 0x04>;
  248. clocks = <&tegra_car 15>;
  249. status = "disable";
  250. };
  251. usb@7d000000 {
  252. compatible = "nvidia,tegra114-ehci";
  253. reg = <0x7d000000 0x4000>;
  254. interrupts = <52>;
  255. phy_type = "utmi";
  256. clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */
  257. status = "disabled";
  258. };
  259. usb@7d004000 {
  260. compatible = "nvidia,tegra114-ehci";
  261. reg = <0x7d004000 0x4000>;
  262. interrupts = <53>;
  263. phy_type = "hsic";
  264. clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */
  265. status = "disabled";
  266. };
  267. usb@7d008000 {
  268. compatible = "nvidia,tegra114-ehci";
  269. reg = <0x7d008000 0x4000>;
  270. interrupts = <129>;
  271. phy_type = "utmi";
  272. clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */
  273. status = "disabled";
  274. };
  275. };