omap_gpmc.h 2.3 KB

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  1. /*
  2. * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
  3. * Rohit Choraria <rohitkc@ti.com>
  4. *
  5. * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef __ASM_OMAP_GPMC_H
  10. #define __ASM_OMAP_GPMC_H
  11. #define GPMC_BUF_EMPTY 0
  12. #define GPMC_BUF_FULL 1
  13. enum omap_ecc {
  14. /* 1-bit ECC calculation by Software, Error detection by Software */
  15. OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
  16. /* 1-bit ECC calculation by GPMC, Error detection by Software */
  17. /* ECC layout compatible to legacy ROMCODE. */
  18. OMAP_ECC_HAM1_CODE_HW,
  19. /* 4-bit ECC calculation by GPMC, Error detection by Software */
  20. OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  21. /* 4-bit ECC calculation by GPMC, Error detection by ELM */
  22. OMAP_ECC_BCH4_CODE_HW,
  23. /* 8-bit ECC calculation by GPMC, Error detection by Software */
  24. OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  25. /* 8-bit ECC calculation by GPMC, Error detection by ELM */
  26. OMAP_ECC_BCH8_CODE_HW,
  27. };
  28. struct gpmc_cs {
  29. u32 config1; /* 0x00 */
  30. u32 config2; /* 0x04 */
  31. u32 config3; /* 0x08 */
  32. u32 config4; /* 0x0C */
  33. u32 config5; /* 0x10 */
  34. u32 config6; /* 0x14 */
  35. u32 config7; /* 0x18 */
  36. u32 nand_cmd; /* 0x1C */
  37. u32 nand_adr; /* 0x20 */
  38. u32 nand_dat; /* 0x24 */
  39. u8 res[8]; /* blow up to 0x30 byte */
  40. };
  41. struct bch_res_0_3 {
  42. u32 bch_result_x[4];
  43. };
  44. struct gpmc {
  45. u8 res1[0x10];
  46. u32 sysconfig; /* 0x10 */
  47. u8 res2[0x4];
  48. u32 irqstatus; /* 0x18 */
  49. u32 irqenable; /* 0x1C */
  50. u8 res3[0x20];
  51. u32 timeout_control; /* 0x40 */
  52. u8 res4[0xC];
  53. u32 config; /* 0x50 */
  54. u32 status; /* 0x54 */
  55. u8 res5[0x8]; /* 0x58 */
  56. struct gpmc_cs cs[8]; /* 0x60, 0x90, .. */
  57. u8 res6[0x14]; /* 0x1E0 */
  58. u32 ecc_config; /* 0x1F4 */
  59. u32 ecc_control; /* 0x1F8 */
  60. u32 ecc_size_config; /* 0x1FC */
  61. u32 ecc1_result; /* 0x200 */
  62. u32 ecc2_result; /* 0x204 */
  63. u32 ecc3_result; /* 0x208 */
  64. u32 ecc4_result; /* 0x20C */
  65. u32 ecc5_result; /* 0x210 */
  66. u32 ecc6_result; /* 0x214 */
  67. u32 ecc7_result; /* 0x218 */
  68. u32 ecc8_result; /* 0x21C */
  69. u32 ecc9_result; /* 0x220 */
  70. u8 res7[12]; /* 0x224 */
  71. u32 testmomde_ctrl; /* 0x230 */
  72. u8 res8[12]; /* 0x234 */
  73. struct bch_res_0_3 bch_result_0_3[2]; /* 0x240 */
  74. };
  75. /* Used for board specific gpmc initialization */
  76. extern struct gpmc *gpmc_cfg;
  77. #endif /* __ASM_OMAP_GPMC_H */