sys_proto.h 2.2 KB

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  1. /*
  2. * Freescale i.MX23/i.MX28 specific functions
  3. *
  4. * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  5. * on behalf of DENX Software Engineering GmbH
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #ifndef __SYS_PROTO_H__
  10. #define __SYS_PROTO_H__
  11. #include <asm/imx-common/regs-common.h>
  12. int mxs_reset_block(struct mxs_register_32 *reg);
  13. int mxs_wait_mask_set(struct mxs_register_32 *reg,
  14. uint32_t mask,
  15. unsigned int timeout);
  16. int mxs_wait_mask_clr(struct mxs_register_32 *reg,
  17. uint32_t mask,
  18. unsigned int timeout);
  19. int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int));
  20. #ifdef CONFIG_SPL_BUILD
  21. #if defined(CONFIG_MX23)
  22. #include <asm/arch/iomux-mx23.h>
  23. #elif defined(CONFIG_MX28)
  24. #include <asm/arch/iomux-mx28.h>
  25. #endif
  26. void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr,
  27. const iomux_cfg_t *iomux_setup,
  28. const unsigned int iomux_size);
  29. #endif
  30. struct mxs_pair {
  31. uint8_t boot_pads;
  32. uint8_t boot_mask;
  33. const char *mode;
  34. };
  35. static const struct mxs_pair mxs_boot_modes[] = {
  36. #if defined(CONFIG_MX23)
  37. { 0x00, 0x0f, "USB" },
  38. { 0x01, 0x1f, "I2C, master" },
  39. { 0x02, 0x1f, "SSP SPI #1, master, NOR" },
  40. { 0x03, 0x1f, "SSP SPI #2, master, NOR" },
  41. { 0x04, 0x1f, "NAND" },
  42. { 0x06, 0x1f, "JTAG" },
  43. { 0x08, 0x1f, "SSP SPI #3, master, EEPROM" },
  44. { 0x09, 0x1f, "SSP SD/MMC #0" },
  45. { 0x0a, 0x1f, "SSP SD/MMC #1" },
  46. { 0x00, 0x00, "Reserved/Unknown/Wrong" },
  47. #elif defined(CONFIG_MX28)
  48. { 0x00, 0x0f, "USB #0" },
  49. { 0x01, 0x1f, "I2C #0, master, 3V3" },
  50. { 0x11, 0x1f, "I2C #0, master, 1V8" },
  51. { 0x02, 0x1f, "SSP SPI #2, master, 3V3 NOR" },
  52. { 0x12, 0x1f, "SSP SPI #2, master, 1V8 NOR" },
  53. { 0x03, 0x1f, "SSP SPI #3, master, 3V3 NOR" },
  54. { 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" },
  55. { 0x04, 0x1f, "NAND, 3V3" },
  56. { 0x14, 0x1f, "NAND, 1V8" },
  57. { 0x06, 0x1f, "JTAG" },
  58. { 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" },
  59. { 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" },
  60. { 0x09, 0x1f, "SSP SD/MMC #0, 3V3" },
  61. { 0x19, 0x1f, "SSP SD/MMC #0, 1V8" },
  62. { 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" },
  63. { 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" },
  64. { 0x00, 0x00, "Reserved/Unknown/Wrong" },
  65. #endif
  66. };
  67. struct mxs_spl_data {
  68. uint8_t boot_mode_idx;
  69. uint32_t mem_dram_size;
  70. };
  71. int mxs_dram_init(void);
  72. #endif /* __SYS_PROTO_H__ */