timer.c 4.1 KB

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  1. /*
  2. * (C) Copyright 2007
  3. * Sascha Hauer, Pengutronix
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <asm/arch/imx-regs.h>
  25. #include <asm/arch/clock.h>
  26. #include <div64.h>
  27. #include <watchdog.h>
  28. #include <asm/io.h>
  29. #define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
  30. /* General purpose timers registers */
  31. #define GPTCR __REG(TIMER_BASE) /* Control register */
  32. #define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
  33. #define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
  34. #define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
  35. /* General purpose timers bitfields */
  36. #define GPTCR_SWR (1 << 15) /* Software reset */
  37. #define GPTCR_FRR (1 << 9) /* Freerun / restart */
  38. #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source */
  39. #define GPTCR_TEN 1 /* Timer enable */
  40. DECLARE_GLOBAL_DATA_PTR;
  41. /*
  42. * "time" is measured in 1 / CONFIG_SYS_HZ seconds,
  43. * "tick" is internal timer period
  44. */
  45. #ifdef CONFIG_MX31_TIMER_HIGH_PRECISION
  46. /* ~0.4% error - measured with stop-watch on 100s boot-delay */
  47. static inline unsigned long long tick_to_time(unsigned long long tick)
  48. {
  49. tick *= CONFIG_SYS_HZ;
  50. do_div(tick, MXC_CLK32);
  51. return tick;
  52. }
  53. static inline unsigned long long time_to_tick(unsigned long long time)
  54. {
  55. time *= MXC_CLK32;
  56. do_div(time, CONFIG_SYS_HZ);
  57. return time;
  58. }
  59. static inline unsigned long long us_to_tick(unsigned long long us)
  60. {
  61. us = us * MXC_CLK32 + 999999;
  62. do_div(us, 1000000);
  63. return us;
  64. }
  65. #else
  66. /* ~2% error */
  67. #define TICK_PER_TIME ((MXC_CLK32 + CONFIG_SYS_HZ / 2) / CONFIG_SYS_HZ)
  68. #define US_PER_TICK (1000000 / MXC_CLK32)
  69. static inline unsigned long long tick_to_time(unsigned long long tick)
  70. {
  71. do_div(tick, TICK_PER_TIME);
  72. return tick;
  73. }
  74. static inline unsigned long long time_to_tick(unsigned long long time)
  75. {
  76. return time * TICK_PER_TIME;
  77. }
  78. static inline unsigned long long us_to_tick(unsigned long long us)
  79. {
  80. us += US_PER_TICK - 1;
  81. do_div(us, US_PER_TICK);
  82. return us;
  83. }
  84. #endif
  85. /* The 32768Hz 32-bit timer overruns in 131072 seconds */
  86. int timer_init(void)
  87. {
  88. int i;
  89. /* setup GP Timer 1 */
  90. GPTCR = GPTCR_SWR;
  91. for (i = 0; i < 100; i++)
  92. GPTCR = 0; /* We have no udelay by now */
  93. GPTPR = 0; /* 32Khz */
  94. /* Freerun Mode, PERCLK1 input */
  95. GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
  96. return 0;
  97. }
  98. unsigned long long get_ticks(void)
  99. {
  100. ulong now = GPTCNT; /* current tick value */
  101. if (now >= gd->lastinc) /* normal mode (non roll) */
  102. /* move stamp forward with absolut diff ticks */
  103. gd->arch.tbl += (now - gd->lastinc);
  104. else /* we have rollover of incrementer */
  105. gd->arch.tbl += (0xFFFFFFFF - gd->lastinc) + now;
  106. gd->lastinc = now;
  107. return gd->arch.tbl;
  108. }
  109. ulong get_timer_masked(void)
  110. {
  111. /*
  112. * get_ticks() returns a long long (64 bit), it wraps in
  113. * 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
  114. * 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
  115. * 5 * 10^6 days - long enough.
  116. */
  117. return tick_to_time(get_ticks());
  118. }
  119. ulong get_timer(ulong base)
  120. {
  121. return get_timer_masked() - base;
  122. }
  123. /* delay x useconds AND preserve advance timestamp value */
  124. void __udelay(unsigned long usec)
  125. {
  126. unsigned long long tmp;
  127. ulong tmo;
  128. tmo = us_to_tick(usec);
  129. tmp = get_ticks() + tmo; /* get current timestamp */
  130. while (get_ticks() < tmp) /* loop till event */
  131. /*NOP*/;
  132. }
  133. /*
  134. * This function is derived from PowerPC code (timebase clock frequency).
  135. * On ARM it returns the number of timer ticks per second.
  136. */
  137. ulong get_tbclk(void)
  138. {
  139. return MXC_CLK32;
  140. }