xilinx.c 10 KB

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  1. /*
  2. * (C) Copyright 2012-2013, Xilinx, Michal Simek
  3. *
  4. * (C) Copyright 2002
  5. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  6. * Keith Outwater, keith_outwater@mvis.com
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. *
  26. */
  27. /*
  28. * Xilinx FPGA support
  29. */
  30. #include <common.h>
  31. #include <fpga.h>
  32. #include <virtex2.h>
  33. #include <spartan2.h>
  34. #include <spartan3.h>
  35. #include <zynqpl.h>
  36. #if 0
  37. #define FPGA_DEBUG
  38. #endif
  39. /* Define FPGA_DEBUG to get debug printf's */
  40. #ifdef FPGA_DEBUG
  41. #define PRINTF(fmt,args...) printf (fmt ,##args)
  42. #else
  43. #define PRINTF(fmt,args...)
  44. #endif
  45. /* Local Static Functions */
  46. static int xilinx_validate (Xilinx_desc * desc, char *fn);
  47. /* ------------------------------------------------------------------------- */
  48. int fpga_loadbitstream(int devnum, char *fpgadata, size_t size)
  49. {
  50. unsigned int length;
  51. unsigned int swapsize;
  52. char buffer[80];
  53. unsigned char *dataptr;
  54. unsigned int i;
  55. const fpga_desc *desc;
  56. Xilinx_desc *xdesc;
  57. dataptr = (unsigned char *)fpgadata;
  58. /* Find out fpga_description */
  59. desc = fpga_validate(devnum, dataptr, 0, (char *)__func__);
  60. /* Assign xilinx device description */
  61. xdesc = desc->devdesc;
  62. /* skip the first bytes of the bitsteam, their meaning is unknown */
  63. length = (*dataptr << 8) + *(dataptr + 1);
  64. dataptr += 2;
  65. dataptr += length;
  66. /* get design name (identifier, length, string) */
  67. length = (*dataptr << 8) + *(dataptr + 1);
  68. dataptr += 2;
  69. if (*dataptr++ != 0x61) {
  70. debug("%s: Design name id not recognized in bitstream\n",
  71. __func__);
  72. return FPGA_FAIL;
  73. }
  74. length = (*dataptr << 8) + *(dataptr + 1);
  75. dataptr += 2;
  76. for (i = 0; i < length; i++)
  77. buffer[i] = *dataptr++;
  78. printf(" design filename = \"%s\"\n", buffer);
  79. /* get part number (identifier, length, string) */
  80. if (*dataptr++ != 0x62) {
  81. printf("%s: Part number id not recognized in bitstream\n",
  82. __func__);
  83. return FPGA_FAIL;
  84. }
  85. length = (*dataptr << 8) + *(dataptr + 1);
  86. dataptr += 2;
  87. for (i = 0; i < length; i++)
  88. buffer[i] = *dataptr++;
  89. if (xdesc->name) {
  90. i = strncmp(buffer, xdesc->name, strlen(xdesc->name));
  91. if (i) {
  92. printf("%s: Wrong bitstream ID for this device\n",
  93. __func__);
  94. printf("%s: Bitstream ID %s, current device ID %d/%s\n",
  95. __func__, buffer, devnum, xdesc->name);
  96. return FPGA_FAIL;
  97. }
  98. } else {
  99. printf("%s: Please fill correct device ID to Xilinx_desc\n",
  100. __func__);
  101. }
  102. printf(" part number = \"%s\"\n", buffer);
  103. /* get date (identifier, length, string) */
  104. if (*dataptr++ != 0x63) {
  105. printf("%s: Date identifier not recognized in bitstream\n",
  106. __func__);
  107. return FPGA_FAIL;
  108. }
  109. length = (*dataptr << 8) + *(dataptr+1);
  110. dataptr += 2;
  111. for (i = 0; i < length; i++)
  112. buffer[i] = *dataptr++;
  113. printf(" date = \"%s\"\n", buffer);
  114. /* get time (identifier, length, string) */
  115. if (*dataptr++ != 0x64) {
  116. printf("%s: Time identifier not recognized in bitstream\n",
  117. __func__);
  118. return FPGA_FAIL;
  119. }
  120. length = (*dataptr << 8) + *(dataptr+1);
  121. dataptr += 2;
  122. for (i = 0; i < length; i++)
  123. buffer[i] = *dataptr++;
  124. printf(" time = \"%s\"\n", buffer);
  125. /* get fpga data length (identifier, length) */
  126. if (*dataptr++ != 0x65) {
  127. printf("%s: Data length id not recognized in bitstream\n",
  128. __func__);
  129. return FPGA_FAIL;
  130. }
  131. swapsize = ((unsigned int) *dataptr << 24) +
  132. ((unsigned int) *(dataptr + 1) << 16) +
  133. ((unsigned int) *(dataptr + 2) << 8) +
  134. ((unsigned int) *(dataptr + 3));
  135. dataptr += 4;
  136. printf(" bytes in bitstream = %d\n", swapsize);
  137. return fpga_load(devnum, dataptr, swapsize);
  138. }
  139. int xilinx_load(Xilinx_desc *desc, const void *buf, size_t bsize)
  140. {
  141. int ret_val = FPGA_FAIL; /* assume a failure */
  142. if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
  143. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  144. } else
  145. switch (desc->family) {
  146. case Xilinx_Spartan2:
  147. #if defined(CONFIG_FPGA_SPARTAN2)
  148. PRINTF ("%s: Launching the Spartan-II Loader...\n",
  149. __FUNCTION__);
  150. ret_val = Spartan2_load (desc, buf, bsize);
  151. #else
  152. printf ("%s: No support for Spartan-II devices.\n",
  153. __FUNCTION__);
  154. #endif
  155. break;
  156. case Xilinx_Spartan3:
  157. #if defined(CONFIG_FPGA_SPARTAN3)
  158. PRINTF ("%s: Launching the Spartan-III Loader...\n",
  159. __FUNCTION__);
  160. ret_val = Spartan3_load (desc, buf, bsize);
  161. #else
  162. printf ("%s: No support for Spartan-III devices.\n",
  163. __FUNCTION__);
  164. #endif
  165. break;
  166. case Xilinx_Virtex2:
  167. #if defined(CONFIG_FPGA_VIRTEX2)
  168. PRINTF ("%s: Launching the Virtex-II Loader...\n",
  169. __FUNCTION__);
  170. ret_val = Virtex2_load (desc, buf, bsize);
  171. #else
  172. printf ("%s: No support for Virtex-II devices.\n",
  173. __FUNCTION__);
  174. #endif
  175. break;
  176. case xilinx_zynq:
  177. #if defined(CONFIG_FPGA_ZYNQPL)
  178. PRINTF("%s: Launching the Zynq PL Loader...\n",
  179. __func__);
  180. ret_val = zynq_load(desc, buf, bsize);
  181. #else
  182. printf("%s: No support for Zynq devices.\n",
  183. __func__);
  184. #endif
  185. break;
  186. default:
  187. printf ("%s: Unsupported family type, %d\n",
  188. __FUNCTION__, desc->family);
  189. }
  190. return ret_val;
  191. }
  192. int xilinx_dump(Xilinx_desc *desc, const void *buf, size_t bsize)
  193. {
  194. int ret_val = FPGA_FAIL; /* assume a failure */
  195. if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
  196. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  197. } else
  198. switch (desc->family) {
  199. case Xilinx_Spartan2:
  200. #if defined(CONFIG_FPGA_SPARTAN2)
  201. PRINTF ("%s: Launching the Spartan-II Reader...\n",
  202. __FUNCTION__);
  203. ret_val = Spartan2_dump (desc, buf, bsize);
  204. #else
  205. printf ("%s: No support for Spartan-II devices.\n",
  206. __FUNCTION__);
  207. #endif
  208. break;
  209. case Xilinx_Spartan3:
  210. #if defined(CONFIG_FPGA_SPARTAN3)
  211. PRINTF ("%s: Launching the Spartan-III Reader...\n",
  212. __FUNCTION__);
  213. ret_val = Spartan3_dump (desc, buf, bsize);
  214. #else
  215. printf ("%s: No support for Spartan-III devices.\n",
  216. __FUNCTION__);
  217. #endif
  218. break;
  219. case Xilinx_Virtex2:
  220. #if defined( CONFIG_FPGA_VIRTEX2)
  221. PRINTF ("%s: Launching the Virtex-II Reader...\n",
  222. __FUNCTION__);
  223. ret_val = Virtex2_dump (desc, buf, bsize);
  224. #else
  225. printf ("%s: No support for Virtex-II devices.\n",
  226. __FUNCTION__);
  227. #endif
  228. break;
  229. case xilinx_zynq:
  230. #if defined(CONFIG_FPGA_ZYNQPL)
  231. PRINTF("%s: Launching the Zynq PL Reader...\n",
  232. __func__);
  233. ret_val = zynq_dump(desc, buf, bsize);
  234. #else
  235. printf("%s: No support for Zynq devices.\n",
  236. __func__);
  237. #endif
  238. break;
  239. default:
  240. printf ("%s: Unsupported family type, %d\n",
  241. __FUNCTION__, desc->family);
  242. }
  243. return ret_val;
  244. }
  245. int xilinx_info (Xilinx_desc * desc)
  246. {
  247. int ret_val = FPGA_FAIL;
  248. if (xilinx_validate (desc, (char *)__FUNCTION__)) {
  249. printf ("Family: \t");
  250. switch (desc->family) {
  251. case Xilinx_Spartan2:
  252. printf ("Spartan-II\n");
  253. break;
  254. case Xilinx_Spartan3:
  255. printf ("Spartan-III\n");
  256. break;
  257. case Xilinx_Virtex2:
  258. printf ("Virtex-II\n");
  259. break;
  260. case xilinx_zynq:
  261. printf("Zynq PL\n");
  262. break;
  263. /* Add new family types here */
  264. default:
  265. printf ("Unknown family type, %d\n", desc->family);
  266. }
  267. printf ("Interface type:\t");
  268. switch (desc->iface) {
  269. case slave_serial:
  270. printf ("Slave Serial\n");
  271. break;
  272. case master_serial: /* Not used */
  273. printf ("Master Serial\n");
  274. break;
  275. case slave_parallel:
  276. printf ("Slave Parallel\n");
  277. break;
  278. case jtag_mode: /* Not used */
  279. printf ("JTAG Mode\n");
  280. break;
  281. case slave_selectmap:
  282. printf ("Slave SelectMap Mode\n");
  283. break;
  284. case master_selectmap:
  285. printf ("Master SelectMap Mode\n");
  286. break;
  287. case devcfg:
  288. printf("Device configuration interface (Zynq)\n");
  289. break;
  290. /* Add new interface types here */
  291. default:
  292. printf ("Unsupported interface type, %d\n", desc->iface);
  293. }
  294. printf ("Device Size: \t%d bytes\n"
  295. "Cookie: \t0x%x (%d)\n",
  296. desc->size, desc->cookie, desc->cookie);
  297. if (desc->name)
  298. printf("Device name: \t%s\n", desc->name);
  299. if (desc->iface_fns) {
  300. printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
  301. switch (desc->family) {
  302. case Xilinx_Spartan2:
  303. #if defined(CONFIG_FPGA_SPARTAN2)
  304. Spartan2_info (desc);
  305. #else
  306. /* just in case */
  307. printf ("%s: No support for Spartan-II devices.\n",
  308. __FUNCTION__);
  309. #endif
  310. break;
  311. case Xilinx_Spartan3:
  312. #if defined(CONFIG_FPGA_SPARTAN3)
  313. Spartan3_info (desc);
  314. #else
  315. /* just in case */
  316. printf ("%s: No support for Spartan-III devices.\n",
  317. __FUNCTION__);
  318. #endif
  319. break;
  320. case Xilinx_Virtex2:
  321. #if defined(CONFIG_FPGA_VIRTEX2)
  322. Virtex2_info (desc);
  323. #else
  324. /* just in case */
  325. printf ("%s: No support for Virtex-II devices.\n",
  326. __FUNCTION__);
  327. #endif
  328. break;
  329. case xilinx_zynq:
  330. #if defined(CONFIG_FPGA_ZYNQPL)
  331. zynq_info(desc);
  332. #else
  333. /* just in case */
  334. printf("%s: No support for Zynq devices.\n",
  335. __func__);
  336. #endif
  337. /* Add new family types here */
  338. default:
  339. /* we don't need a message here - we give one up above */
  340. ;
  341. }
  342. } else
  343. printf ("No Device Function Table.\n");
  344. ret_val = FPGA_SUCCESS;
  345. } else {
  346. printf ("%s: Invalid device descriptor\n", __FUNCTION__);
  347. }
  348. return ret_val;
  349. }
  350. /* ------------------------------------------------------------------------- */
  351. static int xilinx_validate (Xilinx_desc * desc, char *fn)
  352. {
  353. int ret_val = false;
  354. if (desc) {
  355. if ((desc->family > min_xilinx_type) &&
  356. (desc->family < max_xilinx_type)) {
  357. if ((desc->iface > min_xilinx_iface_type) &&
  358. (desc->iface < max_xilinx_iface_type)) {
  359. if (desc->size) {
  360. ret_val = true;
  361. } else
  362. printf ("%s: NULL part size\n", fn);
  363. } else
  364. printf ("%s: Invalid Interface type, %d\n",
  365. fn, desc->iface);
  366. } else
  367. printf ("%s: Invalid family type, %d\n", fn, desc->family);
  368. } else
  369. printf ("%s: NULL descriptor!\n", fn);
  370. return ret_val;
  371. }