i2c-uniphier.c 5.1 KB

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  1. /*
  2. * Copyright (C) 2014 Panasonic Corporation
  3. * Copyright (C) 2015 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <linux/types.h>
  10. #include <asm/io.h>
  11. #include <asm/errno.h>
  12. #include <dm/device.h>
  13. #include <dm/root.h>
  14. #include <i2c.h>
  15. #include <fdtdec.h>
  16. DECLARE_GLOBAL_DATA_PTR;
  17. struct uniphier_i2c_regs {
  18. u32 dtrm; /* data transmission */
  19. #define I2C_DTRM_STA (1 << 10)
  20. #define I2C_DTRM_STO (1 << 9)
  21. #define I2C_DTRM_NACK (1 << 8)
  22. #define I2C_DTRM_RD (1 << 0)
  23. u32 drec; /* data reception */
  24. #define I2C_DREC_STS (1 << 12)
  25. #define I2C_DREC_LRB (1 << 11)
  26. #define I2C_DREC_LAB (1 << 9)
  27. u32 myad; /* slave address */
  28. u32 clk; /* clock frequency control */
  29. u32 brst; /* bus reset */
  30. #define I2C_BRST_FOEN (1 << 1)
  31. #define I2C_BRST_BRST (1 << 0)
  32. u32 hold; /* hold time control */
  33. u32 bsts; /* bus status monitor */
  34. u32 noise; /* noise filter control */
  35. u32 setup; /* setup time control */
  36. };
  37. #define IOBUS_FREQ 100000000
  38. struct uniphier_i2c_dev {
  39. struct uniphier_i2c_regs __iomem *regs; /* register base */
  40. unsigned long input_clk; /* master clock (Hz) */
  41. unsigned long wait_us; /* wait for every byte transfer (us) */
  42. };
  43. static int uniphier_i2c_probe(struct udevice *dev)
  44. {
  45. fdt_addr_t addr;
  46. fdt_size_t size;
  47. struct uniphier_i2c_dev *priv = dev_get_priv(dev);
  48. addr = fdtdec_get_addr_size(gd->fdt_blob, dev->of_offset, "reg", &size);
  49. priv->regs = map_sysmem(addr, size);
  50. if (!priv->regs)
  51. return -ENOMEM;
  52. priv->input_clk = IOBUS_FREQ;
  53. /* deassert reset */
  54. writel(0x3, &priv->regs->brst);
  55. return 0;
  56. }
  57. static int uniphier_i2c_remove(struct udevice *dev)
  58. {
  59. struct uniphier_i2c_dev *priv = dev_get_priv(dev);
  60. unmap_sysmem(priv->regs);
  61. return 0;
  62. }
  63. static int send_and_recv_byte(struct uniphier_i2c_dev *dev, u32 dtrm)
  64. {
  65. writel(dtrm, &dev->regs->dtrm);
  66. /*
  67. * This controller only provides interruption to inform the completion
  68. * of each byte transfer. (No status register to poll it.)
  69. * Unfortunately, U-Boot does not have a good support of interrupt.
  70. * Wait for a while.
  71. */
  72. udelay(dev->wait_us);
  73. return readl(&dev->regs->drec);
  74. }
  75. static int send_byte(struct uniphier_i2c_dev *dev, u32 dtrm, bool *stop)
  76. {
  77. int ret = 0;
  78. u32 drec;
  79. drec = send_and_recv_byte(dev, dtrm);
  80. if (drec & I2C_DREC_LAB) {
  81. debug("uniphier_i2c: bus arbitration failed\n");
  82. *stop = false;
  83. ret = -EREMOTEIO;
  84. }
  85. if (drec & I2C_DREC_LRB) {
  86. debug("uniphier_i2c: slave did not return ACK\n");
  87. ret = -EREMOTEIO;
  88. }
  89. return ret;
  90. }
  91. static int uniphier_i2c_transmit(struct uniphier_i2c_dev *dev, uint addr,
  92. uint len, const u8 *buf, bool *stop)
  93. {
  94. int ret;
  95. debug("%s: addr = %x, len = %d\n", __func__, addr, len);
  96. ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK | addr << 1, stop);
  97. if (ret < 0)
  98. goto fail;
  99. while (len--) {
  100. ret = send_byte(dev, I2C_DTRM_NACK | *buf++, stop);
  101. if (ret < 0)
  102. goto fail;
  103. }
  104. fail:
  105. if (*stop)
  106. writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm);
  107. return ret;
  108. }
  109. static int uniphier_i2c_receive(struct uniphier_i2c_dev *dev, uint addr,
  110. uint len, u8 *buf, bool *stop)
  111. {
  112. int ret;
  113. debug("%s: addr = %x, len = %d\n", __func__, addr, len);
  114. ret = send_byte(dev, I2C_DTRM_STA | I2C_DTRM_NACK |
  115. I2C_DTRM_RD | addr << 1, stop);
  116. if (ret < 0)
  117. goto fail;
  118. while (len--)
  119. *buf++ = send_and_recv_byte(dev, len ? 0 : I2C_DTRM_NACK);
  120. fail:
  121. if (*stop)
  122. writel(I2C_DTRM_STO | I2C_DTRM_NACK, &dev->regs->dtrm);
  123. return ret;
  124. }
  125. static int uniphier_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
  126. int nmsgs)
  127. {
  128. int ret = 0;
  129. struct uniphier_i2c_dev *dev = dev_get_priv(bus);
  130. bool stop;
  131. for (; nmsgs > 0; nmsgs--, msg++) {
  132. /* If next message is read, skip the stop condition */
  133. stop = nmsgs > 1 && msg[1].flags & I2C_M_RD ? false : true;
  134. if (msg->flags & I2C_M_RD)
  135. ret = uniphier_i2c_receive(dev, msg->addr, msg->len,
  136. msg->buf, &stop);
  137. else
  138. ret = uniphier_i2c_transmit(dev, msg->addr, msg->len,
  139. msg->buf, &stop);
  140. if (ret < 0)
  141. break;
  142. }
  143. return ret;
  144. }
  145. static int uniphier_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  146. {
  147. struct uniphier_i2c_dev *priv = dev_get_priv(bus);
  148. /* max supported frequency is 400 kHz */
  149. if (speed > 400000)
  150. return -EINVAL;
  151. /* bus reset: make sure the bus is idle when change the frequency */
  152. writel(0x1, &priv->regs->brst);
  153. writel((priv->input_clk / speed / 2 << 16) | (priv->input_clk / speed),
  154. &priv->regs->clk);
  155. writel(0x3, &priv->regs->brst);
  156. /*
  157. * Theoretically, each byte can be transferred in
  158. * 1000000 * 9 / speed usec. For safety, wait more than double.
  159. */
  160. priv->wait_us = 20000000 / speed;
  161. return 0;
  162. }
  163. static const struct dm_i2c_ops uniphier_i2c_ops = {
  164. .xfer = uniphier_i2c_xfer,
  165. .set_bus_speed = uniphier_i2c_set_bus_speed,
  166. };
  167. static const struct udevice_id uniphier_i2c_of_match[] = {
  168. { .compatible = "socionext,uniphier-i2c" },
  169. { /* sentinel */ }
  170. };
  171. U_BOOT_DRIVER(uniphier_i2c) = {
  172. .name = "uniphier-i2c",
  173. .id = UCLASS_I2C,
  174. .of_match = uniphier_i2c_of_match,
  175. .probe = uniphier_i2c_probe,
  176. .remove = uniphier_i2c_remove,
  177. .priv_auto_alloc_size = sizeof(struct uniphier_i2c_dev),
  178. .ops = &uniphier_i2c_ops,
  179. };