cmd_errata.c 10 KB

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  1. /*
  2. * Copyright 2010-2011 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <command.h>
  8. #include <linux/compiler.h>
  9. #include <fsl_errata.h>
  10. #include <asm/processor.h>
  11. #include <fsl_usb.h>
  12. #include "fsl_corenet_serdes.h"
  13. #ifdef CONFIG_SYS_FSL_ERRATUM_A004849
  14. /*
  15. * This work-around is implemented in PBI, so just check to see if the
  16. * work-around was actually applied. To do this, we check for specific data
  17. * at specific addresses in DCSR.
  18. *
  19. * Array offsets[] contains a list of offsets within DCSR. According to the
  20. * erratum document, the value at each offset should be 2.
  21. */
  22. static void check_erratum_a4849(uint32_t svr)
  23. {
  24. void __iomem *dcsr = (void *)CONFIG_SYS_DCSRBAR + 0xb0000;
  25. unsigned int i;
  26. #if defined(CONFIG_ARCH_P2041) || defined(CONFIG_ARCH_P3041)
  27. static const uint8_t offsets[] = {
  28. 0x50, 0x54, 0x58, 0x90, 0x94, 0x98
  29. };
  30. #endif
  31. #ifdef CONFIG_ARCH_P4080
  32. static const uint8_t offsets[] = {
  33. 0x60, 0x64, 0x68, 0x6c, 0xa0, 0xa4, 0xa8, 0xac
  34. };
  35. #endif
  36. uint32_t x108; /* The value that should be at offset 0x108 */
  37. for (i = 0; i < ARRAY_SIZE(offsets); i++) {
  38. if (in_be32(dcsr + offsets[i]) != 2) {
  39. printf("Work-around for Erratum A004849 is not enabled\n");
  40. return;
  41. }
  42. }
  43. #if defined(CONFIG_ARCH_P2041) || defined(CONFIG_ARCH_P3041)
  44. x108 = 0x12;
  45. #endif
  46. #ifdef CONFIG_ARCH_P4080
  47. /*
  48. * For P4080, the erratum document says that the value at offset 0x108
  49. * should be 0x12 on rev2, or 0x1c on rev3.
  50. */
  51. if (SVR_MAJ(svr) == 2)
  52. x108 = 0x12;
  53. if (SVR_MAJ(svr) == 3)
  54. x108 = 0x1c;
  55. #endif
  56. if (in_be32(dcsr + 0x108) != x108) {
  57. printf("Work-around for Erratum A004849 is not enabled\n");
  58. return;
  59. }
  60. /* Everything matches, so the erratum work-around was applied */
  61. printf("Work-around for Erratum A004849 enabled\n");
  62. }
  63. #endif
  64. #ifdef CONFIG_SYS_FSL_ERRATUM_A004580
  65. /*
  66. * This work-around is implemented in PBI, so just check to see if the
  67. * work-around was actually applied. To do this, we check for specific data
  68. * at specific addresses in the SerDes register block.
  69. *
  70. * The work-around says that for each SerDes lane, write BnTTLCRy0 =
  71. * 0x1B00_0001, Register 2 = 0x0088_0000, and Register 3 = 0x4000_0000.
  72. */
  73. static void check_erratum_a4580(uint32_t svr)
  74. {
  75. const serdes_corenet_t __iomem *srds_regs =
  76. (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
  77. unsigned int lane;
  78. for (lane = 0; lane < SRDS_MAX_LANES; lane++) {
  79. if (serdes_lane_enabled(lane)) {
  80. const struct serdes_lane __iomem *srds_lane =
  81. &srds_regs->lane[serdes_get_lane_idx(lane)];
  82. /*
  83. * Verify that the values we were supposed to write in
  84. * the PBI are actually there. Also, the lower 15
  85. * bits of res4[3] should be the same as the upper 15
  86. * bits of res4[1].
  87. */
  88. if ((in_be32(&srds_lane->ttlcr0) != 0x1b000001) ||
  89. (in_be32(&srds_lane->res4[1]) != 0x880000) ||
  90. (in_be32(&srds_lane->res4[3]) != 0x40000044)) {
  91. printf("Work-around for Erratum A004580 is "
  92. "not enabled\n");
  93. return;
  94. }
  95. }
  96. }
  97. /* Everything matches, so the erratum work-around was applied */
  98. printf("Work-around for Erratum A004580 enabled\n");
  99. }
  100. #endif
  101. #ifdef CONFIG_SYS_FSL_ERRATUM_A007212
  102. /*
  103. * This workaround can be implemented in PBI, or by u-boot.
  104. */
  105. static void check_erratum_a007212(void)
  106. {
  107. u32 __iomem *plldgdcr = (void *)(CONFIG_SYS_DCSRBAR + 0x21c20);
  108. if (in_be32(plldgdcr) & 0x1fe) {
  109. /* check if PLL ratio is set by workaround */
  110. puts("Work-around for Erratum A007212 enabled\n");
  111. }
  112. }
  113. #endif
  114. static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  115. {
  116. #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
  117. extern int enable_cpu_a011_workaround;
  118. #endif
  119. __maybe_unused u32 svr = get_svr();
  120. #if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_SYS_FSL_ERRATUM_SATA_A001)
  121. if (IS_SVR_REV(svr, 1, 0)) {
  122. switch (SVR_SOC_VER(svr)) {
  123. case SVR_P1013:
  124. case SVR_P1022:
  125. puts("Work-around for Erratum SATA A001 enabled\n");
  126. }
  127. }
  128. #endif
  129. #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES8)
  130. puts("Work-around for Erratum SERDES8 enabled\n");
  131. #endif
  132. #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9)
  133. puts("Work-around for Erratum SERDES9 enabled\n");
  134. #endif
  135. #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES_A005)
  136. puts("Work-around for Erratum SERDES-A005 enabled\n");
  137. #endif
  138. #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
  139. if (SVR_MAJ(svr) < 3)
  140. puts("Work-around for Erratum CPU22 enabled\n");
  141. #endif
  142. #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
  143. /*
  144. * NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0
  145. * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1
  146. * The SVR has been checked by cpu_init_r().
  147. */
  148. if (enable_cpu_a011_workaround)
  149. puts("Work-around for Erratum CPU-A011 enabled\n");
  150. #endif
  151. #if defined(CONFIG_SYS_FSL_ERRATUM_CPU_A003999)
  152. puts("Work-around for Erratum CPU-A003999 enabled\n");
  153. #endif
  154. #if defined(CONFIG_SYS_FSL_ERRATUM_DDR_A003474)
  155. puts("Work-around for Erratum DDR-A003474 enabled\n");
  156. #endif
  157. #if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN)
  158. puts("Work-around for DDR MSYNC_IN Erratum enabled\n");
  159. #endif
  160. #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC111)
  161. puts("Work-around for Erratum ESDHC111 enabled\n");
  162. #endif
  163. #ifdef CONFIG_SYS_FSL_ERRATUM_A004468
  164. puts("Work-around for Erratum A004468 enabled\n");
  165. #endif
  166. #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC135)
  167. puts("Work-around for Erratum ESDHC135 enabled\n");
  168. #endif
  169. #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC13)
  170. if (SVR_MAJ(svr) < 3)
  171. puts("Work-around for Erratum ESDHC13 enabled\n");
  172. #endif
  173. #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC_A001)
  174. puts("Work-around for Erratum ESDHC-A001 enabled\n");
  175. #endif
  176. #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
  177. puts("Work-around for Erratum CPC-A002 enabled\n");
  178. #endif
  179. #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003
  180. puts("Work-around for Erratum CPC-A003 enabled\n");
  181. #endif
  182. #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
  183. puts("Work-around for Erratum ELBC-A001 enabled\n");
  184. #endif
  185. #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003
  186. puts("Work-around for Erratum DDR-A003 enabled\n");
  187. #endif
  188. #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115
  189. puts("Work-around for Erratum DDR115 enabled\n");
  190. #endif
  191. #ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
  192. puts("Work-around for Erratum DDR111 enabled\n");
  193. puts("Work-around for Erratum DDR134 enabled\n");
  194. #endif
  195. #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769
  196. puts("Work-around for Erratum IFC-A002769 enabled\n");
  197. #endif
  198. #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
  199. puts("Work-around for Erratum P1010-A003549 enabled\n");
  200. #endif
  201. #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399
  202. puts("Work-around for Erratum IFC A-003399 enabled\n");
  203. #endif
  204. #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
  205. if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0))
  206. puts("Work-around for Erratum NMG DDR120 enabled\n");
  207. #endif
  208. #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
  209. puts("Work-around for Erratum NMG_LBC103 enabled\n");
  210. #endif
  211. #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
  212. if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0))
  213. puts("Work-around for Erratum NMG ETSEC129 enabled\n");
  214. #endif
  215. #ifdef CONFIG_SYS_FSL_ERRATUM_A004508
  216. puts("Work-around for Erratum A004508 enabled\n");
  217. #endif
  218. #ifdef CONFIG_SYS_FSL_ERRATUM_A004510
  219. puts("Work-around for Erratum A004510 enabled\n");
  220. #endif
  221. #ifdef CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
  222. puts("Work-around for Erratum SRIO-A004034 enabled\n");
  223. #endif
  224. #ifdef CONFIG_SYS_FSL_ERRATUM_A_004934
  225. puts("Work-around for Erratum A004934 enabled\n");
  226. #endif
  227. #ifdef CONFIG_SYS_FSL_ERRATUM_A005871
  228. if (IS_SVR_REV(svr, 1, 0))
  229. puts("Work-around for Erratum A005871 enabled\n");
  230. #endif
  231. #ifdef CONFIG_SYS_FSL_ERRATUM_A006475
  232. if (SVR_MAJ(get_svr()) == 1)
  233. puts("Work-around for Erratum A006475 enabled\n");
  234. #endif
  235. #ifdef CONFIG_SYS_FSL_ERRATUM_A006384
  236. if (SVR_MAJ(get_svr()) == 1)
  237. puts("Work-around for Erratum A006384 enabled\n");
  238. #endif
  239. #ifdef CONFIG_SYS_FSL_ERRATUM_A004849
  240. /* This work-around is implemented in PBI, so just check for it */
  241. check_erratum_a4849(svr);
  242. #endif
  243. #ifdef CONFIG_SYS_FSL_ERRATUM_A004580
  244. /* This work-around is implemented in PBI, so just check for it */
  245. check_erratum_a4580(svr);
  246. #endif
  247. #ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003
  248. puts("Work-around for Erratum PCIe-A003 enabled\n");
  249. #endif
  250. #ifdef CONFIG_SYS_FSL_ERRATUM_USB14
  251. puts("Work-around for Erratum USB14 enabled\n");
  252. #endif
  253. #ifdef CONFIG_SYS_FSL_ERRATUM_A007186
  254. if (has_erratum_a007186())
  255. puts("Work-around for Erratum A007186 enabled\n");
  256. #endif
  257. #ifdef CONFIG_SYS_FSL_ERRATUM_A006593
  258. puts("Work-around for Erratum A006593 enabled\n");
  259. #endif
  260. #ifdef CONFIG_SYS_FSL_ERRATUM_A006379
  261. if (has_erratum_a006379())
  262. puts("Work-around for Erratum A006379 enabled\n");
  263. #endif
  264. #ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
  265. if (IS_SVR_REV(svr, 1, 0))
  266. puts("Work-around for Erratum A003571 enabled\n");
  267. #endif
  268. #ifdef CONFIG_SYS_FSL_ERRATUM_A005812
  269. puts("Work-around for Erratum A-005812 enabled\n");
  270. #endif
  271. #ifdef CONFIG_SYS_FSL_ERRATUM_A005125
  272. puts("Work-around for Erratum A005125 enabled\n");
  273. #endif
  274. #ifdef CONFIG_SYS_FSL_ERRATUM_A007075
  275. if (has_erratum_a007075())
  276. puts("Work-around for Erratum A007075 enabled\n");
  277. #endif
  278. #ifdef CONFIG_SYS_FSL_ERRATUM_A007798
  279. if (has_erratum_a007798())
  280. puts("Work-around for Erratum A007798 enabled\n");
  281. #endif
  282. #ifdef CONFIG_SYS_FSL_ERRATUM_A004477
  283. if (has_erratum_a004477())
  284. puts("Work-around for Erratum A004477 enabled\n");
  285. #endif
  286. #ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
  287. if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
  288. (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
  289. puts("Work-around for Erratum I2C-A004447 enabled\n");
  290. #endif
  291. #ifdef CONFIG_SYS_FSL_ERRATUM_A006261
  292. if (has_erratum_a006261())
  293. puts("Work-around for Erratum A006261 enabled\n");
  294. #endif
  295. #ifdef CONFIG_SYS_FSL_ERRATUM_A007212
  296. check_erratum_a007212();
  297. #endif
  298. #ifdef CONFIG_SYS_FSL_ERRATUM_A005434
  299. puts("Work-around for Erratum A-005434 enabled\n");
  300. #endif
  301. #if defined(CONFIG_SYS_FSL_ERRATUM_A008044) && \
  302. defined(CONFIG_A008044_WORKAROUND)
  303. if (IS_SVR_REV(svr, 1, 0))
  304. puts("Work-around for Erratum A-008044 enabled\n");
  305. #endif
  306. #if defined(CONFIG_SYS_FSL_B4860QDS_XFI_ERR) && \
  307. (defined(CONFIG_TARGET_B4860QDS) || defined(CONFIG_TARGET_B4420QDS))
  308. puts("Work-around for Erratum XFI on B4860QDS enabled\n");
  309. #endif
  310. #ifdef CONFIG_SYS_FSL_ERRATUM_A009663
  311. puts("Work-around for Erratum A009663 enabled\n");
  312. #endif
  313. return 0;
  314. }
  315. U_BOOT_CMD(
  316. errata, 1, 0, do_errata,
  317. "Report errata workarounds",
  318. ""
  319. );