tegra2_gpio.c 6.3 KB

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  1. /*
  2. * NVIDIA Tegra2 GPIO handling.
  3. * (C) Copyright 2010,2011
  4. * NVIDIA Corporation <www.nvidia.com>
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. /*
  25. * Based on (mostly copied from) kw_gpio.c based Linux 2.6 kernel driver.
  26. * Tom Warren (twarren@nvidia.com)
  27. */
  28. #include <common.h>
  29. #include <asm/io.h>
  30. #include <asm/bitops.h>
  31. #include <asm/arch/tegra2.h>
  32. #include <asm/gpio.h>
  33. enum {
  34. TEGRA2_CMD_INFO,
  35. TEGRA2_CMD_PORT,
  36. TEGRA2_CMD_OUTPUT,
  37. TEGRA2_CMD_INPUT,
  38. };
  39. static struct gpio_names {
  40. char name[GPIO_NAME_SIZE];
  41. } gpio_names[MAX_NUM_GPIOS];
  42. static char *get_name(int i)
  43. {
  44. return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN";
  45. }
  46. /* Return config of pin 'gp' as GPIO (1) or SFPIO (0) */
  47. static int get_config(int gp)
  48. {
  49. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  50. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  51. u32 u;
  52. int type;
  53. u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
  54. type = (u >> GPIO_BIT(gp)) & 1;
  55. debug("get_config: port = %d, bit = %d is %s\n",
  56. GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
  57. return type;
  58. }
  59. /* Config pin 'gp' as GPIO or SFPIO, based on 'type' */
  60. static void set_config(int gp, int type)
  61. {
  62. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  63. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  64. u32 u;
  65. debug("set_config: port = %d, bit = %d, %s\n",
  66. GPIO_FULLPORT(gp), GPIO_BIT(gp), type ? "GPIO" : "SFPIO");
  67. u = readl(&bank->gpio_config[GPIO_PORT(gp)]);
  68. if (type) /* GPIO */
  69. u |= 1 << GPIO_BIT(gp);
  70. else
  71. u &= ~(1 << GPIO_BIT(gp));
  72. writel(u, &bank->gpio_config[GPIO_PORT(gp)]);
  73. }
  74. /* Return GPIO pin 'gp' direction - 0 = input or 1 = output */
  75. static int get_direction(int gp)
  76. {
  77. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  78. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  79. u32 u;
  80. int dir;
  81. u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
  82. dir = (u >> GPIO_BIT(gp)) & 1;
  83. debug("get_direction: port = %d, bit = %d, %s\n",
  84. GPIO_FULLPORT(gp), GPIO_BIT(gp), dir ? "OUT" : "IN");
  85. return dir;
  86. }
  87. /* Config GPIO pin 'gp' as input or output (OE) as per 'output' */
  88. static void set_direction(int gp, int output)
  89. {
  90. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  91. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  92. u32 u;
  93. debug("set_direction: port = %d, bit = %d, %s\n",
  94. GPIO_FULLPORT(gp), GPIO_BIT(gp), output ? "OUT" : "IN");
  95. u = readl(&bank->gpio_dir_out[GPIO_PORT(gp)]);
  96. if (output)
  97. u |= 1 << GPIO_BIT(gp);
  98. else
  99. u &= ~(1 << GPIO_BIT(gp));
  100. writel(u, &bank->gpio_dir_out[GPIO_PORT(gp)]);
  101. }
  102. /* set GPIO pin 'gp' output bit as 0 or 1 as per 'high' */
  103. static void set_level(int gp, int high)
  104. {
  105. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  106. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  107. u32 u;
  108. debug("set_level: port = %d, bit %d == %d\n",
  109. GPIO_FULLPORT(gp), GPIO_BIT(gp), high);
  110. u = readl(&bank->gpio_out[GPIO_PORT(gp)]);
  111. if (high)
  112. u |= 1 << GPIO_BIT(gp);
  113. else
  114. u &= ~(1 << GPIO_BIT(gp));
  115. writel(u, &bank->gpio_out[GPIO_PORT(gp)]);
  116. }
  117. /*
  118. * Generic_GPIO primitives.
  119. */
  120. int gpio_request(int gp, const char *label)
  121. {
  122. if (gp >= MAX_NUM_GPIOS)
  123. return -1;
  124. if (label != NULL) {
  125. strncpy(gpio_names[gp].name, label, GPIO_NAME_SIZE);
  126. gpio_names[gp].name[GPIO_NAME_SIZE - 1] = '\0';
  127. }
  128. /* Configure as a GPIO */
  129. set_config(gp, 1);
  130. return 0;
  131. }
  132. void gpio_free(int gp)
  133. {
  134. }
  135. /* read GPIO OUT value of pin 'gp' */
  136. static int gpio_get_output_value(int gp)
  137. {
  138. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  139. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  140. int val;
  141. debug("gpio_get_output_value: pin = %d (port %d:bit %d)\n",
  142. gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
  143. val = readl(&bank->gpio_out[GPIO_PORT(gp)]);
  144. return (val >> GPIO_BIT(gp)) & 1;
  145. }
  146. void gpio_toggle_value(int gp)
  147. {
  148. gpio_set_value(gp, !gpio_get_output_value(gp));
  149. }
  150. /* set GPIO pin 'gp' as an input */
  151. int gpio_direction_input(int gp)
  152. {
  153. debug("gpio_direction_input: pin = %d (port %d:bit %d)\n",
  154. gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
  155. /* Configure GPIO direction as input. */
  156. set_direction(gp, 0);
  157. return 0;
  158. }
  159. /* set GPIO pin 'gp' as an output, with polarity 'value' */
  160. int gpio_direction_output(int gp, int value)
  161. {
  162. debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n",
  163. gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value ? "HIGH" : "LOW");
  164. /* Configure GPIO output value. */
  165. set_level(gp, value);
  166. /* Configure GPIO direction as output. */
  167. set_direction(gp, 1);
  168. return 0;
  169. }
  170. /* read GPIO IN value of pin 'gp' */
  171. int gpio_get_value(int gp)
  172. {
  173. struct gpio_ctlr *gpio = (struct gpio_ctlr *)NV_PA_GPIO_BASE;
  174. struct gpio_ctlr_bank *bank = &gpio->gpio_bank[GPIO_BANK(gp)];
  175. int val;
  176. debug("gpio_get_value: pin = %d (port %d:bit %d)\n",
  177. gp, GPIO_FULLPORT(gp), GPIO_BIT(gp));
  178. val = readl(&bank->gpio_in[GPIO_PORT(gp)]);
  179. return (val >> GPIO_BIT(gp)) & 1;
  180. }
  181. /* write GPIO OUT value to pin 'gp' */
  182. void gpio_set_value(int gp, int value)
  183. {
  184. debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n",
  185. gp, GPIO_FULLPORT(gp), GPIO_BIT(gp), value);
  186. /* Configure GPIO output value. */
  187. set_level(gp, value);
  188. }
  189. /*
  190. * Display Tegra GPIO information
  191. */
  192. void gpio_info(void)
  193. {
  194. int c, type;
  195. for (c = 0; c < MAX_NUM_GPIOS; c++) {
  196. type = get_config(c); /* GPIO, not SFPIO */
  197. if (type) {
  198. printf("GPIO_%d:\t%s is an %s, ", c,
  199. get_name(c),
  200. get_direction(c) ? "OUTPUT" : "INPUT");
  201. if (get_direction(c))
  202. printf("value = %d", gpio_get_output_value(c));
  203. else
  204. printf("value = %d", gpio_get_value(c));
  205. printf("\n");
  206. } else
  207. continue;
  208. }
  209. }