meson_i2c.c 6.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2017 - Beniamino Galvani <b.galvani@gmail.com>
  4. */
  5. #include <common.h>
  6. #include <asm/arch/i2c.h>
  7. #include <asm/io.h>
  8. #include <dm.h>
  9. #include <i2c.h>
  10. #define I2C_TIMEOUT_MS 100
  11. /* Control register fields */
  12. #define REG_CTRL_START BIT(0)
  13. #define REG_CTRL_ACK_IGNORE BIT(1)
  14. #define REG_CTRL_STATUS BIT(2)
  15. #define REG_CTRL_ERROR BIT(3)
  16. #define REG_CTRL_CLKDIV_SHIFT 12
  17. #define REG_CTRL_CLKDIV_MASK GENMASK(21, 12)
  18. #define REG_CTRL_CLKDIVEXT_SHIFT 28
  19. #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
  20. enum {
  21. TOKEN_END = 0,
  22. TOKEN_START,
  23. TOKEN_SLAVE_ADDR_WRITE,
  24. TOKEN_SLAVE_ADDR_READ,
  25. TOKEN_DATA,
  26. TOKEN_DATA_LAST,
  27. TOKEN_STOP,
  28. };
  29. struct i2c_regs {
  30. u32 ctrl;
  31. u32 slave_addr;
  32. u32 tok_list0;
  33. u32 tok_list1;
  34. u32 tok_wdata0;
  35. u32 tok_wdata1;
  36. u32 tok_rdata0;
  37. u32 tok_rdata1;
  38. };
  39. struct meson_i2c {
  40. struct i2c_regs *regs;
  41. struct i2c_msg *msg; /* Current I2C message */
  42. bool last; /* Whether the message is the last */
  43. uint count; /* Number of bytes in the current transfer */
  44. uint pos; /* Position of current transfer in message */
  45. u32 tokens[2]; /* Sequence of tokens to be written */
  46. uint num_tokens; /* Number of tokens to be written */
  47. };
  48. static void meson_i2c_reset_tokens(struct meson_i2c *i2c)
  49. {
  50. i2c->tokens[0] = 0;
  51. i2c->tokens[1] = 0;
  52. i2c->num_tokens = 0;
  53. }
  54. static void meson_i2c_add_token(struct meson_i2c *i2c, int token)
  55. {
  56. if (i2c->num_tokens < 8)
  57. i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4);
  58. else
  59. i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4);
  60. i2c->num_tokens++;
  61. }
  62. /*
  63. * Retrieve data for the current transfer (which can be at most 8
  64. * bytes) from the device internal buffer.
  65. */
  66. static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len)
  67. {
  68. u32 rdata0, rdata1;
  69. int i;
  70. rdata0 = readl(&i2c->regs->tok_rdata0);
  71. rdata1 = readl(&i2c->regs->tok_rdata1);
  72. debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len);
  73. for (i = 0; i < min(4, len); i++)
  74. *buf++ = (rdata0 >> i * 8) & 0xff;
  75. for (i = 4; i < min(8, len); i++)
  76. *buf++ = (rdata1 >> (i - 4) * 8) & 0xff;
  77. }
  78. /*
  79. * Write data for the current transfer (which can be at most 8 bytes)
  80. * to the device internal buffer.
  81. */
  82. static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len)
  83. {
  84. u32 wdata0 = 0, wdata1 = 0;
  85. int i;
  86. for (i = 0; i < min(4, len); i++)
  87. wdata0 |= *buf++ << (i * 8);
  88. for (i = 4; i < min(8, len); i++)
  89. wdata1 |= *buf++ << ((i - 4) * 8);
  90. writel(wdata0, &i2c->regs->tok_wdata0);
  91. writel(wdata1, &i2c->regs->tok_wdata1);
  92. debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len);
  93. }
  94. /*
  95. * Prepare the next transfer: pick the next 8 bytes in the remaining
  96. * part of message and write tokens and data (if needed) to the
  97. * device.
  98. */
  99. static void meson_i2c_prepare_xfer(struct meson_i2c *i2c)
  100. {
  101. bool write = !(i2c->msg->flags & I2C_M_RD);
  102. int i;
  103. i2c->count = min(i2c->msg->len - i2c->pos, 8u);
  104. for (i = 0; i + 1 < i2c->count; i++)
  105. meson_i2c_add_token(i2c, TOKEN_DATA);
  106. if (i2c->count) {
  107. if (write || i2c->pos + i2c->count < i2c->msg->len)
  108. meson_i2c_add_token(i2c, TOKEN_DATA);
  109. else
  110. meson_i2c_add_token(i2c, TOKEN_DATA_LAST);
  111. }
  112. if (write)
  113. meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count);
  114. if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len)
  115. meson_i2c_add_token(i2c, TOKEN_STOP);
  116. writel(i2c->tokens[0], &i2c->regs->tok_list0);
  117. writel(i2c->tokens[1], &i2c->regs->tok_list1);
  118. }
  119. static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg)
  120. {
  121. int token;
  122. token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ :
  123. TOKEN_SLAVE_ADDR_WRITE;
  124. writel(msg->addr << 1, &i2c->regs->slave_addr);
  125. meson_i2c_add_token(i2c, TOKEN_START);
  126. meson_i2c_add_token(i2c, token);
  127. }
  128. static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg,
  129. int last)
  130. {
  131. ulong start;
  132. debug("meson i2c: %s addr %u len %u\n",
  133. (msg->flags & I2C_M_RD) ? "read" : "write",
  134. msg->addr, msg->len);
  135. i2c->msg = msg;
  136. i2c->last = last;
  137. i2c->pos = 0;
  138. i2c->count = 0;
  139. meson_i2c_reset_tokens(i2c);
  140. meson_i2c_do_start(i2c, msg);
  141. do {
  142. meson_i2c_prepare_xfer(i2c);
  143. /* start the transfer */
  144. setbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
  145. start = get_timer(0);
  146. while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) {
  147. if (get_timer(start) > I2C_TIMEOUT_MS) {
  148. clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
  149. debug("meson i2c: timeout\n");
  150. return -ETIMEDOUT;
  151. }
  152. udelay(1);
  153. }
  154. meson_i2c_reset_tokens(i2c);
  155. clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
  156. if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) {
  157. debug("meson i2c: error\n");
  158. return -EREMOTEIO;
  159. }
  160. if ((msg->flags & I2C_M_RD) && i2c->count) {
  161. meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos,
  162. i2c->count);
  163. }
  164. i2c->pos += i2c->count;
  165. } while (i2c->pos < msg->len);
  166. return 0;
  167. }
  168. static int meson_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
  169. int nmsgs)
  170. {
  171. struct meson_i2c *i2c = dev_get_priv(bus);
  172. int i, ret = 0;
  173. for (i = 0; i < nmsgs; i++) {
  174. ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1);
  175. if (ret)
  176. return ret;
  177. }
  178. return 0;
  179. }
  180. static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  181. {
  182. struct meson_i2c *i2c = dev_get_priv(bus);
  183. unsigned int clk_rate = MESON_I2C_CLK_RATE;
  184. unsigned int div;
  185. div = DIV_ROUND_UP(clk_rate, speed * 4);
  186. /* clock divider has 12 bits */
  187. if (div >= (1 << 12)) {
  188. debug("meson i2c: requested bus frequency too low\n");
  189. div = (1 << 12) - 1;
  190. }
  191. clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIV_MASK,
  192. (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT);
  193. clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK,
  194. (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT);
  195. debug("meson i2c: set clk %u, src %u, div %u\n", speed, clk_rate, div);
  196. return 0;
  197. }
  198. static int meson_i2c_probe(struct udevice *bus)
  199. {
  200. struct meson_i2c *i2c = dev_get_priv(bus);
  201. i2c->regs = dev_read_addr_ptr(bus);
  202. clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START);
  203. return 0;
  204. }
  205. static const struct dm_i2c_ops meson_i2c_ops = {
  206. .xfer = meson_i2c_xfer,
  207. .set_bus_speed = meson_i2c_set_bus_speed,
  208. };
  209. static const struct udevice_id meson_i2c_ids[] = {
  210. { .compatible = "amlogic,meson6-i2c" },
  211. { .compatible = "amlogic,meson-gx-i2c" },
  212. { .compatible = "amlogic,meson-gxbb-i2c" },
  213. { }
  214. };
  215. U_BOOT_DRIVER(i2c_meson) = {
  216. .name = "i2c_meson",
  217. .id = UCLASS_I2C,
  218. .of_match = meson_i2c_ids,
  219. .probe = meson_i2c_probe,
  220. .priv_auto_alloc_size = sizeof(struct meson_i2c),
  221. .ops = &meson_i2c_ops,
  222. };