rk_i2c.c 9.3 KB

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  1. /*
  2. * (C) Copyright 2015 Google, Inc
  3. *
  4. * (C) Copyright 2008-2014 Rockchip Electronics
  5. * Peter, Software Engineering, <superpeter.cai@gmail.com>.
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include <common.h>
  10. #include <clk.h>
  11. #include <dm.h>
  12. #include <errno.h>
  13. #include <i2c.h>
  14. #include <asm/io.h>
  15. #include <asm/arch/clock.h>
  16. #include <asm/arch/i2c.h>
  17. #include <asm/arch/periph.h>
  18. #include <dm/pinctrl.h>
  19. #include <linux/sizes.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. /* i2c timerout */
  22. #define I2C_TIMEOUT_MS 100
  23. #define I2C_RETRY_COUNT 3
  24. /* rk i2c fifo max transfer bytes */
  25. #define RK_I2C_FIFO_SIZE 32
  26. struct rk_i2c {
  27. struct clk clk;
  28. struct i2c_regs *regs;
  29. unsigned int speed;
  30. };
  31. static inline void rk_i2c_get_div(int div, int *divh, int *divl)
  32. {
  33. *divl = div / 2;
  34. if (div % 2 == 0)
  35. *divh = div / 2;
  36. else
  37. *divh = DIV_ROUND_UP(div, 2);
  38. }
  39. /*
  40. * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1)
  41. * SCL = PCLK / SCLK Divisor
  42. * i2c_rate = PCLK
  43. */
  44. static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate)
  45. {
  46. uint32_t i2c_rate;
  47. int div, divl, divh;
  48. /* First get i2c rate from pclk */
  49. i2c_rate = clk_get_rate(&i2c->clk);
  50. div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2;
  51. divh = 0;
  52. divl = 0;
  53. if (div >= 0)
  54. rk_i2c_get_div(div, &divh, &divl);
  55. writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv);
  56. debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate,
  57. scl_rate);
  58. debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl);
  59. debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv));
  60. }
  61. static void rk_i2c_show_regs(struct i2c_regs *regs)
  62. {
  63. #ifdef DEBUG
  64. uint i;
  65. debug("i2c_con: 0x%08x\n", readl(&regs->con));
  66. debug("i2c_clkdiv: 0x%08x\n", readl(&regs->clkdiv));
  67. debug("i2c_mrxaddr: 0x%08x\n", readl(&regs->mrxaddr));
  68. debug("i2c_mrxraddR: 0x%08x\n", readl(&regs->mrxraddr));
  69. debug("i2c_mtxcnt: 0x%08x\n", readl(&regs->mtxcnt));
  70. debug("i2c_mrxcnt: 0x%08x\n", readl(&regs->mrxcnt));
  71. debug("i2c_ien: 0x%08x\n", readl(&regs->ien));
  72. debug("i2c_ipd: 0x%08x\n", readl(&regs->ipd));
  73. debug("i2c_fcnt: 0x%08x\n", readl(&regs->fcnt));
  74. for (i = 0; i < 8; i++)
  75. debug("i2c_txdata%d: 0x%08x\n", i, readl(&regs->txdata[i]));
  76. for (i = 0; i < 8; i++)
  77. debug("i2c_rxdata%d: 0x%08x\n", i, readl(&regs->rxdata[i]));
  78. #endif
  79. }
  80. static int rk_i2c_send_start_bit(struct rk_i2c *i2c)
  81. {
  82. struct i2c_regs *regs = i2c->regs;
  83. ulong start;
  84. debug("I2c Send Start bit.\n");
  85. writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
  86. writel(I2C_CON_EN | I2C_CON_START, &regs->con);
  87. writel(I2C_STARTIEN, &regs->ien);
  88. start = get_timer(0);
  89. while (1) {
  90. if (readl(&regs->ipd) & I2C_STARTIPD) {
  91. writel(I2C_STARTIPD, &regs->ipd);
  92. break;
  93. }
  94. if (get_timer(start) > I2C_TIMEOUT_MS) {
  95. debug("I2C Send Start Bit Timeout\n");
  96. rk_i2c_show_regs(regs);
  97. return -ETIMEDOUT;
  98. }
  99. udelay(1);
  100. }
  101. return 0;
  102. }
  103. static int rk_i2c_send_stop_bit(struct rk_i2c *i2c)
  104. {
  105. struct i2c_regs *regs = i2c->regs;
  106. ulong start;
  107. debug("I2c Send Stop bit.\n");
  108. writel(I2C_IPD_ALL_CLEAN, &regs->ipd);
  109. writel(I2C_CON_EN | I2C_CON_STOP, &regs->con);
  110. writel(I2C_CON_STOP, &regs->ien);
  111. start = get_timer(0);
  112. while (1) {
  113. if (readl(&regs->ipd) & I2C_STOPIPD) {
  114. writel(I2C_STOPIPD, &regs->ipd);
  115. break;
  116. }
  117. if (get_timer(start) > I2C_TIMEOUT_MS) {
  118. debug("I2C Send Start Bit Timeout\n");
  119. rk_i2c_show_regs(regs);
  120. return -ETIMEDOUT;
  121. }
  122. udelay(1);
  123. }
  124. return 0;
  125. }
  126. static inline void rk_i2c_disable(struct rk_i2c *i2c)
  127. {
  128. writel(0, &i2c->regs->con);
  129. }
  130. static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
  131. uchar *buf, uint b_len)
  132. {
  133. struct i2c_regs *regs = i2c->regs;
  134. uchar *pbuf = buf;
  135. uint bytes_remain_len = b_len;
  136. uint bytes_xferred = 0;
  137. uint words_xferred = 0;
  138. ulong start;
  139. uint con = 0;
  140. uint rxdata;
  141. uint i, j;
  142. int err;
  143. bool snd_chunk = false;
  144. debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
  145. chip, reg, r_len, b_len);
  146. err = rk_i2c_send_start_bit(i2c);
  147. if (err)
  148. return err;
  149. writel(I2C_MRXADDR_SET(1, chip << 1 | 1), &regs->mrxaddr);
  150. if (r_len == 0) {
  151. writel(0, &regs->mrxraddr);
  152. } else if (r_len < 4) {
  153. writel(I2C_MRXRADDR_SET(r_len, reg), &regs->mrxraddr);
  154. } else {
  155. debug("I2C Read: addr len %d not supported\n", r_len);
  156. return -EIO;
  157. }
  158. while (bytes_remain_len) {
  159. if (bytes_remain_len > RK_I2C_FIFO_SIZE) {
  160. con = I2C_CON_EN;
  161. bytes_xferred = 32;
  162. } else {
  163. /*
  164. * The hw can read up to 32 bytes at a time. If we need
  165. * more than one chunk, send an ACK after the last byte.
  166. */
  167. con = I2C_CON_EN | I2C_CON_LASTACK;
  168. bytes_xferred = bytes_remain_len;
  169. }
  170. words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
  171. /*
  172. * make sure we are in plain RX mode if we read a second chunk
  173. */
  174. if (snd_chunk)
  175. con |= I2C_CON_MOD(I2C_MODE_RX);
  176. else
  177. con |= I2C_CON_MOD(I2C_MODE_TRX);
  178. writel(con, &regs->con);
  179. writel(bytes_xferred, &regs->mrxcnt);
  180. writel(I2C_MBRFIEN | I2C_NAKRCVIEN, &regs->ien);
  181. start = get_timer(0);
  182. while (1) {
  183. if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
  184. writel(I2C_NAKRCVIPD, &regs->ipd);
  185. err = -EREMOTEIO;
  186. }
  187. if (readl(&regs->ipd) & I2C_MBRFIPD) {
  188. writel(I2C_MBRFIPD, &regs->ipd);
  189. break;
  190. }
  191. if (get_timer(start) > I2C_TIMEOUT_MS) {
  192. debug("I2C Read Data Timeout\n");
  193. err = -ETIMEDOUT;
  194. rk_i2c_show_regs(regs);
  195. goto i2c_exit;
  196. }
  197. udelay(1);
  198. }
  199. for (i = 0; i < words_xferred; i++) {
  200. rxdata = readl(&regs->rxdata[i]);
  201. debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata);
  202. for (j = 0; j < 4; j++) {
  203. if ((i * 4 + j) == bytes_xferred)
  204. break;
  205. *pbuf++ = (rxdata >> (j * 8)) & 0xff;
  206. }
  207. }
  208. bytes_remain_len -= bytes_xferred;
  209. snd_chunk = true;
  210. debug("I2C Read bytes_remain_len %d\n", bytes_remain_len);
  211. }
  212. i2c_exit:
  213. rk_i2c_send_stop_bit(i2c);
  214. rk_i2c_disable(i2c);
  215. return err;
  216. }
  217. static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len,
  218. uchar *buf, uint b_len)
  219. {
  220. struct i2c_regs *regs = i2c->regs;
  221. int err;
  222. uchar *pbuf = buf;
  223. uint bytes_remain_len = b_len + r_len + 1;
  224. uint bytes_xferred = 0;
  225. uint words_xferred = 0;
  226. ulong start;
  227. uint txdata;
  228. uint i, j;
  229. debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n",
  230. chip, reg, r_len, b_len);
  231. err = rk_i2c_send_start_bit(i2c);
  232. if (err)
  233. return err;
  234. while (bytes_remain_len) {
  235. if (bytes_remain_len > RK_I2C_FIFO_SIZE)
  236. bytes_xferred = RK_I2C_FIFO_SIZE;
  237. else
  238. bytes_xferred = bytes_remain_len;
  239. words_xferred = DIV_ROUND_UP(bytes_xferred, 4);
  240. for (i = 0; i < words_xferred; i++) {
  241. txdata = 0;
  242. for (j = 0; j < 4; j++) {
  243. if ((i * 4 + j) == bytes_xferred)
  244. break;
  245. if (i == 0 && j == 0 && pbuf == buf) {
  246. txdata |= (chip << 1);
  247. } else if (i == 0 && j <= r_len && pbuf == buf) {
  248. txdata |= (reg &
  249. (0xff << ((j - 1) * 8))) << 8;
  250. } else {
  251. txdata |= (*pbuf++)<<(j * 8);
  252. }
  253. }
  254. writel(txdata, &regs->txdata[i]);
  255. debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata);
  256. }
  257. writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), &regs->con);
  258. writel(bytes_xferred, &regs->mtxcnt);
  259. writel(I2C_MBTFIEN | I2C_NAKRCVIEN, &regs->ien);
  260. start = get_timer(0);
  261. while (1) {
  262. if (readl(&regs->ipd) & I2C_NAKRCVIPD) {
  263. writel(I2C_NAKRCVIPD, &regs->ipd);
  264. err = -EREMOTEIO;
  265. }
  266. if (readl(&regs->ipd) & I2C_MBTFIPD) {
  267. writel(I2C_MBTFIPD, &regs->ipd);
  268. break;
  269. }
  270. if (get_timer(start) > I2C_TIMEOUT_MS) {
  271. debug("I2C Write Data Timeout\n");
  272. err = -ETIMEDOUT;
  273. rk_i2c_show_regs(regs);
  274. goto i2c_exit;
  275. }
  276. udelay(1);
  277. }
  278. bytes_remain_len -= bytes_xferred;
  279. debug("I2C Write bytes_remain_len %d\n", bytes_remain_len);
  280. }
  281. i2c_exit:
  282. rk_i2c_send_stop_bit(i2c);
  283. rk_i2c_disable(i2c);
  284. return err;
  285. }
  286. static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
  287. int nmsgs)
  288. {
  289. struct rk_i2c *i2c = dev_get_priv(bus);
  290. int ret;
  291. debug("i2c_xfer: %d messages\n", nmsgs);
  292. for (; nmsgs > 0; nmsgs--, msg++) {
  293. debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
  294. if (msg->flags & I2C_M_RD) {
  295. ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf,
  296. msg->len);
  297. } else {
  298. ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf,
  299. msg->len);
  300. }
  301. if (ret) {
  302. debug("i2c_write: error sending\n");
  303. return -EREMOTEIO;
  304. }
  305. }
  306. return 0;
  307. }
  308. int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  309. {
  310. struct rk_i2c *i2c = dev_get_priv(bus);
  311. rk_i2c_set_clk(i2c, speed);
  312. return 0;
  313. }
  314. static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus)
  315. {
  316. struct rk_i2c *priv = dev_get_priv(bus);
  317. int ret;
  318. ret = clk_get_by_index(bus, 0, &priv->clk);
  319. if (ret < 0) {
  320. debug("%s: Could not get clock for %s: %d\n", __func__,
  321. bus->name, ret);
  322. return ret;
  323. }
  324. return 0;
  325. }
  326. static int rockchip_i2c_probe(struct udevice *bus)
  327. {
  328. struct rk_i2c *priv = dev_get_priv(bus);
  329. priv->regs = (void *)devfdt_get_addr(bus);
  330. return 0;
  331. }
  332. static const struct dm_i2c_ops rockchip_i2c_ops = {
  333. .xfer = rockchip_i2c_xfer,
  334. .set_bus_speed = rockchip_i2c_set_bus_speed,
  335. };
  336. static const struct udevice_id rockchip_i2c_ids[] = {
  337. { .compatible = "rockchip,rk3066-i2c" },
  338. { .compatible = "rockchip,rk3188-i2c" },
  339. { .compatible = "rockchip,rk3288-i2c" },
  340. { .compatible = "rockchip,rk3399-i2c" },
  341. { }
  342. };
  343. U_BOOT_DRIVER(i2c_rockchip) = {
  344. .name = "i2c_rockchip",
  345. .id = UCLASS_I2C,
  346. .of_match = rockchip_i2c_ids,
  347. .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata,
  348. .probe = rockchip_i2c_probe,
  349. .priv_auto_alloc_size = sizeof(struct rk_i2c),
  350. .ops = &rockchip_i2c_ops,
  351. };