docg4_spl.c 6.8 KB

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  1. /*
  2. * SPL driver for Diskonchip G4 nand flash
  3. *
  4. * Copyright (C) 2013 Mike Dunn <mikedunn@newsguy.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. *
  8. * This driver basically mimics the load functionality of a typical IPL (initial
  9. * program loader) resident in the 2k NOR-like region of the docg4 that is
  10. * mapped to the reset vector. It allows the u-boot SPL to continue loading if
  11. * the IPL loads a fixed number of flash blocks that is insufficient to contain
  12. * the entire u-boot image. In this case, a concatenated spl + u-boot image is
  13. * written at the flash offset from which the IPL loads an image, and when the
  14. * IPL jumps to the SPL, the SPL resumes loading where the IPL left off. See
  15. * the palmtreo680 for an example.
  16. *
  17. * This driver assumes that the data was written to the flash using the device's
  18. * "reliable" mode, and also assumes that each 512 byte page is stored
  19. * redundantly in the subsequent page. This storage format is likely to be used
  20. * by all boards that boot from the docg4. The format compensates for the lack
  21. * of ecc in the IPL.
  22. *
  23. * Reliable mode reduces the capacity of a block by half, and the redundant
  24. * pages reduce it by half again. As a result, the normal 256k capacity of a
  25. * block is reduced to 64k for the purposes of the IPL/SPL.
  26. */
  27. #include <asm/io.h>
  28. #include <linux/mtd/docg4.h>
  29. /* forward declarations */
  30. static inline void write_nop(void __iomem *docptr);
  31. static int poll_status(void __iomem *docptr);
  32. static void write_addr(void __iomem *docptr, uint32_t docg4_addr);
  33. static void address_sequence(unsigned int g4_page, unsigned int g4_index,
  34. void __iomem *docptr);
  35. static int docg4_load_block_reliable(uint32_t flash_offset, void *dest_addr);
  36. int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
  37. {
  38. void *load_addr = dst;
  39. uint32_t flash_offset = offs;
  40. const unsigned int block_count =
  41. (size + DOCG4_BLOCK_CAPACITY_SPL - 1)
  42. / DOCG4_BLOCK_CAPACITY_SPL;
  43. int i;
  44. for (i = 0; i < block_count; i++) {
  45. int ret = docg4_load_block_reliable(flash_offset, load_addr);
  46. if (ret)
  47. return ret;
  48. load_addr += DOCG4_BLOCK_CAPACITY_SPL;
  49. flash_offset += DOCG4_BLOCK_SIZE;
  50. }
  51. return 0;
  52. }
  53. static inline void write_nop(void __iomem *docptr)
  54. {
  55. writew(0, docptr + DOC_NOP);
  56. }
  57. static int poll_status(void __iomem *docptr)
  58. {
  59. /*
  60. * Busy-wait for the FLASHREADY bit to be set in the FLASHCONTROL
  61. * register. Operations known to take a long time (e.g., block erase)
  62. * should sleep for a while before calling this.
  63. */
  64. uint8_t flash_status;
  65. /* hardware quirk requires reading twice initially */
  66. flash_status = readb(docptr + DOC_FLASHCONTROL);
  67. do {
  68. flash_status = readb(docptr + DOC_FLASHCONTROL);
  69. } while (!(flash_status & DOC_CTRL_FLASHREADY));
  70. return 0;
  71. }
  72. static void write_addr(void __iomem *docptr, uint32_t docg4_addr)
  73. {
  74. /* write the four address bytes packed in docg4_addr to the device */
  75. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  76. docg4_addr >>= 8;
  77. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  78. docg4_addr >>= 8;
  79. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  80. docg4_addr >>= 8;
  81. writeb(docg4_addr & 0xff, docptr + DOC_FLASHADDRESS);
  82. }
  83. static void address_sequence(unsigned int g4_page, unsigned int g4_index,
  84. void __iomem *docptr)
  85. {
  86. writew(DOCG4_SEQ_PAGE_READ, docptr + DOC_FLASHSEQUENCE);
  87. writew(DOCG4_CMD_PAGE_READ, docptr + DOC_FLASHCOMMAND);
  88. write_nop(docptr);
  89. write_addr(docptr, ((uint32_t)g4_page << 16) | g4_index);
  90. write_nop(docptr);
  91. }
  92. static int docg4_load_block_reliable(uint32_t flash_offset, void *dest_addr)
  93. {
  94. void __iomem *docptr = (void *)CONFIG_SYS_NAND_BASE;
  95. unsigned int g4_page = flash_offset >> 11; /* 2k page */
  96. const unsigned int last_g4_page = g4_page + 0x80; /* last in block */
  97. int g4_index = 0;
  98. uint16_t flash_status;
  99. uint16_t *buf;
  100. /* flash_offset must be aligned to the start of a block */
  101. if (flash_offset & 0x3ffff)
  102. return -1;
  103. writew(DOC_SEQ_RESET, docptr + DOC_FLASHSEQUENCE);
  104. writew(DOC_CMD_RESET, docptr + DOC_FLASHCOMMAND);
  105. write_nop(docptr);
  106. write_nop(docptr);
  107. poll_status(docptr);
  108. write_nop(docptr);
  109. writew(0x45, docptr + DOC_FLASHSEQUENCE);
  110. writew(0xa3, docptr + DOC_FLASHCOMMAND);
  111. write_nop(docptr);
  112. writew(0x22, docptr + DOC_FLASHCOMMAND);
  113. write_nop(docptr);
  114. /* read 1st 4 oob bytes of first subpage of block */
  115. address_sequence(g4_page, 0x0100, docptr); /* index at oob */
  116. write_nop(docptr);
  117. flash_status = readw(docptr + DOC_FLASHCONTROL);
  118. flash_status = readw(docptr + DOC_FLASHCONTROL);
  119. if (flash_status & 0x06) /* sequence or protection errors */
  120. return -1;
  121. writew(DOCG4_CMD_READ2, docptr + DOC_FLASHCOMMAND);
  122. write_nop(docptr);
  123. write_nop(docptr);
  124. poll_status(docptr);
  125. writew(DOC_ECCCONF0_READ_MODE | 4, docptr + DOC_ECCCONF0);
  126. write_nop(docptr);
  127. write_nop(docptr);
  128. write_nop(docptr);
  129. write_nop(docptr);
  130. write_nop(docptr);
  131. /*
  132. * Here we read the first four oob bytes of the first page of the block.
  133. * The IPL on the palmtreo680 requires that this contain a 32 bit magic
  134. * number, or the load aborts. We'll ignore it.
  135. */
  136. readw(docptr + 0x103c); /* hw quirk; 1st read discarded */
  137. readw(docptr + 0x103c); /* lower 16 bits of magic number */
  138. readw(docptr + DOCG4_MYSTERY_REG); /* upper 16 bits of magic number */
  139. writew(0, docptr + DOC_DATAEND);
  140. write_nop(docptr);
  141. write_nop(docptr);
  142. /* load contents of block to memory */
  143. buf = (uint16_t *)dest_addr;
  144. do {
  145. int i;
  146. address_sequence(g4_page, g4_index, docptr);
  147. writew(DOCG4_CMD_READ2,
  148. docptr + DOC_FLASHCOMMAND);
  149. write_nop(docptr);
  150. write_nop(docptr);
  151. poll_status(docptr);
  152. writew(DOC_ECCCONF0_READ_MODE |
  153. DOC_ECCCONF0_ECC_ENABLE |
  154. DOCG4_BCH_SIZE,
  155. docptr + DOC_ECCCONF0);
  156. write_nop(docptr);
  157. write_nop(docptr);
  158. write_nop(docptr);
  159. write_nop(docptr);
  160. write_nop(docptr);
  161. /* read the 512 bytes of page data, 2 bytes at a time */
  162. readw(docptr + 0x103c); /* hw quirk */
  163. for (i = 0; i < 256; i++)
  164. *buf++ = readw(docptr + 0x103c);
  165. /* read oob, but discard it */
  166. for (i = 0; i < 7; i++)
  167. readw(docptr + 0x103c);
  168. readw(docptr + DOCG4_OOB_6_7);
  169. readw(docptr + DOCG4_OOB_6_7);
  170. writew(0, docptr + DOC_DATAEND);
  171. write_nop(docptr);
  172. write_nop(docptr);
  173. if (!(g4_index & 0x100)) {
  174. /* not redundant subpage read; check for ecc error */
  175. write_nop(docptr);
  176. flash_status = readw(docptr + DOC_ECCCONF1);
  177. flash_status = readw(docptr + DOC_ECCCONF1);
  178. if (flash_status & 0x80) { /* ecc error */
  179. g4_index += 0x108; /* read redundant subpage */
  180. buf -= 256; /* back up ram ptr */
  181. continue;
  182. } else /* no ecc error */
  183. g4_index += 0x210; /* skip redundant subpage */
  184. } else /* redundant page was just read; skip ecc error check */
  185. g4_index += 0x108;
  186. if (g4_index == 0x420) { /* finished with 2k page */
  187. g4_index = 0;
  188. g4_page += 2; /* odd-numbered 2k pages skipped */
  189. }
  190. } while (g4_page != last_g4_page); /* while still on same block */
  191. return 0;
  192. }