serial_sh.c 4.1 KB

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  1. /*
  2. * SuperH SCIF device driver.
  3. * Copyright (C) 2013 Renesas Electronics Corporation
  4. * Copyright (C) 2007,2008,2010 Nobuhiro Iwamatsu
  5. * Copyright (C) 2002 - 2008 Paul Mundt
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include <common.h>
  10. #include <asm/io.h>
  11. #include <asm/processor.h>
  12. #include "serial_sh.h"
  13. #include <serial.h>
  14. #include <linux/compiler.h>
  15. #if defined(CONFIG_CONS_SCIF0)
  16. # define SCIF_BASE SCIF0_BASE
  17. #elif defined(CONFIG_CONS_SCIF1)
  18. # define SCIF_BASE SCIF1_BASE
  19. #elif defined(CONFIG_CONS_SCIF2)
  20. # define SCIF_BASE SCIF2_BASE
  21. #elif defined(CONFIG_CONS_SCIF3)
  22. # define SCIF_BASE SCIF3_BASE
  23. #elif defined(CONFIG_CONS_SCIF4)
  24. # define SCIF_BASE SCIF4_BASE
  25. #elif defined(CONFIG_CONS_SCIF5)
  26. # define SCIF_BASE SCIF5_BASE
  27. #elif defined(CONFIG_CONS_SCIF6)
  28. # define SCIF_BASE SCIF6_BASE
  29. #elif defined(CONFIG_CONS_SCIF7)
  30. # define SCIF_BASE SCIF7_BASE
  31. #else
  32. # error "Default SCIF doesn't set....."
  33. #endif
  34. #if defined(CONFIG_SCIF_A)
  35. #define SCIF_BASE_PORT PORT_SCIFA
  36. #else
  37. #define SCIF_BASE_PORT PORT_SCIF
  38. #endif
  39. static struct uart_port sh_sci = {
  40. .membase = (unsigned char*)SCIF_BASE,
  41. .mapbase = SCIF_BASE,
  42. .type = SCIF_BASE_PORT,
  43. };
  44. static void sh_serial_setbrg(void)
  45. {
  46. DECLARE_GLOBAL_DATA_PTR;
  47. sci_out(&sh_sci, SCBRR,
  48. SCBRR_VALUE(gd->baudrate, CONFIG_SH_SCIF_CLK_FREQ));
  49. }
  50. static int sh_serial_init(void)
  51. {
  52. sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci));
  53. sci_out(&sh_sci, SCSCR , SCSCR_INIT(&sh_sci));
  54. sci_out(&sh_sci, SCSMR, 0);
  55. sci_out(&sh_sci, SCSMR, 0);
  56. sci_out(&sh_sci, SCFCR, SCFCR_RFRST|SCFCR_TFRST);
  57. sci_in(&sh_sci, SCFCR);
  58. sci_out(&sh_sci, SCFCR, 0);
  59. serial_setbrg();
  60. return 0;
  61. }
  62. #if defined(CONFIG_CPU_SH7760) || \
  63. defined(CONFIG_CPU_SH7780) || \
  64. defined(CONFIG_CPU_SH7785) || \
  65. defined(CONFIG_CPU_SH7786)
  66. static int scif_rxfill(struct uart_port *port)
  67. {
  68. return sci_in(port, SCRFDR) & 0xff;
  69. }
  70. #elif defined(CONFIG_CPU_SH7763)
  71. static int scif_rxfill(struct uart_port *port)
  72. {
  73. if ((port->mapbase == 0xffe00000) ||
  74. (port->mapbase == 0xffe08000)) {
  75. /* SCIF0/1*/
  76. return sci_in(port, SCRFDR) & 0xff;
  77. } else {
  78. /* SCIF2 */
  79. return sci_in(port, SCFDR) & SCIF2_RFDC_MASK;
  80. }
  81. }
  82. #elif defined(CONFIG_ARCH_SH7372)
  83. static int scif_rxfill(struct uart_port *port)
  84. {
  85. if (port->type == PORT_SCIFA)
  86. return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
  87. else
  88. return sci_in(port, SCRFDR);
  89. }
  90. #else
  91. static int scif_rxfill(struct uart_port *port)
  92. {
  93. return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
  94. }
  95. #endif
  96. static int serial_rx_fifo_level(void)
  97. {
  98. return scif_rxfill(&sh_sci);
  99. }
  100. static void handle_error(void)
  101. {
  102. sci_in(&sh_sci, SCxSR);
  103. sci_out(&sh_sci, SCxSR, SCxSR_ERROR_CLEAR(&sh_sci));
  104. sci_in(&sh_sci, SCLSR);
  105. sci_out(&sh_sci, SCLSR, 0x00);
  106. }
  107. void serial_raw_putc(const char c)
  108. {
  109. while (1) {
  110. /* Tx fifo is empty */
  111. if (sci_in(&sh_sci, SCxSR) & SCxSR_TEND(&sh_sci))
  112. break;
  113. }
  114. sci_out(&sh_sci, SCxTDR, c);
  115. sci_out(&sh_sci, SCxSR, sci_in(&sh_sci, SCxSR) & ~SCxSR_TEND(&sh_sci));
  116. }
  117. static void sh_serial_putc(const char c)
  118. {
  119. if (c == '\n')
  120. serial_raw_putc('\r');
  121. serial_raw_putc(c);
  122. }
  123. static int sh_serial_tstc(void)
  124. {
  125. if (sci_in(&sh_sci, SCxSR) & SCIF_ERRORS) {
  126. handle_error();
  127. return 0;
  128. }
  129. return serial_rx_fifo_level() ? 1 : 0;
  130. }
  131. int serial_getc_check(void)
  132. {
  133. unsigned short status;
  134. status = sci_in(&sh_sci, SCxSR);
  135. if (status & SCIF_ERRORS)
  136. handle_error();
  137. if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci))
  138. handle_error();
  139. return status & (SCIF_DR | SCxSR_RDxF(&sh_sci));
  140. }
  141. static int sh_serial_getc(void)
  142. {
  143. unsigned short status;
  144. char ch;
  145. while (!serial_getc_check())
  146. ;
  147. ch = sci_in(&sh_sci, SCxRDR);
  148. status = sci_in(&sh_sci, SCxSR);
  149. sci_out(&sh_sci, SCxSR, SCxSR_RDxF_CLEAR(&sh_sci));
  150. if (status & SCIF_ERRORS)
  151. handle_error();
  152. if (sci_in(&sh_sci, SCLSR) & SCxSR_ORER(&sh_sci))
  153. handle_error();
  154. return ch;
  155. }
  156. static struct serial_device sh_serial_drv = {
  157. .name = "sh_serial",
  158. .start = sh_serial_init,
  159. .stop = NULL,
  160. .setbrg = sh_serial_setbrg,
  161. .putc = sh_serial_putc,
  162. .puts = default_serial_puts,
  163. .getc = sh_serial_getc,
  164. .tstc = sh_serial_tstc,
  165. };
  166. void sh_serial_initialize(void)
  167. {
  168. serial_register(&sh_serial_drv);
  169. }
  170. __weak struct serial_device *default_serial_console(void)
  171. {
  172. return &sh_serial_drv;
  173. }