fsl_secure_boot.h 4.3 KB

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  1. /*
  2. * Copyright 2015 Freescale Semiconductor, Inc.
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #ifndef __FSL_SECURE_BOOT_H
  7. #define __FSL_SECURE_BOOT_H
  8. #ifdef CONFIG_CHAIN_OF_TRUST
  9. #define CONFIG_FSL_SEC_MON
  10. #ifdef CONFIG_SPL_BUILD
  11. /*
  12. * Define the key hash for U-Boot here if public/private key pair used to
  13. * sign U-boot are different from the SRK hash put in the fuse
  14. * Example of defining KEY_HASH is
  15. * #define CONFIG_SPL_UBOOT_KEY_HASH \
  16. * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
  17. * else leave it defined as NULL
  18. */
  19. #define CONFIG_SPL_UBOOT_KEY_HASH NULL
  20. #endif /* ifdef CONFIG_SPL_BUILD */
  21. #define CONFIG_KEY_REVOCATION
  22. #ifndef CONFIG_SPL_BUILD
  23. #ifndef CONFIG_SYS_RAMBOOT
  24. /* The key used for verification of next level images
  25. * is picked up from an Extension Table which has
  26. * been verified by the ISBC (Internal Secure boot Code)
  27. * in boot ROM of the SoC.
  28. * The feature is only applicable in case of NOR boot and is
  29. * not applicable in case of RAMBOOT (NAND, SD, SPI).
  30. * For LS, this feature is available for all device if IE Table
  31. * is copied to XIP memory
  32. * Also, for LS, ISBC doesn't verify this table.
  33. */
  34. #define CONFIG_FSL_ISBC_KEY_EXT
  35. #endif
  36. #if defined(CONFIG_FSL_LAYERSCAPE)
  37. /*
  38. * For fsl layerscape based platforms, ESBC image Address in Header
  39. * is 64 bit.
  40. */
  41. #define CONFIG_ESBC_ADDR_64BIT
  42. #endif
  43. #ifdef CONFIG_ARCH_LS2080A
  44. #define CONFIG_EXTRA_ENV \
  45. "setenv fdt_high 0xa0000000;" \
  46. "setenv initrd_high 0xcfffffff;" \
  47. "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
  48. #else
  49. #define CONFIG_EXTRA_ENV \
  50. "setenv fdt_high 0xffffffff;" \
  51. "setenv initrd_high 0xffffffff;" \
  52. "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
  53. #endif
  54. /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
  55. * Non-XIP Memory (Nand/SD)*/
  56. #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \
  57. defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT)
  58. #define CONFIG_BOOTSCRIPT_COPY_RAM
  59. #endif
  60. /* The address needs to be modified according to NOR, NAND, SD and
  61. * DDR memory map
  62. */
  63. #ifdef CONFIG_FSL_LSCH3
  64. #define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000
  65. #define CONFIG_BS_ADDR_DEVICE 0x580e00000
  66. #define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000
  67. #define CONFIG_BS_ADDR_RAM 0xa0e00000
  68. #define CONFIG_BS_HDR_SIZE 0x00002000
  69. #define CONFIG_BS_SIZE 0x00001000
  70. #else
  71. #ifdef CONFIG_SD_BOOT
  72. /* For SD boot address and size are assigned in terms of sector
  73. * offset and no. of sectors respectively.
  74. */
  75. #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A)
  76. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920
  77. #else
  78. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900
  79. #endif
  80. #define CONFIG_BS_ADDR_DEVICE 0x00000940
  81. #define CONFIG_BS_HDR_SIZE 0x00000010
  82. #define CONFIG_BS_SIZE 0x00000008
  83. #elif defined(CONFIG_NAND_BOOT)
  84. #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000
  85. #define CONFIG_BS_ADDR_DEVICE 0x00802000
  86. #define CONFIG_BS_HDR_SIZE 0x00002000
  87. #define CONFIG_BS_SIZE 0x00001000
  88. #elif defined(CONFIG_QSPI_BOOT)
  89. #ifdef CONFIG_ARCH_LS1046A
  90. #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000
  91. #define CONFIG_BS_ADDR_DEVICE 0x40800000
  92. #elif defined(CONFIG_ARCH_LS1012A)
  93. #define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000
  94. #define CONFIG_BS_ADDR_DEVICE 0x40060000
  95. #else
  96. #error "Platform not supported"
  97. #endif
  98. #define CONFIG_BS_HDR_SIZE 0x00002000
  99. #define CONFIG_BS_SIZE 0x00001000
  100. #else /* Default NOR Boot */
  101. #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
  102. #define CONFIG_BS_ADDR_DEVICE 0x60060000
  103. #define CONFIG_BS_HDR_SIZE 0x00002000
  104. #define CONFIG_BS_SIZE 0x00001000
  105. #endif
  106. #define CONFIG_BS_HDR_ADDR_RAM 0x81000000
  107. #define CONFIG_BS_ADDR_RAM 0x81020000
  108. #endif
  109. #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
  110. #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
  111. #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
  112. #else
  113. #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
  114. /* BOOTSCRIPT_ADDR is not required */
  115. #endif
  116. #ifdef CONFIG_FSL_LS_PPA
  117. /* Define the key hash here if SRK used for signing PPA image is
  118. * different from SRK hash put in SFP used for U-Boot.
  119. * Example
  120. * #define PPA_KEY_HASH \
  121. * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
  122. */
  123. #define PPA_KEY_HASH NULL
  124. #endif /* ifdef CONFIG_FSL_LS_PPA */
  125. #include <config_fsl_chain_trust.h>
  126. #endif /* #ifndef CONFIG_SPL_BUILD */
  127. #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
  128. #endif