taihu.c 4.3 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * (C) Copyright 2005-2007
  6. * Beijing UD Technology Co., Ltd., taihusupport@amcc.com
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <command.h>
  28. #include <asm/processor.h>
  29. #include <asm/io.h>
  30. #include <spi.h>
  31. #include <netdev.h>
  32. #include <asm/gpio.h>
  33. extern int lcd_init(void);
  34. /*
  35. * board_early_init_f
  36. */
  37. int board_early_init_f(void)
  38. {
  39. lcd_init();
  40. mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
  41. mtdcr(UIC0ER, 0x00000000); /* disable all ints */
  42. mtdcr(UIC0CR, 0x00000000);
  43. mtdcr(UIC0PR, 0xFFFF7F00); /* set int polarities */
  44. mtdcr(UIC0TR, 0x00000000); /* set int trigger levels */
  45. mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
  46. mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority */
  47. mtebc(PB3AP, CONFIG_SYS_EBC_PB3AP); /* memory bank 3 (CPLD_LCM) initialization */
  48. mtebc(PB3CR, CONFIG_SYS_EBC_PB3CR);
  49. /*
  50. * Configure CPC0_PCI to enable PerWE as output
  51. * and enable the internal PCI arbiter
  52. */
  53. mtdcr(CPC0_PCI, CPC0_PCI_SPE | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
  54. return 0;
  55. }
  56. /*
  57. * Check Board Identity:
  58. */
  59. int checkboard(void)
  60. {
  61. char *s = getenv("serial#");
  62. puts("Board: Taihu - AMCC PPC405EP Evaluation Board");
  63. if (s != NULL) {
  64. puts(", serial# ");
  65. puts(s);
  66. }
  67. putc('\n');
  68. return 0;
  69. }
  70. static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char * const argv[])
  71. {
  72. char stat;
  73. int i;
  74. stat = in_8((u8 *) CPLD_REG0_ADDR);
  75. printf("SW2 status: ");
  76. for (i=0; i<4; i++) /* 4-position */
  77. printf("%d:%s ", i, stat & (0x08 >> i)?"on":"off");
  78. printf("\n");
  79. return 0;
  80. }
  81. U_BOOT_CMD (
  82. sw2_stat, 1, 1, do_sw_stat,
  83. "show status of switch 2",
  84. ""
  85. );
  86. static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char * const argv[])
  87. {
  88. int led_no;
  89. if (argc != 3) {
  90. cmd_usage(cmd_tp);
  91. return -1;
  92. }
  93. led_no = simple_strtoul(argv[1], NULL, 16);
  94. if (led_no != 1 && led_no != 2) {
  95. cmd_usage(cmd_tp);
  96. return -1;
  97. }
  98. if (strcmp(argv[2],"off") == 0x0) {
  99. if (led_no == 1)
  100. gpio_write_bit(30, 1);
  101. else
  102. gpio_write_bit(31, 1);
  103. } else if (strcmp(argv[2],"on") == 0x0) {
  104. if (led_no == 1)
  105. gpio_write_bit(30, 0);
  106. else
  107. gpio_write_bit(31, 0);
  108. } else {
  109. cmd_usage(cmd_tp);
  110. return -1;
  111. }
  112. return 0;
  113. }
  114. U_BOOT_CMD (
  115. led_ctl, 3, 1, do_led_ctl,
  116. "make led 1 or 2 on or off",
  117. "<led_no> <on/off> - make led <led_no> on/off,\n"
  118. "\tled_no is 1 or 2"
  119. );
  120. #define SPI_CS_GPIO0 0
  121. #define SPI_SCLK_GPIO14 14
  122. #define SPI_DIN_GPIO15 15
  123. #define SPI_DOUT_GPIO16 16
  124. void spi_scl(int bit)
  125. {
  126. gpio_write_bit(SPI_SCLK_GPIO14, bit);
  127. }
  128. void spi_sda(int bit)
  129. {
  130. gpio_write_bit(SPI_DOUT_GPIO16, bit);
  131. }
  132. unsigned char spi_read(void)
  133. {
  134. return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15);
  135. }
  136. int spi_cs_is_valid(unsigned int bus, unsigned int cs)
  137. {
  138. return bus == 0 && cs == 0;
  139. }
  140. void spi_cs_activate(struct spi_slave *slave)
  141. {
  142. gpio_write_bit(SPI_CS_GPIO0, 1);
  143. }
  144. void spi_cs_deactivate(struct spi_slave *slave)
  145. {
  146. gpio_write_bit(SPI_CS_GPIO0, 0);
  147. }
  148. #ifdef CONFIG_PCI
  149. static unsigned char int_lines[32] = {
  150. 29, 30, 27, 28, 29, 30, 25, 27,
  151. 29, 30, 27, 28, 29, 30, 27, 28,
  152. 29, 30, 27, 28, 29, 30, 27, 28,
  153. 29, 30, 27, 28, 29, 30, 27, 28};
  154. static void taihu_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
  155. {
  156. unsigned char int_line = int_lines[PCI_DEV(dev) & 31];
  157. pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
  158. }
  159. int pci_pre_init(struct pci_controller *hose)
  160. {
  161. hose->fixup_irq = taihu_pci_fixup_irq;
  162. return 1;
  163. }
  164. #endif /* CONFIG_PCI */
  165. int board_eth_init(bd_t *bis)
  166. {
  167. cpu_eth_init(bis);
  168. return pci_eth_init(bis);
  169. }