hardware.h 2.9 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com>
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #ifndef _ASM_ARCH_HARDWARE_H
  24. #define _ASM_ARCH_HARDWARE_H
  25. #define CONFIG_SYS_USBD_BASE 0xE1100000
  26. #define CONFIG_SYS_PLUG_BASE 0xE1200000
  27. #define CONFIG_SYS_FIFO_BASE 0xE1000800
  28. #define CONFIG_SYS_SMI_BASE 0xFC000000
  29. #define CONFIG_SPEAR_SYSCNTLBASE 0xFCA00000
  30. #define CONFIG_SPEAR_TIMERBASE 0xFC800000
  31. #define CONFIG_SPEAR_MISCBASE 0xFCA80000
  32. #define CONFIG_SPEAR_ETHBASE 0xE0800000
  33. #define CONFIG_SPEAR_MPMCBASE 0xFC600000
  34. #define CONFIG_SSP1_BASE 0xD0100000
  35. #define CONFIG_SSP2_BASE 0xD0180000
  36. #define CONFIG_SSP3_BASE 0xD8180000
  37. #define CONFIG_GPIO_BASE 0xD8100000
  38. #define CONFIG_SYS_NAND_CLE (1 << 16)
  39. #define CONFIG_SYS_NAND_ALE (1 << 17)
  40. #if defined(CONFIG_SPEAR600)
  41. #define CONFIG_SYS_I2C_BASE 0xD0200000
  42. #define CONFIG_SYS_FSMC_BASE 0xD1800000
  43. #define CONFIG_FSMC_NAND_BASE 0xD2000000
  44. #define CONFIG_SPEAR_BOOTSTRAPCFG 0xFCA80000
  45. #define CONFIG_SPEAR_BOOTSTRAPSHFT 16
  46. #define CONFIG_SPEAR_BOOTSTRAPMASK 0xB
  47. #define CONFIG_SPEAR_ONLYSNORBOOT 0xA
  48. #define CONFIG_SPEAR_NORNANDBOOT 0xB
  49. #define CONFIG_SPEAR_NORNAND8BOOT 0x8
  50. #define CONFIG_SPEAR_NORNAND16BOOT 0x9
  51. #define CONFIG_SPEAR_USBBOOT 0x8
  52. #define CONFIG_SPEAR_MPMCREGS 100
  53. #elif defined(CONFIG_SPEAR300)
  54. #define CONFIG_SYS_I2C_BASE 0xD0180000
  55. #define CONFIG_SYS_FSMC_BASE 0x94000000
  56. #elif defined(CONFIG_SPEAR310)
  57. #define CONFIG_SYS_I2C_BASE 0xD0180000
  58. #define CONFIG_SYS_FSMC_BASE 0x44000000
  59. #undef CONFIG_SYS_NAND_CLE
  60. #undef CONFIG_SYS_NAND_ALE
  61. #define CONFIG_SYS_NAND_CLE (1 << 17)
  62. #define CONFIG_SYS_NAND_ALE (1 << 16)
  63. #define CONFIG_SPEAR_EMIBASE 0x4F000000
  64. #define CONFIG_SPEAR_RASBASE 0xB4000000
  65. #define CONFIG_SYS_MACB0_BASE 0xB0000000
  66. #define CONFIG_SYS_MACB1_BASE 0xB0800000
  67. #define CONFIG_SYS_MACB2_BASE 0xB1000000
  68. #define CONFIG_SYS_MACB3_BASE 0xB1800000
  69. #elif defined(CONFIG_SPEAR320)
  70. #define CONFIG_SYS_I2C_BASE 0xD0180000
  71. #define CONFIG_SYS_FSMC_BASE 0x4C000000
  72. #define CONFIG_SPEAR_EMIBASE 0x40000000
  73. #define CONFIG_SPEAR_RASBASE 0xB3000000
  74. #define CONFIG_SYS_MACB0_BASE 0xAA000000
  75. #endif
  76. #endif /* _ASM_ARCH_HARDWARE_H */