phy.c 21 KB

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  1. /*
  2. * Generic PHY Management code
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * Copyright 2011 Freescale Semiconductor, Inc.
  7. * author Andy Fleming
  8. *
  9. * Based loosely off of Linux's PHY Lib
  10. */
  11. #include <config.h>
  12. #include <common.h>
  13. #include <console.h>
  14. #include <dm.h>
  15. #include <malloc.h>
  16. #include <net.h>
  17. #include <command.h>
  18. #include <miiphy.h>
  19. #include <phy.h>
  20. #include <errno.h>
  21. #include <linux/err.h>
  22. #include <linux/compiler.h>
  23. DECLARE_GLOBAL_DATA_PTR;
  24. /* Generic PHY support and helper functions */
  25. /**
  26. * genphy_config_advert - sanitize and advertise auto-negotation parameters
  27. * @phydev: target phy_device struct
  28. *
  29. * Description: Writes MII_ADVERTISE with the appropriate values,
  30. * after sanitizing the values to make sure we only advertise
  31. * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
  32. * hasn't changed, and > 0 if it has changed.
  33. */
  34. static int genphy_config_advert(struct phy_device *phydev)
  35. {
  36. u32 advertise;
  37. int oldadv, adv, bmsr;
  38. int err, changed = 0;
  39. /* Only allow advertising what this PHY supports */
  40. phydev->advertising &= phydev->supported;
  41. advertise = phydev->advertising;
  42. /* Setup standard advertisement */
  43. adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  44. oldadv = adv;
  45. if (adv < 0)
  46. return adv;
  47. adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  48. ADVERTISE_PAUSE_ASYM);
  49. if (advertise & ADVERTISED_10baseT_Half)
  50. adv |= ADVERTISE_10HALF;
  51. if (advertise & ADVERTISED_10baseT_Full)
  52. adv |= ADVERTISE_10FULL;
  53. if (advertise & ADVERTISED_100baseT_Half)
  54. adv |= ADVERTISE_100HALF;
  55. if (advertise & ADVERTISED_100baseT_Full)
  56. adv |= ADVERTISE_100FULL;
  57. if (advertise & ADVERTISED_Pause)
  58. adv |= ADVERTISE_PAUSE_CAP;
  59. if (advertise & ADVERTISED_Asym_Pause)
  60. adv |= ADVERTISE_PAUSE_ASYM;
  61. if (advertise & ADVERTISED_1000baseX_Half)
  62. adv |= ADVERTISE_1000XHALF;
  63. if (advertise & ADVERTISED_1000baseX_Full)
  64. adv |= ADVERTISE_1000XFULL;
  65. if (adv != oldadv) {
  66. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  67. if (err < 0)
  68. return err;
  69. changed = 1;
  70. }
  71. bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  72. if (bmsr < 0)
  73. return bmsr;
  74. /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
  75. * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
  76. * logical 1.
  77. */
  78. if (!(bmsr & BMSR_ESTATEN))
  79. return changed;
  80. /* Configure gigabit if it's supported */
  81. adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  82. oldadv = adv;
  83. if (adv < 0)
  84. return adv;
  85. adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  86. if (phydev->supported & (SUPPORTED_1000baseT_Half |
  87. SUPPORTED_1000baseT_Full)) {
  88. if (advertise & SUPPORTED_1000baseT_Half)
  89. adv |= ADVERTISE_1000HALF;
  90. if (advertise & SUPPORTED_1000baseT_Full)
  91. adv |= ADVERTISE_1000FULL;
  92. }
  93. if (adv != oldadv)
  94. changed = 1;
  95. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
  96. if (err < 0)
  97. return err;
  98. return changed;
  99. }
  100. /**
  101. * genphy_setup_forced - configures/forces speed/duplex from @phydev
  102. * @phydev: target phy_device struct
  103. *
  104. * Description: Configures MII_BMCR to force speed/duplex
  105. * to the values in phydev. Assumes that the values are valid.
  106. */
  107. static int genphy_setup_forced(struct phy_device *phydev)
  108. {
  109. int err;
  110. int ctl = BMCR_ANRESTART;
  111. phydev->pause = phydev->asym_pause = 0;
  112. if (SPEED_1000 == phydev->speed)
  113. ctl |= BMCR_SPEED1000;
  114. else if (SPEED_100 == phydev->speed)
  115. ctl |= BMCR_SPEED100;
  116. if (DUPLEX_FULL == phydev->duplex)
  117. ctl |= BMCR_FULLDPLX;
  118. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  119. return err;
  120. }
  121. /**
  122. * genphy_restart_aneg - Enable and Restart Autonegotiation
  123. * @phydev: target phy_device struct
  124. */
  125. int genphy_restart_aneg(struct phy_device *phydev)
  126. {
  127. int ctl;
  128. ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  129. if (ctl < 0)
  130. return ctl;
  131. ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
  132. /* Don't isolate the PHY if we're negotiating */
  133. ctl &= ~(BMCR_ISOLATE);
  134. ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  135. return ctl;
  136. }
  137. /**
  138. * genphy_config_aneg - restart auto-negotiation or write BMCR
  139. * @phydev: target phy_device struct
  140. *
  141. * Description: If auto-negotiation is enabled, we configure the
  142. * advertising, and then restart auto-negotiation. If it is not
  143. * enabled, then we write the BMCR.
  144. */
  145. int genphy_config_aneg(struct phy_device *phydev)
  146. {
  147. int result;
  148. if (AUTONEG_ENABLE != phydev->autoneg)
  149. return genphy_setup_forced(phydev);
  150. result = genphy_config_advert(phydev);
  151. if (result < 0) /* error */
  152. return result;
  153. if (result == 0) {
  154. /* Advertisment hasn't changed, but maybe aneg was never on to
  155. * begin with? Or maybe phy was isolated? */
  156. int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  157. if (ctl < 0)
  158. return ctl;
  159. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  160. result = 1; /* do restart aneg */
  161. }
  162. /* Only restart aneg if we are advertising something different
  163. * than we were before. */
  164. if (result > 0)
  165. result = genphy_restart_aneg(phydev);
  166. return result;
  167. }
  168. /**
  169. * genphy_update_link - update link status in @phydev
  170. * @phydev: target phy_device struct
  171. *
  172. * Description: Update the value in phydev->link to reflect the
  173. * current link value. In order to do this, we need to read
  174. * the status register twice, keeping the second value.
  175. */
  176. int genphy_update_link(struct phy_device *phydev)
  177. {
  178. unsigned int mii_reg;
  179. /*
  180. * Wait if the link is up, and autonegotiation is in progress
  181. * (ie - we're capable and it's not done)
  182. */
  183. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  184. /*
  185. * If we already saw the link up, and it hasn't gone down, then
  186. * we don't need to wait for autoneg again
  187. */
  188. if (phydev->link && mii_reg & BMSR_LSTATUS)
  189. return 0;
  190. if ((phydev->autoneg == AUTONEG_ENABLE) &&
  191. !(mii_reg & BMSR_ANEGCOMPLETE)) {
  192. int i = 0;
  193. printf("%s Waiting for PHY auto negotiation to complete",
  194. phydev->dev->name);
  195. while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
  196. /*
  197. * Timeout reached ?
  198. */
  199. if (i > PHY_ANEG_TIMEOUT) {
  200. printf(" TIMEOUT !\n");
  201. phydev->link = 0;
  202. return -ETIMEDOUT;
  203. }
  204. if (ctrlc()) {
  205. puts("user interrupt!\n");
  206. phydev->link = 0;
  207. return -EINTR;
  208. }
  209. if ((i++ % 500) == 0)
  210. printf(".");
  211. udelay(1000); /* 1 ms */
  212. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  213. }
  214. printf(" done\n");
  215. phydev->link = 1;
  216. } else {
  217. /* Read the link a second time to clear the latched state */
  218. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  219. if (mii_reg & BMSR_LSTATUS)
  220. phydev->link = 1;
  221. else
  222. phydev->link = 0;
  223. }
  224. return 0;
  225. }
  226. /*
  227. * Generic function which updates the speed and duplex. If
  228. * autonegotiation is enabled, it uses the AND of the link
  229. * partner's advertised capabilities and our advertised
  230. * capabilities. If autonegotiation is disabled, we use the
  231. * appropriate bits in the control register.
  232. *
  233. * Stolen from Linux's mii.c and phy_device.c
  234. */
  235. int genphy_parse_link(struct phy_device *phydev)
  236. {
  237. int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  238. /* We're using autonegotiation */
  239. if (phydev->autoneg == AUTONEG_ENABLE) {
  240. u32 lpa = 0;
  241. int gblpa = 0;
  242. u32 estatus = 0;
  243. /* Check for gigabit capability */
  244. if (phydev->supported & (SUPPORTED_1000baseT_Full |
  245. SUPPORTED_1000baseT_Half)) {
  246. /* We want a list of states supported by
  247. * both PHYs in the link
  248. */
  249. gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
  250. if (gblpa < 0) {
  251. debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
  252. gblpa = 0;
  253. }
  254. gblpa &= phy_read(phydev,
  255. MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
  256. }
  257. /* Set the baseline so we only have to set them
  258. * if they're different
  259. */
  260. phydev->speed = SPEED_10;
  261. phydev->duplex = DUPLEX_HALF;
  262. /* Check the gigabit fields */
  263. if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
  264. phydev->speed = SPEED_1000;
  265. if (gblpa & PHY_1000BTSR_1000FD)
  266. phydev->duplex = DUPLEX_FULL;
  267. /* We're done! */
  268. return 0;
  269. }
  270. lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  271. lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
  272. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  273. phydev->speed = SPEED_100;
  274. if (lpa & LPA_100FULL)
  275. phydev->duplex = DUPLEX_FULL;
  276. } else if (lpa & LPA_10FULL)
  277. phydev->duplex = DUPLEX_FULL;
  278. /*
  279. * Extended status may indicate that the PHY supports
  280. * 1000BASE-T/X even though the 1000BASE-T registers
  281. * are missing. In this case we can't tell whether the
  282. * peer also supports it, so we only check extended
  283. * status if the 1000BASE-T registers are actually
  284. * missing.
  285. */
  286. if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
  287. estatus = phy_read(phydev, MDIO_DEVAD_NONE,
  288. MII_ESTATUS);
  289. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
  290. ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
  291. phydev->speed = SPEED_1000;
  292. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
  293. phydev->duplex = DUPLEX_FULL;
  294. }
  295. } else {
  296. u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  297. phydev->speed = SPEED_10;
  298. phydev->duplex = DUPLEX_HALF;
  299. if (bmcr & BMCR_FULLDPLX)
  300. phydev->duplex = DUPLEX_FULL;
  301. if (bmcr & BMCR_SPEED1000)
  302. phydev->speed = SPEED_1000;
  303. else if (bmcr & BMCR_SPEED100)
  304. phydev->speed = SPEED_100;
  305. }
  306. return 0;
  307. }
  308. int genphy_config(struct phy_device *phydev)
  309. {
  310. int val;
  311. u32 features;
  312. features = (SUPPORTED_TP | SUPPORTED_MII
  313. | SUPPORTED_AUI | SUPPORTED_FIBRE |
  314. SUPPORTED_BNC);
  315. /* Do we support autonegotiation? */
  316. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  317. if (val < 0)
  318. return val;
  319. if (val & BMSR_ANEGCAPABLE)
  320. features |= SUPPORTED_Autoneg;
  321. if (val & BMSR_100FULL)
  322. features |= SUPPORTED_100baseT_Full;
  323. if (val & BMSR_100HALF)
  324. features |= SUPPORTED_100baseT_Half;
  325. if (val & BMSR_10FULL)
  326. features |= SUPPORTED_10baseT_Full;
  327. if (val & BMSR_10HALF)
  328. features |= SUPPORTED_10baseT_Half;
  329. if (val & BMSR_ESTATEN) {
  330. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
  331. if (val < 0)
  332. return val;
  333. if (val & ESTATUS_1000_TFULL)
  334. features |= SUPPORTED_1000baseT_Full;
  335. if (val & ESTATUS_1000_THALF)
  336. features |= SUPPORTED_1000baseT_Half;
  337. if (val & ESTATUS_1000_XFULL)
  338. features |= SUPPORTED_1000baseX_Full;
  339. if (val & ESTATUS_1000_XHALF)
  340. features |= SUPPORTED_1000baseX_Half;
  341. }
  342. phydev->supported &= features;
  343. phydev->advertising &= features;
  344. genphy_config_aneg(phydev);
  345. return 0;
  346. }
  347. int genphy_startup(struct phy_device *phydev)
  348. {
  349. int ret;
  350. ret = genphy_update_link(phydev);
  351. if (ret)
  352. return ret;
  353. return genphy_parse_link(phydev);
  354. }
  355. int genphy_shutdown(struct phy_device *phydev)
  356. {
  357. return 0;
  358. }
  359. static struct phy_driver genphy_driver = {
  360. .uid = 0xffffffff,
  361. .mask = 0xffffffff,
  362. .name = "Generic PHY",
  363. .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
  364. SUPPORTED_AUI | SUPPORTED_FIBRE |
  365. SUPPORTED_BNC,
  366. .config = genphy_config,
  367. .startup = genphy_startup,
  368. .shutdown = genphy_shutdown,
  369. };
  370. static LIST_HEAD(phy_drivers);
  371. int phy_init(void)
  372. {
  373. #ifdef CONFIG_MV88E61XX_SWITCH
  374. phy_mv88e61xx_init();
  375. #endif
  376. #ifdef CONFIG_PHY_AQUANTIA
  377. phy_aquantia_init();
  378. #endif
  379. #ifdef CONFIG_PHY_ATHEROS
  380. phy_atheros_init();
  381. #endif
  382. #ifdef CONFIG_PHY_BROADCOM
  383. phy_broadcom_init();
  384. #endif
  385. #ifdef CONFIG_PHY_CORTINA
  386. phy_cortina_init();
  387. #endif
  388. #ifdef CONFIG_PHY_DAVICOM
  389. phy_davicom_init();
  390. #endif
  391. #ifdef CONFIG_PHY_ET1011C
  392. phy_et1011c_init();
  393. #endif
  394. #ifdef CONFIG_PHY_LXT
  395. phy_lxt_init();
  396. #endif
  397. #ifdef CONFIG_PHY_MARVELL
  398. phy_marvell_init();
  399. #endif
  400. #ifdef CONFIG_PHY_MICREL
  401. phy_micrel_init();
  402. #endif
  403. #ifdef CONFIG_PHY_NATSEMI
  404. phy_natsemi_init();
  405. #endif
  406. #ifdef CONFIG_PHY_REALTEK
  407. phy_realtek_init();
  408. #endif
  409. #ifdef CONFIG_PHY_SMSC
  410. phy_smsc_init();
  411. #endif
  412. #ifdef CONFIG_PHY_TERANETICS
  413. phy_teranetics_init();
  414. #endif
  415. #ifdef CONFIG_PHY_TI
  416. phy_ti_init();
  417. #endif
  418. #ifdef CONFIG_PHY_VITESSE
  419. phy_vitesse_init();
  420. #endif
  421. #ifdef CONFIG_PHY_XILINX
  422. phy_xilinx_init();
  423. #endif
  424. #ifdef CONFIG_PHY_MSCC
  425. phy_mscc_init();
  426. #endif
  427. #ifdef CONFIG_PHY_FIXED
  428. phy_fixed_init();
  429. #endif
  430. return 0;
  431. }
  432. int phy_register(struct phy_driver *drv)
  433. {
  434. INIT_LIST_HEAD(&drv->list);
  435. list_add_tail(&drv->list, &phy_drivers);
  436. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  437. if (drv->probe)
  438. drv->probe += gd->reloc_off;
  439. if (drv->config)
  440. drv->config += gd->reloc_off;
  441. if (drv->startup)
  442. drv->startup += gd->reloc_off;
  443. if (drv->shutdown)
  444. drv->shutdown += gd->reloc_off;
  445. if (drv->readext)
  446. drv->readext += gd->reloc_off;
  447. if (drv->writeext)
  448. drv->writeext += gd->reloc_off;
  449. #endif
  450. return 0;
  451. }
  452. int phy_set_supported(struct phy_device *phydev, u32 max_speed)
  453. {
  454. /* The default values for phydev->supported are provided by the PHY
  455. * driver "features" member, we want to reset to sane defaults first
  456. * before supporting higher speeds.
  457. */
  458. phydev->supported &= PHY_DEFAULT_FEATURES;
  459. switch (max_speed) {
  460. default:
  461. return -ENOTSUPP;
  462. case SPEED_1000:
  463. phydev->supported |= PHY_1000BT_FEATURES;
  464. /* fall through */
  465. case SPEED_100:
  466. phydev->supported |= PHY_100BT_FEATURES;
  467. /* fall through */
  468. case SPEED_10:
  469. phydev->supported |= PHY_10BT_FEATURES;
  470. }
  471. return 0;
  472. }
  473. static int phy_probe(struct phy_device *phydev)
  474. {
  475. int err = 0;
  476. phydev->advertising = phydev->supported = phydev->drv->features;
  477. phydev->mmds = phydev->drv->mmds;
  478. if (phydev->drv->probe)
  479. err = phydev->drv->probe(phydev);
  480. return err;
  481. }
  482. static struct phy_driver *generic_for_interface(phy_interface_t interface)
  483. {
  484. #ifdef CONFIG_PHYLIB_10G
  485. if (is_10g_interface(interface))
  486. return &gen10g_driver;
  487. #endif
  488. return &genphy_driver;
  489. }
  490. static struct phy_driver *get_phy_driver(struct phy_device *phydev,
  491. phy_interface_t interface)
  492. {
  493. struct list_head *entry;
  494. int phy_id = phydev->phy_id;
  495. struct phy_driver *drv = NULL;
  496. list_for_each(entry, &phy_drivers) {
  497. drv = list_entry(entry, struct phy_driver, list);
  498. if ((drv->uid & drv->mask) == (phy_id & drv->mask))
  499. return drv;
  500. }
  501. /* If we made it here, there's no driver for this PHY */
  502. return generic_for_interface(interface);
  503. }
  504. static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
  505. u32 phy_id,
  506. phy_interface_t interface)
  507. {
  508. struct phy_device *dev;
  509. /* We allocate the device, and initialize the
  510. * default values */
  511. dev = malloc(sizeof(*dev));
  512. if (!dev) {
  513. printf("Failed to allocate PHY device for %s:%d\n",
  514. bus->name, addr);
  515. return NULL;
  516. }
  517. memset(dev, 0, sizeof(*dev));
  518. dev->duplex = -1;
  519. dev->link = 0;
  520. dev->interface = interface;
  521. dev->autoneg = AUTONEG_ENABLE;
  522. dev->addr = addr;
  523. dev->phy_id = phy_id;
  524. dev->bus = bus;
  525. dev->drv = get_phy_driver(dev, interface);
  526. phy_probe(dev);
  527. bus->phymap[addr] = dev;
  528. return dev;
  529. }
  530. /**
  531. * get_phy_id - reads the specified addr for its ID.
  532. * @bus: the target MII bus
  533. * @addr: PHY address on the MII bus
  534. * @phy_id: where to store the ID retrieved.
  535. *
  536. * Description: Reads the ID registers of the PHY at @addr on the
  537. * @bus, stores it in @phy_id and returns zero on success.
  538. */
  539. int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
  540. {
  541. int phy_reg;
  542. /* Grab the bits from PHYIR1, and put them
  543. * in the upper half */
  544. phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
  545. if (phy_reg < 0)
  546. return -EIO;
  547. *phy_id = (phy_reg & 0xffff) << 16;
  548. /* Grab the bits from PHYIR2, and put them in the lower half */
  549. phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
  550. if (phy_reg < 0)
  551. return -EIO;
  552. *phy_id |= (phy_reg & 0xffff);
  553. return 0;
  554. }
  555. static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
  556. unsigned phy_mask, int devad, phy_interface_t interface)
  557. {
  558. u32 phy_id = 0xffffffff;
  559. while (phy_mask) {
  560. int addr = ffs(phy_mask) - 1;
  561. int r = get_phy_id(bus, addr, devad, &phy_id);
  562. /* If the PHY ID is mostly f's, we didn't find anything */
  563. if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
  564. return phy_device_create(bus, addr, phy_id, interface);
  565. phy_mask &= ~(1 << addr);
  566. }
  567. return NULL;
  568. }
  569. static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
  570. unsigned phy_mask, phy_interface_t interface)
  571. {
  572. /* If we have one, return the existing device, with new interface */
  573. while (phy_mask) {
  574. int addr = ffs(phy_mask) - 1;
  575. if (bus->phymap[addr]) {
  576. bus->phymap[addr]->interface = interface;
  577. return bus->phymap[addr];
  578. }
  579. phy_mask &= ~(1 << addr);
  580. }
  581. return NULL;
  582. }
  583. static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
  584. unsigned phy_mask, phy_interface_t interface)
  585. {
  586. int i;
  587. struct phy_device *phydev;
  588. phydev = search_for_existing_phy(bus, phy_mask, interface);
  589. if (phydev)
  590. return phydev;
  591. /* Try Standard (ie Clause 22) access */
  592. /* Otherwise we have to try Clause 45 */
  593. for (i = 0; i < 5; i++) {
  594. phydev = create_phy_by_mask(bus, phy_mask,
  595. i ? i : MDIO_DEVAD_NONE, interface);
  596. if (IS_ERR(phydev))
  597. return NULL;
  598. if (phydev)
  599. return phydev;
  600. }
  601. debug("\n%s PHY: ", bus->name);
  602. while (phy_mask) {
  603. int addr = ffs(phy_mask) - 1;
  604. debug("%d ", addr);
  605. phy_mask &= ~(1 << addr);
  606. }
  607. debug("not found\n");
  608. return NULL;
  609. }
  610. /**
  611. * get_phy_device - reads the specified PHY device and returns its @phy_device struct
  612. * @bus: the target MII bus
  613. * @addr: PHY address on the MII bus
  614. *
  615. * Description: Reads the ID registers of the PHY at @addr on the
  616. * @bus, then allocates and returns the phy_device to represent it.
  617. */
  618. static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
  619. phy_interface_t interface)
  620. {
  621. return get_phy_device_by_mask(bus, 1 << addr, interface);
  622. }
  623. int phy_reset(struct phy_device *phydev)
  624. {
  625. int reg;
  626. int timeout = 500;
  627. int devad = MDIO_DEVAD_NONE;
  628. if (phydev->flags & PHY_FLAG_BROKEN_RESET)
  629. return 0;
  630. #ifdef CONFIG_PHYLIB_10G
  631. /* If it's 10G, we need to issue reset through one of the MMDs */
  632. if (is_10g_interface(phydev->interface)) {
  633. if (!phydev->mmds)
  634. gen10g_discover_mmds(phydev);
  635. devad = ffs(phydev->mmds) - 1;
  636. }
  637. #endif
  638. if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
  639. debug("PHY reset failed\n");
  640. return -1;
  641. }
  642. #ifdef CONFIG_PHY_RESET_DELAY
  643. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  644. #endif
  645. /*
  646. * Poll the control register for the reset bit to go to 0 (it is
  647. * auto-clearing). This should happen within 0.5 seconds per the
  648. * IEEE spec.
  649. */
  650. reg = phy_read(phydev, devad, MII_BMCR);
  651. while ((reg & BMCR_RESET) && timeout--) {
  652. reg = phy_read(phydev, devad, MII_BMCR);
  653. if (reg < 0) {
  654. debug("PHY status read failed\n");
  655. return -1;
  656. }
  657. udelay(1000);
  658. }
  659. if (reg & BMCR_RESET) {
  660. puts("PHY reset timed out\n");
  661. return -1;
  662. }
  663. return 0;
  664. }
  665. int miiphy_reset(const char *devname, unsigned char addr)
  666. {
  667. struct mii_dev *bus = miiphy_get_dev_by_name(devname);
  668. struct phy_device *phydev;
  669. /*
  670. * miiphy_reset was only used on standard PHYs, so we'll fake it here.
  671. * If later code tries to connect with the right interface, this will
  672. * be corrected by get_phy_device in phy_connect()
  673. */
  674. phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
  675. return phy_reset(phydev);
  676. }
  677. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  678. phy_interface_t interface)
  679. {
  680. /* Reset the bus */
  681. if (bus->reset) {
  682. bus->reset(bus);
  683. /* Wait 15ms to make sure the PHY has come out of hard reset */
  684. udelay(15000);
  685. }
  686. return get_phy_device_by_mask(bus, phy_mask, interface);
  687. }
  688. #ifdef CONFIG_DM_ETH
  689. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
  690. #else
  691. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
  692. #endif
  693. {
  694. /* Soft Reset the PHY */
  695. phy_reset(phydev);
  696. if (phydev->dev && phydev->dev != dev) {
  697. printf("%s:%d is connected to %s. Reconnecting to %s\n",
  698. phydev->bus->name, phydev->addr,
  699. phydev->dev->name, dev->name);
  700. }
  701. phydev->dev = dev;
  702. debug("%s connected to %s\n", dev->name, phydev->drv->name);
  703. }
  704. #ifdef CONFIG_DM_ETH
  705. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  706. struct udevice *dev, phy_interface_t interface)
  707. #else
  708. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  709. struct eth_device *dev, phy_interface_t interface)
  710. #endif
  711. {
  712. struct phy_device *phydev = NULL;
  713. #ifdef CONFIG_PHY_FIXED
  714. int sn;
  715. const char *name;
  716. sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
  717. while (sn > 0) {
  718. name = fdt_get_name(gd->fdt_blob, sn, NULL);
  719. if (name != NULL && strcmp(name, "fixed-link") == 0) {
  720. phydev = phy_device_create(bus,
  721. sn, PHY_FIXED_ID, interface);
  722. break;
  723. }
  724. sn = fdt_next_subnode(gd->fdt_blob, sn);
  725. }
  726. #endif
  727. if (phydev == NULL)
  728. phydev = phy_find_by_mask(bus, 1 << addr, interface);
  729. if (phydev)
  730. phy_connect_dev(phydev, dev);
  731. else
  732. printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
  733. return phydev;
  734. }
  735. /*
  736. * Start the PHY. Returns 0 on success, or a negative error code.
  737. */
  738. int phy_startup(struct phy_device *phydev)
  739. {
  740. if (phydev->drv->startup)
  741. return phydev->drv->startup(phydev);
  742. return 0;
  743. }
  744. __weak int board_phy_config(struct phy_device *phydev)
  745. {
  746. if (phydev->drv->config)
  747. return phydev->drv->config(phydev);
  748. return 0;
  749. }
  750. int phy_config(struct phy_device *phydev)
  751. {
  752. /* Invoke an optional board-specific helper */
  753. return board_phy_config(phydev);
  754. }
  755. int phy_shutdown(struct phy_device *phydev)
  756. {
  757. if (phydev->drv->shutdown)
  758. phydev->drv->shutdown(phydev);
  759. return 0;
  760. }
  761. int phy_get_interface_by_name(const char *str)
  762. {
  763. int i;
  764. for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
  765. if (!strcmp(str, phy_interface_strings[i]))
  766. return i;
  767. }
  768. return -1;
  769. }