sf_ops.c 10 KB

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  1. /*
  2. * SPI flash operations
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
  6. * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #include <common.h>
  11. #include <errno.h>
  12. #include <malloc.h>
  13. #include <spi.h>
  14. #include <spi_flash.h>
  15. #include <watchdog.h>
  16. #include <linux/compiler.h>
  17. #include "sf_internal.h"
  18. static void spi_flash_addr(u32 addr, u8 *cmd)
  19. {
  20. /* cmd[0] is actual command */
  21. cmd[1] = addr >> 16;
  22. cmd[2] = addr >> 8;
  23. cmd[3] = addr >> 0;
  24. }
  25. int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs)
  26. {
  27. int ret;
  28. u8 cmd;
  29. cmd = CMD_READ_STATUS;
  30. ret = spi_flash_read_common(flash, &cmd, 1, rs, 1);
  31. if (ret < 0) {
  32. debug("SF: fail to read status register\n");
  33. return ret;
  34. }
  35. return 0;
  36. }
  37. int spi_flash_cmd_write_status(struct spi_flash *flash, u8 ws)
  38. {
  39. u8 cmd;
  40. int ret;
  41. cmd = CMD_WRITE_STATUS;
  42. ret = spi_flash_write_common(flash, &cmd, 1, &ws, 1);
  43. if (ret < 0) {
  44. debug("SF: fail to write status register\n");
  45. return ret;
  46. }
  47. return 0;
  48. }
  49. #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  50. int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc)
  51. {
  52. int ret;
  53. u8 cmd;
  54. cmd = CMD_READ_CONFIG;
  55. ret = spi_flash_read_common(flash, &cmd, 1, rc, 1);
  56. if (ret < 0) {
  57. debug("SF: fail to read config register\n");
  58. return ret;
  59. }
  60. return 0;
  61. }
  62. int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc)
  63. {
  64. u8 data[2];
  65. u8 cmd;
  66. int ret;
  67. ret = spi_flash_cmd_read_status(flash, &data[0]);
  68. if (ret < 0)
  69. return ret;
  70. cmd = CMD_WRITE_STATUS;
  71. data[1] = wc;
  72. ret = spi_flash_write_common(flash, &cmd, 1, &data, 2);
  73. if (ret) {
  74. debug("SF: fail to write config register\n");
  75. return ret;
  76. }
  77. return 0;
  78. }
  79. #endif
  80. #ifdef CONFIG_SPI_FLASH_BAR
  81. static int spi_flash_write_bank(struct spi_flash *flash, u32 offset)
  82. {
  83. u8 cmd, bank_sel;
  84. int ret;
  85. bank_sel = offset / (SPI_FLASH_16MB_BOUN << flash->shift);
  86. if (bank_sel == flash->bank_curr)
  87. goto bar_end;
  88. cmd = flash->bank_write_cmd;
  89. ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
  90. if (ret < 0) {
  91. debug("SF: fail to write bank register\n");
  92. return ret;
  93. }
  94. bar_end:
  95. flash->bank_curr = bank_sel;
  96. return flash->bank_curr;
  97. }
  98. #endif
  99. #ifdef CONFIG_SF_DUAL_FLASH
  100. static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr)
  101. {
  102. switch (flash->dual_flash) {
  103. case SF_DUAL_STACKED_FLASH:
  104. if (*addr >= (flash->size >> 1)) {
  105. *addr -= flash->size >> 1;
  106. flash->spi->flags |= SPI_XFER_U_PAGE;
  107. } else {
  108. flash->spi->flags &= ~SPI_XFER_U_PAGE;
  109. }
  110. break;
  111. case SF_DUAL_PARALLEL_FLASH:
  112. *addr >>= flash->shift;
  113. break;
  114. default:
  115. debug("SF: Unsupported dual_flash=%d\n", flash->dual_flash);
  116. break;
  117. }
  118. }
  119. #endif
  120. int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
  121. {
  122. u8 sr;
  123. int timebase, ret;
  124. timebase = get_timer(0);
  125. while (get_timer(timebase) < timeout) {
  126. ret = spi_flash_cmd_read_status(flash, &sr);
  127. if (ret < 0)
  128. return ret;
  129. if (!(sr & STATUS_WIP))
  130. return 0;
  131. else
  132. break;
  133. }
  134. printf("SF: Timeout!\n");
  135. return -ETIMEDOUT;
  136. }
  137. int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
  138. size_t cmd_len, const void *buf, size_t buf_len)
  139. {
  140. struct spi_slave *spi = flash->spi;
  141. unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
  142. int ret;
  143. if (buf == NULL)
  144. timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
  145. ret = spi_claim_bus(flash->spi);
  146. if (ret) {
  147. debug("SF: unable to claim SPI bus\n");
  148. return ret;
  149. }
  150. ret = spi_flash_cmd_write_enable(flash);
  151. if (ret < 0) {
  152. debug("SF: enabling write failed\n");
  153. return ret;
  154. }
  155. ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
  156. if (ret < 0) {
  157. debug("SF: write cmd failed\n");
  158. return ret;
  159. }
  160. ret = spi_flash_cmd_wait_ready(flash, timeout);
  161. if (ret < 0) {
  162. debug("SF: write %s timed out\n",
  163. timeout == SPI_FLASH_PROG_TIMEOUT ?
  164. "program" : "page erase");
  165. return ret;
  166. }
  167. spi_release_bus(spi);
  168. return ret;
  169. }
  170. int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len)
  171. {
  172. u32 erase_size, erase_addr;
  173. u8 cmd[SPI_FLASH_CMD_LEN];
  174. int ret = -1;
  175. erase_size = flash->erase_size;
  176. if (offset % erase_size || len % erase_size) {
  177. debug("SF: Erase offset/length not multiple of erase size\n");
  178. return -1;
  179. }
  180. cmd[0] = flash->erase_cmd;
  181. while (len) {
  182. erase_addr = offset;
  183. #ifdef CONFIG_SF_DUAL_FLASH
  184. if (flash->dual_flash > SF_SINGLE_FLASH)
  185. spi_flash_dual_flash(flash, &erase_addr);
  186. #endif
  187. #ifdef CONFIG_SPI_FLASH_BAR
  188. ret = spi_flash_write_bank(flash, erase_addr);
  189. if (ret < 0)
  190. return ret;
  191. #endif
  192. spi_flash_addr(erase_addr, cmd);
  193. debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
  194. cmd[2], cmd[3], erase_addr);
  195. ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
  196. if (ret < 0) {
  197. debug("SF: erase failed\n");
  198. break;
  199. }
  200. offset += erase_size;
  201. len -= erase_size;
  202. }
  203. return ret;
  204. }
  205. int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset,
  206. size_t len, const void *buf)
  207. {
  208. unsigned long byte_addr, page_size;
  209. u32 write_addr;
  210. size_t chunk_len, actual;
  211. u8 cmd[SPI_FLASH_CMD_LEN];
  212. int ret = -1;
  213. page_size = flash->page_size;
  214. cmd[0] = flash->write_cmd;
  215. for (actual = 0; actual < len; actual += chunk_len) {
  216. write_addr = offset;
  217. #ifdef CONFIG_SF_DUAL_FLASH
  218. if (flash->dual_flash > SF_SINGLE_FLASH)
  219. spi_flash_dual_flash(flash, &write_addr);
  220. #endif
  221. #ifdef CONFIG_SPI_FLASH_BAR
  222. ret = spi_flash_write_bank(flash, write_addr);
  223. if (ret < 0)
  224. return ret;
  225. #endif
  226. byte_addr = offset % page_size;
  227. chunk_len = min(len - actual, (size_t)(page_size - byte_addr));
  228. if (flash->spi->max_write_size)
  229. chunk_len = min(chunk_len,
  230. (size_t)flash->spi->max_write_size);
  231. spi_flash_addr(write_addr, cmd);
  232. debug("SF: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
  233. buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
  234. ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
  235. buf + actual, chunk_len);
  236. if (ret < 0) {
  237. debug("SF: write failed\n");
  238. break;
  239. }
  240. offset += chunk_len;
  241. }
  242. return ret;
  243. }
  244. int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
  245. size_t cmd_len, void *data, size_t data_len)
  246. {
  247. struct spi_slave *spi = flash->spi;
  248. int ret;
  249. ret = spi_claim_bus(flash->spi);
  250. if (ret) {
  251. debug("SF: unable to claim SPI bus\n");
  252. return ret;
  253. }
  254. ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
  255. if (ret < 0) {
  256. debug("SF: read cmd failed\n");
  257. return ret;
  258. }
  259. spi_release_bus(spi);
  260. return ret;
  261. }
  262. void __weak spi_flash_copy_mmap(void *data, void *offset, size_t len)
  263. {
  264. memcpy(data, offset, len);
  265. }
  266. int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset,
  267. size_t len, void *data)
  268. {
  269. u8 *cmd, cmdsz;
  270. u32 remain_len, read_len, read_addr;
  271. int bank_sel = 0;
  272. int ret = -1;
  273. /* Handle memory-mapped SPI */
  274. if (flash->memory_map) {
  275. ret = spi_claim_bus(flash->spi);
  276. if (ret) {
  277. debug("SF: unable to claim SPI bus\n");
  278. return ret;
  279. }
  280. spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP);
  281. spi_flash_copy_mmap(data, flash->memory_map + offset, len);
  282. spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END);
  283. spi_release_bus(flash->spi);
  284. return 0;
  285. }
  286. cmdsz = SPI_FLASH_CMD_LEN + flash->dummy_byte;
  287. cmd = calloc(1, cmdsz);
  288. if (!cmd) {
  289. debug("SF: Failed to allocate cmd\n");
  290. return -ENOMEM;
  291. }
  292. cmd[0] = flash->read_cmd;
  293. while (len) {
  294. read_addr = offset;
  295. #ifdef CONFIG_SF_DUAL_FLASH
  296. if (flash->dual_flash > SF_SINGLE_FLASH)
  297. spi_flash_dual_flash(flash, &read_addr);
  298. #endif
  299. #ifdef CONFIG_SPI_FLASH_BAR
  300. ret = spi_flash_write_bank(flash, read_addr);
  301. if (ret < 0)
  302. return ret;
  303. bank_sel = flash->bank_curr;
  304. #endif
  305. remain_len = ((SPI_FLASH_16MB_BOUN << flash->shift) *
  306. (bank_sel + 1)) - offset;
  307. if (len < remain_len)
  308. read_len = len;
  309. else
  310. read_len = remain_len;
  311. spi_flash_addr(read_addr, cmd);
  312. ret = spi_flash_read_common(flash, cmd, cmdsz, data, read_len);
  313. if (ret < 0) {
  314. debug("SF: read failed\n");
  315. break;
  316. }
  317. offset += read_len;
  318. len -= read_len;
  319. data += read_len;
  320. }
  321. free(cmd);
  322. return ret;
  323. }
  324. #ifdef CONFIG_SPI_FLASH_SST
  325. static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf)
  326. {
  327. int ret;
  328. u8 cmd[4] = {
  329. CMD_SST_BP,
  330. offset >> 16,
  331. offset >> 8,
  332. offset,
  333. };
  334. debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
  335. spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset);
  336. ret = spi_flash_cmd_write_enable(flash);
  337. if (ret)
  338. return ret;
  339. ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1);
  340. if (ret)
  341. return ret;
  342. return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
  343. }
  344. int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
  345. const void *buf)
  346. {
  347. size_t actual, cmd_len;
  348. int ret;
  349. u8 cmd[4];
  350. ret = spi_claim_bus(flash->spi);
  351. if (ret) {
  352. debug("SF: Unable to claim SPI bus\n");
  353. return ret;
  354. }
  355. /* If the data is not word aligned, write out leading single byte */
  356. actual = offset % 2;
  357. if (actual) {
  358. ret = sst_byte_write(flash, offset, buf);
  359. if (ret)
  360. goto done;
  361. }
  362. offset += actual;
  363. ret = spi_flash_cmd_write_enable(flash);
  364. if (ret)
  365. goto done;
  366. cmd_len = 4;
  367. cmd[0] = CMD_SST_AAI_WP;
  368. cmd[1] = offset >> 16;
  369. cmd[2] = offset >> 8;
  370. cmd[3] = offset;
  371. for (; actual < len - 1; actual += 2) {
  372. debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n",
  373. spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual,
  374. cmd[0], offset);
  375. ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len,
  376. buf + actual, 2);
  377. if (ret) {
  378. debug("SF: sst word program failed\n");
  379. break;
  380. }
  381. ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
  382. if (ret)
  383. break;
  384. cmd_len = 1;
  385. offset += 2;
  386. }
  387. if (!ret)
  388. ret = spi_flash_cmd_write_disable(flash);
  389. /* If there is a single trailing byte, write it out */
  390. if (!ret && actual != len)
  391. ret = sst_byte_write(flash, offset, buf + actual);
  392. done:
  393. debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
  394. ret ? "failure" : "success", len, offset - actual);
  395. spi_release_bus(flash->spi);
  396. return ret;
  397. }
  398. int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
  399. const void *buf)
  400. {
  401. size_t actual;
  402. int ret;
  403. ret = spi_claim_bus(flash->spi);
  404. if (ret) {
  405. debug("SF: Unable to claim SPI bus\n");
  406. return ret;
  407. }
  408. for (actual = 0; actual < len; actual++) {
  409. ret = sst_byte_write(flash, offset, buf + actual);
  410. if (ret) {
  411. debug("SF: sst byte program failed\n");
  412. break;
  413. }
  414. offset++;
  415. }
  416. if (!ret)
  417. ret = spi_flash_cmd_write_disable(flash);
  418. debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
  419. ret ? "failure" : "success", len, offset - actual);
  420. spi_release_bus(flash->spi);
  421. return ret;
  422. }
  423. #endif