soft_i2c.c 9.9 KB

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  1. /*
  2. * (C) Copyright 2001, 2002
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
  24. * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
  25. * Neil Russell.
  26. */
  27. #include <common.h>
  28. #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
  29. #include <ioports.h>
  30. #include <asm/io.h>
  31. #endif
  32. #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
  33. #include <asm/io.h>
  34. #include <asm/arch/hardware.h>
  35. #endif
  36. #ifdef CONFIG_AT91SAM9263 /* only valid for AT91SAM9263 */
  37. #include <asm/arch/at91_pmc.h>
  38. #include <asm/arch/gpio.h>
  39. #include <asm/arch/io.h>
  40. #endif
  41. #ifdef CONFIG_IXP425 /* only valid for IXP425 */
  42. #include <asm/arch/ixp425.h>
  43. #endif
  44. #ifdef CONFIG_LPC2292
  45. #include <asm/arch/hardware.h>
  46. #endif
  47. #if defined(CONFIG_MPC852T) || defined(CONFIG_MPC866)
  48. #include <asm/io.h>
  49. #endif
  50. #include <i2c.h>
  51. /* #define DEBUG_I2C */
  52. #ifdef DEBUG_I2C
  53. DECLARE_GLOBAL_DATA_PTR;
  54. #endif
  55. /*-----------------------------------------------------------------------
  56. * Definitions
  57. */
  58. #define RETRIES 0
  59. #define I2C_ACK 0 /* PD_SDA level to ack a byte */
  60. #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
  61. #ifdef DEBUG_I2C
  62. #define PRINTD(fmt,args...) do { \
  63. if (gd->have_console) \
  64. printf (fmt ,##args); \
  65. } while (0)
  66. #else
  67. #define PRINTD(fmt,args...)
  68. #endif
  69. #if defined(CONFIG_I2C_MULTI_BUS)
  70. static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
  71. #endif /* CONFIG_I2C_MULTI_BUS */
  72. /*-----------------------------------------------------------------------
  73. * Local functions
  74. */
  75. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  76. static void send_reset (void);
  77. #endif
  78. static void send_start (void);
  79. static void send_stop (void);
  80. static void send_ack (int);
  81. static int write_byte (uchar byte);
  82. static uchar read_byte (int);
  83. #if !defined(CONFIG_SYS_I2C_INIT_BOARD)
  84. /*-----------------------------------------------------------------------
  85. * Send a reset sequence consisting of 9 clocks with the data signal high
  86. * to clock any confused device back into an idle state. Also send a
  87. * <stop> at the end of the sequence for belts & suspenders.
  88. */
  89. static void send_reset(void)
  90. {
  91. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  92. int j;
  93. I2C_SCL(1);
  94. I2C_SDA(1);
  95. #ifdef I2C_INIT
  96. I2C_INIT;
  97. #endif
  98. I2C_TRISTATE;
  99. for(j = 0; j < 9; j++) {
  100. I2C_SCL(0);
  101. I2C_DELAY;
  102. I2C_DELAY;
  103. I2C_SCL(1);
  104. I2C_DELAY;
  105. I2C_DELAY;
  106. }
  107. send_stop();
  108. I2C_TRISTATE;
  109. }
  110. #endif
  111. /*-----------------------------------------------------------------------
  112. * START: High -> Low on SDA while SCL is High
  113. */
  114. static void send_start(void)
  115. {
  116. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  117. I2C_DELAY;
  118. I2C_SDA(1);
  119. I2C_ACTIVE;
  120. I2C_DELAY;
  121. I2C_SCL(1);
  122. I2C_DELAY;
  123. I2C_SDA(0);
  124. I2C_DELAY;
  125. }
  126. /*-----------------------------------------------------------------------
  127. * STOP: Low -> High on SDA while SCL is High
  128. */
  129. static void send_stop(void)
  130. {
  131. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  132. I2C_SCL(0);
  133. I2C_DELAY;
  134. I2C_SDA(0);
  135. I2C_ACTIVE;
  136. I2C_DELAY;
  137. I2C_SCL(1);
  138. I2C_DELAY;
  139. I2C_SDA(1);
  140. I2C_DELAY;
  141. I2C_TRISTATE;
  142. }
  143. /*-----------------------------------------------------------------------
  144. * ack should be I2C_ACK or I2C_NOACK
  145. */
  146. static void send_ack(int ack)
  147. {
  148. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  149. I2C_SCL(0);
  150. I2C_DELAY;
  151. I2C_ACTIVE;
  152. I2C_SDA(ack);
  153. I2C_DELAY;
  154. I2C_SCL(1);
  155. I2C_DELAY;
  156. I2C_DELAY;
  157. I2C_SCL(0);
  158. I2C_DELAY;
  159. }
  160. /*-----------------------------------------------------------------------
  161. * Send 8 bits and look for an acknowledgement.
  162. */
  163. static int write_byte(uchar data)
  164. {
  165. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  166. int j;
  167. int nack;
  168. I2C_ACTIVE;
  169. for(j = 0; j < 8; j++) {
  170. I2C_SCL(0);
  171. I2C_DELAY;
  172. I2C_SDA(data & 0x80);
  173. I2C_DELAY;
  174. I2C_SCL(1);
  175. I2C_DELAY;
  176. I2C_DELAY;
  177. data <<= 1;
  178. }
  179. /*
  180. * Look for an <ACK>(negative logic) and return it.
  181. */
  182. I2C_SCL(0);
  183. I2C_DELAY;
  184. I2C_SDA(1);
  185. I2C_TRISTATE;
  186. I2C_DELAY;
  187. I2C_SCL(1);
  188. I2C_DELAY;
  189. I2C_DELAY;
  190. nack = I2C_READ;
  191. I2C_SCL(0);
  192. I2C_DELAY;
  193. I2C_ACTIVE;
  194. return(nack); /* not a nack is an ack */
  195. }
  196. #if defined(CONFIG_I2C_MULTI_BUS)
  197. /*
  198. * Functions for multiple I2C bus handling
  199. */
  200. unsigned int i2c_get_bus_num(void)
  201. {
  202. return i2c_bus_num;
  203. }
  204. int i2c_set_bus_num(unsigned int bus)
  205. {
  206. #if defined(CONFIG_I2C_MUX)
  207. if (bus < CONFIG_SYS_MAX_I2C_BUS) {
  208. i2c_bus_num = bus;
  209. } else {
  210. int ret;
  211. ret = i2x_mux_select_mux(bus);
  212. if (ret == 0)
  213. i2c_bus_num = bus;
  214. else
  215. return ret;
  216. }
  217. #else
  218. if (bus >= CONFIG_SYS_MAX_I2C_BUS)
  219. return -1;
  220. i2c_bus_num = bus;
  221. #endif
  222. return 0;
  223. }
  224. #endif
  225. /*-----------------------------------------------------------------------
  226. * if ack == I2C_ACK, ACK the byte so can continue reading, else
  227. * send I2C_NOACK to end the read.
  228. */
  229. static uchar read_byte(int ack)
  230. {
  231. I2C_SOFT_DECLARATIONS /* intentional without ';' */
  232. int data;
  233. int j;
  234. /*
  235. * Read 8 bits, MSB first.
  236. */
  237. I2C_TRISTATE;
  238. I2C_SDA(1);
  239. data = 0;
  240. for(j = 0; j < 8; j++) {
  241. I2C_SCL(0);
  242. I2C_DELAY;
  243. I2C_SCL(1);
  244. I2C_DELAY;
  245. data <<= 1;
  246. data |= I2C_READ;
  247. I2C_DELAY;
  248. }
  249. send_ack(ack);
  250. return(data);
  251. }
  252. /*=====================================================================*/
  253. /* Public Functions */
  254. /*=====================================================================*/
  255. /*-----------------------------------------------------------------------
  256. * Initialization
  257. */
  258. void i2c_init (int speed, int slaveaddr)
  259. {
  260. #if defined(CONFIG_SYS_I2C_INIT_BOARD)
  261. /* call board specific i2c bus reset routine before accessing the */
  262. /* environment, which might be in a chip on that bus. For details */
  263. /* about this problem see doc/I2C_Edge_Conditions. */
  264. i2c_init_board();
  265. #else
  266. /*
  267. * WARNING: Do NOT save speed in a static variable: if the
  268. * I2C routines are called before RAM is initialized (to read
  269. * the DIMM SPD, for instance), RAM won't be usable and your
  270. * system will crash.
  271. */
  272. send_reset ();
  273. #endif
  274. }
  275. /*-----------------------------------------------------------------------
  276. * Probe to see if a chip is present. Also good for checking for the
  277. * completion of EEPROM writes since the chip stops responding until
  278. * the write completes (typically 10mSec).
  279. */
  280. int i2c_probe(uchar addr)
  281. {
  282. int rc;
  283. /*
  284. * perform 1 byte write transaction with just address byte
  285. * (fake write)
  286. */
  287. send_start();
  288. rc = write_byte ((addr << 1) | 0);
  289. send_stop();
  290. return (rc ? 1 : 0);
  291. }
  292. /*-----------------------------------------------------------------------
  293. * Read bytes
  294. */
  295. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
  296. {
  297. int shift;
  298. PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
  299. chip, addr, alen, buffer, len);
  300. #ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
  301. /*
  302. * EEPROM chips that implement "address overflow" are ones
  303. * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
  304. * address and the extra bits end up in the "chip address"
  305. * bit slots. This makes a 24WC08 (1Kbyte) chip look like
  306. * four 256 byte chips.
  307. *
  308. * Note that we consider the length of the address field to
  309. * still be one byte because the extra address bits are
  310. * hidden in the chip address.
  311. */
  312. chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW);
  313. PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
  314. chip, addr);
  315. #endif
  316. /*
  317. * Do the addressing portion of a write cycle to set the
  318. * chip's address pointer. If the address length is zero,
  319. * don't do the normal write cycle to set the address pointer,
  320. * there is no address pointer in this chip.
  321. */
  322. send_start();
  323. if(alen > 0) {
  324. if(write_byte(chip << 1)) { /* write cycle */
  325. send_stop();
  326. PRINTD("i2c_read, no chip responded %02X\n", chip);
  327. return(1);
  328. }
  329. shift = (alen-1) * 8;
  330. while(alen-- > 0) {
  331. if(write_byte(addr >> shift)) {
  332. PRINTD("i2c_read, address not <ACK>ed\n");
  333. return(1);
  334. }
  335. shift -= 8;
  336. }
  337. /* Some I2C chips need a stop/start sequence here,
  338. * other chips don't work with a full stop and need
  339. * only a start. Default behaviour is to send the
  340. * stop/start sequence.
  341. */
  342. #ifdef CONFIG_SOFT_I2C_READ_REPEATED_START
  343. send_start();
  344. #else
  345. send_stop();
  346. send_start();
  347. #endif
  348. }
  349. /*
  350. * Send the chip address again, this time for a read cycle.
  351. * Then read the data. On the last byte, we do a NACK instead
  352. * of an ACK(len == 0) to terminate the read.
  353. */
  354. write_byte((chip << 1) | 1); /* read cycle */
  355. while(len-- > 0) {
  356. *buffer++ = read_byte(len == 0);
  357. }
  358. send_stop();
  359. return(0);
  360. }
  361. /*-----------------------------------------------------------------------
  362. * Write bytes
  363. */
  364. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
  365. {
  366. int shift, failures = 0;
  367. PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
  368. chip, addr, alen, buffer, len);
  369. send_start();
  370. if(write_byte(chip << 1)) { /* write cycle */
  371. send_stop();
  372. PRINTD("i2c_write, no chip responded %02X\n", chip);
  373. return(1);
  374. }
  375. shift = (alen-1) * 8;
  376. while(alen-- > 0) {
  377. if(write_byte(addr >> shift)) {
  378. PRINTD("i2c_write, address not <ACK>ed\n");
  379. return(1);
  380. }
  381. shift -= 8;
  382. }
  383. while(len-- > 0) {
  384. if(write_byte(*buffer++)) {
  385. failures++;
  386. }
  387. }
  388. send_stop();
  389. return(failures);
  390. }