fpga.c 2.5 KB

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  1. /*
  2. * (C) Copyright 2008 Dmitry Rakhchev, EmCraft Systems, rda@emcraft.com
  3. *
  4. * Developed for DENX Software Engineering GmbH
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22. * MA 02111-1307 USA
  23. */
  24. #include <common.h>
  25. /* This test performs testing of FPGA SCRATCH register,
  26. * gets FPGA version and run get_ram_size() on FPGA memory
  27. */
  28. #include <post.h>
  29. #include <asm/io.h>
  30. DECLARE_GLOBAL_DATA_PTR;
  31. #define FPGA_SCRATCH_REG 0xC4000050
  32. #define FPGA_VERSION_REG 0xC4000040
  33. #define FPGA_RAM_START 0xC4200000
  34. #define FPGA_RAM_END 0xC4203FFF
  35. #define FPGA_STAT 0xC400000C
  36. #if CONFIG_POST & CFG_POST_BSPEC3
  37. static int one_scratch_test(uint value)
  38. {
  39. uint read_value;
  40. int ret = 0;
  41. out_be32((void *)FPGA_SCRATCH_REG, value);
  42. /* read other location (protect against data lines capacity) */
  43. ret = in_be16((void *)FPGA_VERSION_REG);
  44. /* verify test pattern */
  45. read_value = in_be32((void *)FPGA_SCRATCH_REG);
  46. if (read_value != value) {
  47. post_log("FPGA SCRATCH test failed write %08X, read %08X\n",
  48. value, read_value);
  49. ret = 1;
  50. }
  51. return ret;
  52. }
  53. /* Verify FPGA, get version & memory size */
  54. int fpga_post_test(int flags)
  55. {
  56. uint old_value;
  57. ushort version;
  58. uint read_value;
  59. int ret = 0;
  60. post_log("\n");
  61. old_value = in_be32((void *)FPGA_SCRATCH_REG);
  62. if (one_scratch_test(0x55555555))
  63. ret = 1;
  64. if (one_scratch_test(0xAAAAAAAA))
  65. ret = 1;
  66. out_be32((void *)FPGA_SCRATCH_REG, old_value);
  67. version = in_be16((void *)FPGA_VERSION_REG);
  68. post_log("FPGA : version %u.%u\n",
  69. (version >> 8) & 0xFF, version & 0xFF);
  70. /* Enable write to FPGA RAM */
  71. out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
  72. read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
  73. post_log("FPGA RAM size: %d bytes\n", read_value);
  74. return ret;
  75. }
  76. #endif /* CONFIG_POST & CFG_POST_BSPEC3 */