serial_uniphier.c 3.4 KB

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  1. /*
  2. * Copyright (C) 2012-2015 Panasonic Corporation
  3. * Copyright (C) 2015-2016 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <linux/io.h>
  11. #include <linux/serial_reg.h>
  12. #include <linux/sizes.h>
  13. #include <linux/errno.h>
  14. #include <serial.h>
  15. #include <fdtdec.h>
  16. /*
  17. * Note: Register map is slightly different from that of 16550.
  18. */
  19. struct uniphier_serial {
  20. u32 rx; /* In: Receive buffer */
  21. #define tx rx /* Out: Transmit buffer */
  22. u32 ier; /* Interrupt Enable Register */
  23. u32 iir; /* In: Interrupt ID Register */
  24. u32 char_fcr; /* Charactor / FIFO Control Register */
  25. u32 lcr_mcr; /* Line/Modem Control Register */
  26. #define LCR_SHIFT 8
  27. #define LCR_MASK (0xff << (LCR_SHIFT))
  28. u32 lsr; /* In: Line Status Register */
  29. u32 msr; /* In: Modem Status Register */
  30. u32 __rsv0;
  31. u32 __rsv1;
  32. u32 dlr; /* Divisor Latch Register */
  33. };
  34. struct uniphier_serial_private_data {
  35. struct uniphier_serial __iomem *membase;
  36. unsigned int uartclk;
  37. };
  38. #define uniphier_serial_port(dev) \
  39. ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
  40. static int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
  41. {
  42. struct uniphier_serial_private_data *priv = dev_get_priv(dev);
  43. struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
  44. const unsigned int mode_x_div = 16;
  45. unsigned int divisor;
  46. divisor = DIV_ROUND_CLOSEST(priv->uartclk, mode_x_div * baudrate);
  47. writel(divisor, &port->dlr);
  48. return 0;
  49. }
  50. static int uniphier_serial_getc(struct udevice *dev)
  51. {
  52. struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
  53. if (!(readl(&port->lsr) & UART_LSR_DR))
  54. return -EAGAIN;
  55. return readl(&port->rx);
  56. }
  57. static int uniphier_serial_putc(struct udevice *dev, const char c)
  58. {
  59. struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
  60. if (!(readl(&port->lsr) & UART_LSR_THRE))
  61. return -EAGAIN;
  62. writel(c, &port->tx);
  63. return 0;
  64. }
  65. static int uniphier_serial_pending(struct udevice *dev, bool input)
  66. {
  67. struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
  68. if (input)
  69. return readl(&port->lsr) & UART_LSR_DR;
  70. else
  71. return !(readl(&port->lsr) & UART_LSR_THRE);
  72. }
  73. static int uniphier_serial_probe(struct udevice *dev)
  74. {
  75. DECLARE_GLOBAL_DATA_PTR;
  76. struct uniphier_serial_private_data *priv = dev_get_priv(dev);
  77. struct uniphier_serial __iomem *port;
  78. fdt_addr_t base;
  79. u32 tmp;
  80. base = devfdt_get_addr(dev);
  81. if (base == FDT_ADDR_T_NONE)
  82. return -EINVAL;
  83. port = devm_ioremap(dev, base, SZ_64);
  84. if (!port)
  85. return -ENOMEM;
  86. priv->membase = port;
  87. priv->uartclk = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
  88. "clock-frequency", 0);
  89. tmp = readl(&port->lcr_mcr);
  90. tmp &= ~LCR_MASK;
  91. tmp |= UART_LCR_WLEN8 << LCR_SHIFT;
  92. writel(tmp, &port->lcr_mcr);
  93. return 0;
  94. }
  95. static const struct udevice_id uniphier_uart_of_match[] = {
  96. { .compatible = "socionext,uniphier-uart" },
  97. { /* sentinel */ }
  98. };
  99. static const struct dm_serial_ops uniphier_serial_ops = {
  100. .setbrg = uniphier_serial_setbrg,
  101. .getc = uniphier_serial_getc,
  102. .putc = uniphier_serial_putc,
  103. .pending = uniphier_serial_pending,
  104. };
  105. U_BOOT_DRIVER(uniphier_serial) = {
  106. .name = "uniphier-uart",
  107. .id = UCLASS_SERIAL,
  108. .of_match = uniphier_uart_of_match,
  109. .probe = uniphier_serial_probe,
  110. .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
  111. .ops = &uniphier_serial_ops,
  112. };