ds1307.c 9.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383
  1. /*
  2. * (C) Copyright 2001, 2002, 2003
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. * Keith Outwater, keith_outwater@mvis.com`
  5. * Steven Scholz, steven.scholz@imc-berlin.de
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. /*
  10. * Date & Time support (no alarms) for Dallas Semiconductor (now Maxim)
  11. * DS1307 and DS1338/9 Real Time Clock (RTC).
  12. *
  13. * based on ds1337.c
  14. */
  15. #include <common.h>
  16. #include <command.h>
  17. #include <dm.h>
  18. #include <rtc.h>
  19. #include <i2c.h>
  20. enum ds_type {
  21. ds_1307,
  22. ds_1337,
  23. ds_1340,
  24. mcp794xx,
  25. };
  26. /*
  27. * RTC register addresses
  28. */
  29. #define RTC_SEC_REG_ADDR 0x00
  30. #define RTC_MIN_REG_ADDR 0x01
  31. #define RTC_HR_REG_ADDR 0x02
  32. #define RTC_DAY_REG_ADDR 0x03
  33. #define RTC_DATE_REG_ADDR 0x04
  34. #define RTC_MON_REG_ADDR 0x05
  35. #define RTC_YR_REG_ADDR 0x06
  36. #define RTC_CTL_REG_ADDR 0x07
  37. #define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
  38. #define RTC_CTL_BIT_RS0 0x01 /* Rate select 0 */
  39. #define RTC_CTL_BIT_RS1 0x02 /* Rate select 1 */
  40. #define RTC_CTL_BIT_SQWE 0x10 /* Square Wave Enable */
  41. #define RTC_CTL_BIT_OUT 0x80 /* Output Control */
  42. /* MCP7941X-specific bits */
  43. #define MCP7941X_BIT_ST 0x80
  44. #define MCP7941X_BIT_VBATEN 0x08
  45. #ifndef CONFIG_DM_RTC
  46. #if defined(CONFIG_CMD_DATE)
  47. /*---------------------------------------------------------------------*/
  48. #undef DEBUG_RTC
  49. #ifdef DEBUG_RTC
  50. #define DEBUGR(fmt, args...) printf(fmt, ##args)
  51. #else
  52. #define DEBUGR(fmt, args...)
  53. #endif
  54. /*---------------------------------------------------------------------*/
  55. #ifndef CONFIG_SYS_I2C_RTC_ADDR
  56. # define CONFIG_SYS_I2C_RTC_ADDR 0x68
  57. #endif
  58. #if defined(CONFIG_RTC_DS1307) && (CONFIG_SYS_I2C_SPEED > 100000)
  59. # error The DS1307 is specified only up to 100kHz!
  60. #endif
  61. static uchar rtc_read (uchar reg);
  62. static void rtc_write (uchar reg, uchar val);
  63. /*
  64. * Get the current time from the RTC
  65. */
  66. int rtc_get (struct rtc_time *tmp)
  67. {
  68. int rel = 0;
  69. uchar sec, min, hour, mday, wday, mon, year;
  70. #ifdef CONFIG_RTC_MCP79411
  71. read_rtc:
  72. #endif
  73. sec = rtc_read (RTC_SEC_REG_ADDR);
  74. min = rtc_read (RTC_MIN_REG_ADDR);
  75. hour = rtc_read (RTC_HR_REG_ADDR);
  76. wday = rtc_read (RTC_DAY_REG_ADDR);
  77. mday = rtc_read (RTC_DATE_REG_ADDR);
  78. mon = rtc_read (RTC_MON_REG_ADDR);
  79. year = rtc_read (RTC_YR_REG_ADDR);
  80. DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
  81. "hr: %02x min: %02x sec: %02x\n",
  82. year, mon, mday, wday, hour, min, sec);
  83. #ifdef CONFIG_RTC_DS1307
  84. if (sec & RTC_SEC_BIT_CH) {
  85. printf ("### Warning: RTC oscillator has stopped\n");
  86. /* clear the CH flag */
  87. rtc_write (RTC_SEC_REG_ADDR,
  88. rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH);
  89. rel = -1;
  90. }
  91. #endif
  92. #ifdef CONFIG_RTC_MCP79411
  93. /* make sure that the backup battery is enabled */
  94. if (!(wday & MCP7941X_BIT_VBATEN)) {
  95. rtc_write(RTC_DAY_REG_ADDR,
  96. wday | MCP7941X_BIT_VBATEN);
  97. }
  98. /* clock halted? turn it on, so clock can tick. */
  99. if (!(sec & MCP7941X_BIT_ST)) {
  100. rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST);
  101. printf("Started RTC\n");
  102. goto read_rtc;
  103. }
  104. #endif
  105. tmp->tm_sec = bcd2bin (sec & 0x7F);
  106. tmp->tm_min = bcd2bin (min & 0x7F);
  107. tmp->tm_hour = bcd2bin (hour & 0x3F);
  108. tmp->tm_mday = bcd2bin (mday & 0x3F);
  109. tmp->tm_mon = bcd2bin (mon & 0x1F);
  110. tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
  111. tmp->tm_wday = bcd2bin ((wday - 1) & 0x07);
  112. tmp->tm_yday = 0;
  113. tmp->tm_isdst= 0;
  114. DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  115. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  116. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  117. return rel;
  118. }
  119. /*
  120. * Set the RTC
  121. */
  122. int rtc_set (struct rtc_time *tmp)
  123. {
  124. DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  125. tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
  126. tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
  127. if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
  128. printf("WARNING: year should be between 1970 and 2069!\n");
  129. rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
  130. rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
  131. #ifdef CONFIG_RTC_MCP79411
  132. rtc_write (RTC_DAY_REG_ADDR,
  133. bin2bcd (tmp->tm_wday + 1) | MCP7941X_BIT_VBATEN);
  134. #else
  135. rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1));
  136. #endif
  137. rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
  138. rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
  139. rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
  140. #ifdef CONFIG_RTC_MCP79411
  141. rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST);
  142. #else
  143. rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
  144. #endif
  145. return 0;
  146. }
  147. /*
  148. * Reset the RTC. We setting the date back to 1970-01-01.
  149. * We also enable the oscillator output on the SQW/OUT pin and program
  150. * it for 32,768 Hz output. Note that according to the datasheet, turning
  151. * on the square wave output increases the current drain on the backup
  152. * battery to something between 480nA and 800nA.
  153. */
  154. void rtc_reset (void)
  155. {
  156. struct rtc_time tmp;
  157. rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
  158. rtc_write (RTC_CTL_REG_ADDR, RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 | RTC_CTL_BIT_RS0);
  159. tmp.tm_year = 1970;
  160. tmp.tm_mon = 1;
  161. tmp.tm_mday= 1;
  162. tmp.tm_hour = 0;
  163. tmp.tm_min = 0;
  164. tmp.tm_sec = 0;
  165. rtc_set(&tmp);
  166. printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
  167. tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
  168. tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
  169. return;
  170. }
  171. /*
  172. * Helper functions
  173. */
  174. static
  175. uchar rtc_read (uchar reg)
  176. {
  177. return (i2c_reg_read (CONFIG_SYS_I2C_RTC_ADDR, reg));
  178. }
  179. static void rtc_write (uchar reg, uchar val)
  180. {
  181. i2c_reg_write (CONFIG_SYS_I2C_RTC_ADDR, reg, val);
  182. }
  183. #endif /* CONFIG_CMD_DATE*/
  184. #endif /* !CONFIG_DM_RTC */
  185. #ifdef CONFIG_DM_RTC
  186. static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm)
  187. {
  188. int ret;
  189. uchar buf[7];
  190. enum ds_type type = dev_get_driver_data(dev);
  191. debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  192. tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
  193. tm->tm_hour, tm->tm_min, tm->tm_sec);
  194. if (tm->tm_year < 1970 || tm->tm_year > 2069)
  195. printf("WARNING: year should be between 1970 and 2069!\n");
  196. buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100);
  197. buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon);
  198. buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1);
  199. buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday);
  200. buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour);
  201. buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min);
  202. buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec);
  203. if (type == mcp794xx) {
  204. buf[RTC_DAY_REG_ADDR] |= MCP7941X_BIT_VBATEN;
  205. buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST;
  206. }
  207. ret = dm_i2c_write(dev, 0, buf, sizeof(buf));
  208. if (ret < 0)
  209. return ret;
  210. return 0;
  211. }
  212. static int ds1307_rtc_get(struct udevice *dev, struct rtc_time *tm)
  213. {
  214. int ret;
  215. uchar buf[7];
  216. enum ds_type type = dev_get_driver_data(dev);
  217. read_rtc:
  218. ret = dm_i2c_read(dev, 0, buf, sizeof(buf));
  219. if (ret < 0)
  220. return ret;
  221. if (type == ds_1307) {
  222. if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) {
  223. printf("### Warning: RTC oscillator has stopped\n");
  224. /* clear the CH flag */
  225. buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH;
  226. dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
  227. buf[RTC_SEC_REG_ADDR]);
  228. return -1;
  229. }
  230. }
  231. if (type == mcp794xx) {
  232. /* make sure that the backup battery is enabled */
  233. if (!(buf[RTC_DAY_REG_ADDR] & MCP7941X_BIT_VBATEN)) {
  234. dm_i2c_reg_write(dev, RTC_DAY_REG_ADDR,
  235. buf[RTC_DAY_REG_ADDR] |
  236. MCP7941X_BIT_VBATEN);
  237. }
  238. /* clock halted? turn it on, so clock can tick. */
  239. if (!(buf[RTC_SEC_REG_ADDR] & MCP7941X_BIT_ST)) {
  240. dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR,
  241. MCP7941X_BIT_ST);
  242. printf("Started RTC\n");
  243. goto read_rtc;
  244. }
  245. }
  246. tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F);
  247. tm->tm_min = bcd2bin(buf[RTC_MIN_REG_ADDR] & 0x7F);
  248. tm->tm_hour = bcd2bin(buf[RTC_HR_REG_ADDR] & 0x3F);
  249. tm->tm_mday = bcd2bin(buf[RTC_DATE_REG_ADDR] & 0x3F);
  250. tm->tm_mon = bcd2bin(buf[RTC_MON_REG_ADDR] & 0x1F);
  251. tm->tm_year = bcd2bin(buf[RTC_YR_REG_ADDR]) +
  252. (bcd2bin(buf[RTC_YR_REG_ADDR]) >= 70 ?
  253. 1900 : 2000);
  254. tm->tm_wday = bcd2bin((buf[RTC_DAY_REG_ADDR] - 1) & 0x07);
  255. tm->tm_yday = 0;
  256. tm->tm_isdst = 0;
  257. debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
  258. tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
  259. tm->tm_hour, tm->tm_min, tm->tm_sec);
  260. return 0;
  261. }
  262. static int ds1307_rtc_reset(struct udevice *dev)
  263. {
  264. int ret;
  265. struct rtc_time tmp = {
  266. .tm_year = 1970,
  267. .tm_mon = 1,
  268. .tm_mday = 1,
  269. .tm_hour = 0,
  270. .tm_min = 0,
  271. .tm_sec = 0,
  272. };
  273. /* clear Clock Halt */
  274. ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00);
  275. if (ret < 0)
  276. return ret;
  277. ret = dm_i2c_reg_write(dev, RTC_CTL_REG_ADDR,
  278. RTC_CTL_BIT_SQWE | RTC_CTL_BIT_RS1 |
  279. RTC_CTL_BIT_RS0);
  280. if (ret < 0)
  281. return ret;
  282. ret = ds1307_rtc_set(dev, &tmp);
  283. if (ret < 0)
  284. return ret;
  285. debug("RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
  286. tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
  287. tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
  288. return 0;
  289. }
  290. static int ds1307_probe(struct udevice *dev)
  291. {
  292. i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS |
  293. DM_I2C_CHIP_WR_ADDRESS);
  294. return 0;
  295. }
  296. static const struct rtc_ops ds1307_rtc_ops = {
  297. .get = ds1307_rtc_get,
  298. .set = ds1307_rtc_set,
  299. .reset = ds1307_rtc_reset,
  300. };
  301. static const struct udevice_id ds1307_rtc_ids[] = {
  302. { .compatible = "dallas,ds1307", .data = ds_1307 },
  303. { .compatible = "dallas,ds1337", .data = ds_1337 },
  304. { .compatible = "dallas,ds1340", .data = ds_1340 },
  305. { .compatible = "microchip,mcp7941x", .data = mcp794xx },
  306. { }
  307. };
  308. U_BOOT_DRIVER(rtc_ds1307) = {
  309. .name = "rtc-ds1307",
  310. .id = UCLASS_RTC,
  311. .probe = ds1307_probe,
  312. .of_match = ds1307_rtc_ids,
  313. .ops = &ds1307_rtc_ops,
  314. };
  315. #endif /* CONFIG_DM_RTC */