fsl_elbc_spl.c 4.1 KB

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  1. /*
  2. * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
  3. *
  4. * (C) Copyright 2006-2008
  5. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  6. *
  7. * Copyright (c) 2008 Freescale Semiconductor, Inc.
  8. * Author: Scott Wood <scottwood@freescale.com>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #include <common.h>
  13. #include <asm/io.h>
  14. #include <asm/fsl_lbc.h>
  15. #include <nand.h>
  16. #define WINDOW_SIZE 8192
  17. static void nand_wait(void)
  18. {
  19. fsl_lbc_t *regs = LBC_BASE_ADDR;
  20. for (;;) {
  21. uint32_t status = in_be32(&regs->ltesr);
  22. if (status == 1)
  23. return;
  24. if (status & 1) {
  25. puts("read failed (ltesr)\n");
  26. for (;;);
  27. }
  28. }
  29. }
  30. #ifdef CONFIG_TPL_BUILD
  31. int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
  32. #else
  33. static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst)
  34. #endif
  35. {
  36. fsl_lbc_t *regs = LBC_BASE_ADDR;
  37. uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
  38. const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS;
  39. const int block_shift = large ? 17 : 14;
  40. const int block_size = 1 << block_shift;
  41. const int page_size = large ? 2048 : 512;
  42. const int bad_marker = large ? page_size + 0 : page_size + 5;
  43. int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
  44. int pos = 0;
  45. char *dst = vdst;
  46. if (offs & (block_size - 1)) {
  47. puts("bad offset\n");
  48. for (;;);
  49. }
  50. if (large) {
  51. fmr |= FMR_ECCM;
  52. out_be32(&regs->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
  53. (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
  54. out_be32(&regs->fir,
  55. (FIR_OP_CW0 << FIR_OP0_SHIFT) |
  56. (FIR_OP_CA << FIR_OP1_SHIFT) |
  57. (FIR_OP_PA << FIR_OP2_SHIFT) |
  58. (FIR_OP_CW1 << FIR_OP3_SHIFT) |
  59. (FIR_OP_RBW << FIR_OP4_SHIFT));
  60. } else {
  61. out_be32(&regs->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
  62. out_be32(&regs->fir,
  63. (FIR_OP_CW0 << FIR_OP0_SHIFT) |
  64. (FIR_OP_CA << FIR_OP1_SHIFT) |
  65. (FIR_OP_PA << FIR_OP2_SHIFT) |
  66. (FIR_OP_RBW << FIR_OP3_SHIFT));
  67. }
  68. out_be32(&regs->fbcr, 0);
  69. clrsetbits_be32(&regs->bank[0].br, BR_DECC, BR_DECC_CHK_GEN);
  70. while (pos < uboot_size) {
  71. int i = 0;
  72. out_be32(&regs->fbar, offs >> block_shift);
  73. do {
  74. int j;
  75. unsigned int page_offs = (offs & (block_size - 1)) << 1;
  76. out_be32(&regs->ltesr, ~0);
  77. out_be32(&regs->lteatr, 0);
  78. out_be32(&regs->fpar, page_offs);
  79. out_be32(&regs->fmr, fmr);
  80. out_be32(&regs->lsor, 0);
  81. nand_wait();
  82. page_offs %= WINDOW_SIZE;
  83. /*
  84. * If either of the first two pages are marked bad,
  85. * continue to the next block.
  86. */
  87. if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) {
  88. puts("skipping\n");
  89. offs = (offs + block_size) & ~(block_size - 1);
  90. pos &= ~(block_size - 1);
  91. break;
  92. }
  93. for (j = 0; j < page_size; j++)
  94. dst[pos + j] = buf[page_offs + j];
  95. pos += page_size;
  96. offs += page_size;
  97. } while ((offs & (block_size - 1)) && (pos < uboot_size));
  98. }
  99. return 0;
  100. }
  101. /*
  102. * Defines a static function nand_load_image() here, because non-static makes
  103. * the code too large for certain SPLs(minimal SPL, maximum size <= 4Kbytes)
  104. */
  105. #ifndef CONFIG_TPL_BUILD
  106. #define nand_spl_load_image(offs, uboot_size, vdst) \
  107. nand_load_image(offs, uboot_size, vdst)
  108. #endif
  109. /*
  110. * The main entry for NAND booting. It's necessary that SDRAM is already
  111. * configured and available since this code loads the main U-Boot image
  112. * from NAND into SDRAM and starts it from there.
  113. */
  114. void nand_boot(void)
  115. {
  116. __attribute__((noreturn)) void (*uboot)(void);
  117. /*
  118. * Load U-Boot image from NAND into RAM
  119. */
  120. nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
  121. CONFIG_SYS_NAND_U_BOOT_SIZE,
  122. (void *)CONFIG_SYS_NAND_U_BOOT_DST);
  123. #ifdef CONFIG_NAND_ENV_DST
  124. nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  125. (void *)CONFIG_NAND_ENV_DST);
  126. #ifdef CONFIG_ENV_OFFSET_REDUND
  127. nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
  128. (void *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
  129. #endif
  130. #endif
  131. #ifdef CONFIG_SPL_FLUSH_IMAGE
  132. /*
  133. * Clean d-cache and invalidate i-cache, to
  134. * make sure that no stale data is executed.
  135. */
  136. flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
  137. #endif
  138. puts("transfering control\n");
  139. /*
  140. * Jump to U-Boot image
  141. */
  142. uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
  143. (*uboot)();
  144. }