ide.c 28 KB

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  1. /*
  2. * (C) Copyright 2000-2011
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <ata.h>
  9. #include <dm.h>
  10. #include <ide.h>
  11. #include <watchdog.h>
  12. #include <asm/io.h>
  13. #ifdef __PPC__
  14. # define EIEIO __asm__ volatile ("eieio")
  15. # define SYNC __asm__ volatile ("sync")
  16. #else
  17. # define EIEIO /* nothing */
  18. # define SYNC /* nothing */
  19. #endif
  20. /* Current offset for IDE0 / IDE1 bus access */
  21. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  22. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  23. CONFIG_SYS_ATA_IDE0_OFFSET,
  24. #endif
  25. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  26. CONFIG_SYS_ATA_IDE1_OFFSET,
  27. #endif
  28. };
  29. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  30. struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  31. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  32. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  33. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  34. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  35. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  36. #endif
  37. #ifdef CONFIG_IDE_RESET
  38. extern void ide_set_reset(int idereset);
  39. static void ide_reset(void)
  40. {
  41. int i;
  42. for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
  43. ide_bus_ok[i] = 0;
  44. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
  45. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  46. ide_set_reset(1); /* assert reset */
  47. /* the reset signal shall be asserted for et least 25 us */
  48. udelay(25);
  49. WATCHDOG_RESET();
  50. /* de-assert RESET signal */
  51. ide_set_reset(0);
  52. /* wait 250 ms */
  53. for (i = 0; i < 250; ++i)
  54. udelay(1000);
  55. }
  56. #else
  57. #define ide_reset() /* dummy */
  58. #endif /* CONFIG_IDE_RESET */
  59. /*
  60. * Wait until Busy bit is off, or timeout (in ms)
  61. * Return last status
  62. */
  63. static uchar ide_wait(int dev, ulong t)
  64. {
  65. ulong delay = 10 * t; /* poll every 100 us */
  66. uchar c;
  67. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  68. udelay(100);
  69. if (delay-- == 0)
  70. break;
  71. }
  72. return c;
  73. }
  74. /*
  75. * copy src to dest, skipping leading and trailing blanks and null
  76. * terminate the string
  77. * "len" is the size of available memory including the terminating '\0'
  78. */
  79. static void ident_cpy(unsigned char *dst, unsigned char *src,
  80. unsigned int len)
  81. {
  82. unsigned char *end, *last;
  83. last = dst;
  84. end = src + len - 1;
  85. /* reserve space for '\0' */
  86. if (len < 2)
  87. goto OUT;
  88. /* skip leading white space */
  89. while ((*src) && (src < end) && (*src == ' '))
  90. ++src;
  91. /* copy string, omitting trailing white space */
  92. while ((*src) && (src < end)) {
  93. *dst++ = *src;
  94. if (*src++ != ' ')
  95. last = dst;
  96. }
  97. OUT:
  98. *last = '\0';
  99. }
  100. #ifdef CONFIG_ATAPI
  101. /****************************************************************************
  102. * ATAPI Support
  103. */
  104. #if defined(CONFIG_IDE_SWAP_IO)
  105. /* since ATAPI may use commands with not 4 bytes alligned length
  106. * we have our own transfer functions, 2 bytes alligned */
  107. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  108. {
  109. ushort *dbuf;
  110. volatile ushort *pbuf;
  111. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  112. dbuf = (ushort *)sect_buf;
  113. debug("in output data shorts base for read is %lx\n",
  114. (unsigned long) pbuf);
  115. while (shorts--) {
  116. EIEIO;
  117. *pbuf = *dbuf++;
  118. }
  119. }
  120. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  121. {
  122. ushort *dbuf;
  123. volatile ushort *pbuf;
  124. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  125. dbuf = (ushort *)sect_buf;
  126. debug("in input data shorts base for read is %lx\n",
  127. (unsigned long) pbuf);
  128. while (shorts--) {
  129. EIEIO;
  130. *dbuf++ = *pbuf;
  131. }
  132. }
  133. #else /* ! CONFIG_IDE_SWAP_IO */
  134. __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
  135. {
  136. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  137. }
  138. __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
  139. {
  140. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  141. }
  142. #endif /* CONFIG_IDE_SWAP_IO */
  143. /*
  144. * Wait until (Status & mask) == res, or timeout (in ms)
  145. * Return last status
  146. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  147. * and then they set their DRQ Bit
  148. */
  149. static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
  150. {
  151. ulong delay = 10 * t; /* poll every 100 us */
  152. uchar c;
  153. /* prevents to read the status before valid */
  154. c = ide_inb(dev, ATA_DEV_CTL);
  155. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  156. /* break if error occurs (doesn't make sense to wait more) */
  157. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
  158. break;
  159. udelay(100);
  160. if (delay-- == 0)
  161. break;
  162. }
  163. return c;
  164. }
  165. /*
  166. * issue an atapi command
  167. */
  168. unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
  169. unsigned char *buffer, int buflen)
  170. {
  171. unsigned char c, err, mask, res;
  172. int n;
  173. /* Select device
  174. */
  175. mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
  176. res = 0;
  177. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  178. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  179. if ((c & mask) != res) {
  180. printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
  181. c);
  182. err = 0xFF;
  183. goto AI_OUT;
  184. }
  185. /* write taskfile */
  186. ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  187. ide_outb(device, ATA_SECT_CNT, 0);
  188. ide_outb(device, ATA_SECT_NUM, 0);
  189. ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
  190. ide_outb(device, ATA_CYL_HIGH,
  191. (unsigned char) ((buflen >> 8) & 0xFF));
  192. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  193. ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
  194. udelay(50);
  195. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  196. res = ATA_STAT_DRQ;
  197. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  198. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  199. printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
  200. device, c);
  201. err = 0xFF;
  202. goto AI_OUT;
  203. }
  204. /* write command block */
  205. ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
  206. /* ATAPI Command written wait for completition */
  207. udelay(5000); /* device must set bsy */
  208. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  209. /*
  210. * if no data wait for DRQ = 0 BSY = 0
  211. * if data wait for DRQ = 1 BSY = 0
  212. */
  213. res = 0;
  214. if (buflen)
  215. res = ATA_STAT_DRQ;
  216. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  217. if ((c & mask) != res) {
  218. if (c & ATA_STAT_ERR) {
  219. err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
  220. debug("atapi_issue 1 returned sense key %X status %02X\n",
  221. err, c);
  222. } else {
  223. printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
  224. ccb[0], c);
  225. err = 0xFF;
  226. }
  227. goto AI_OUT;
  228. }
  229. n = ide_inb(device, ATA_CYL_HIGH);
  230. n <<= 8;
  231. n += ide_inb(device, ATA_CYL_LOW);
  232. if (n > buflen) {
  233. printf("ERROR, transfer bytes %d requested only %d\n", n,
  234. buflen);
  235. err = 0xff;
  236. goto AI_OUT;
  237. }
  238. if ((n == 0) && (buflen < 0)) {
  239. printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
  240. err = 0xff;
  241. goto AI_OUT;
  242. }
  243. if (n != buflen) {
  244. debug("WARNING, transfer bytes %d not equal with requested %d\n",
  245. n, buflen);
  246. }
  247. if (n != 0) { /* data transfer */
  248. debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
  249. /* we transfer shorts */
  250. n >>= 1;
  251. /* ok now decide if it is an in or output */
  252. if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
  253. debug("Write to device\n");
  254. ide_output_data_shorts(device, (unsigned short *)buffer,
  255. n);
  256. } else {
  257. debug("Read from device @ %p shorts %d\n", buffer, n);
  258. ide_input_data_shorts(device, (unsigned short *)buffer,
  259. n);
  260. }
  261. }
  262. udelay(5000); /* seems that some CD ROMs need this... */
  263. mask = ATA_STAT_BUSY | ATA_STAT_ERR;
  264. res = 0;
  265. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  266. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  267. err = (ide_inb(device, ATA_ERROR_REG) >> 4);
  268. debug("atapi_issue 2 returned sense key %X status %X\n", err,
  269. c);
  270. } else {
  271. err = 0;
  272. }
  273. AI_OUT:
  274. return err;
  275. }
  276. /*
  277. * sending the command to atapi_issue. If an status other than good
  278. * returns, an request_sense will be issued
  279. */
  280. #define ATAPI_DRIVE_NOT_READY 100
  281. #define ATAPI_UNIT_ATTN 10
  282. unsigned char atapi_issue_autoreq(int device,
  283. unsigned char *ccb,
  284. int ccblen,
  285. unsigned char *buffer, int buflen)
  286. {
  287. unsigned char sense_data[18], sense_ccb[12];
  288. unsigned char res, key, asc, ascq;
  289. int notready, unitattn;
  290. unitattn = ATAPI_UNIT_ATTN;
  291. notready = ATAPI_DRIVE_NOT_READY;
  292. retry:
  293. res = atapi_issue(device, ccb, ccblen, buffer, buflen);
  294. if (res == 0)
  295. return 0; /* Ok */
  296. if (res == 0xFF)
  297. return 0xFF; /* error */
  298. debug("(auto_req)atapi_issue returned sense key %X\n", res);
  299. memset(sense_ccb, 0, sizeof(sense_ccb));
  300. memset(sense_data, 0, sizeof(sense_data));
  301. sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
  302. sense_ccb[4] = 18; /* allocation Length */
  303. res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
  304. key = (sense_data[2] & 0xF);
  305. asc = (sense_data[12]);
  306. ascq = (sense_data[13]);
  307. debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
  308. debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  309. sense_data[0], key, asc, ascq);
  310. if ((key == 0))
  311. return 0; /* ok device ready */
  312. if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
  313. if (unitattn-- > 0) {
  314. udelay(200 * 1000);
  315. goto retry;
  316. }
  317. printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
  318. goto error;
  319. }
  320. if ((asc == 0x4) && (ascq == 0x1)) {
  321. /* not ready, but will be ready soon */
  322. if (notready-- > 0) {
  323. udelay(200 * 1000);
  324. goto retry;
  325. }
  326. printf("Drive not ready, tried %d times\n",
  327. ATAPI_DRIVE_NOT_READY);
  328. goto error;
  329. }
  330. if (asc == 0x3a) {
  331. debug("Media not present\n");
  332. goto error;
  333. }
  334. printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
  335. ascq);
  336. error:
  337. debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
  338. return 0xFF;
  339. }
  340. /*
  341. * atapi_read:
  342. * we transfer only one block per command, since the multiple DRQ per
  343. * command is not yet implemented
  344. */
  345. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  346. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  347. #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
  348. ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  349. void *buffer)
  350. {
  351. int device = block_dev->devnum;
  352. ulong n = 0;
  353. unsigned char ccb[12]; /* Command descriptor block */
  354. ulong cnt;
  355. debug("atapi_read dev %d start " LBAF " blocks " LBAF
  356. " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
  357. do {
  358. if (blkcnt > ATAPI_READ_MAX_BLOCK)
  359. cnt = ATAPI_READ_MAX_BLOCK;
  360. else
  361. cnt = blkcnt;
  362. ccb[0] = ATAPI_CMD_READ_12;
  363. ccb[1] = 0; /* reserved */
  364. ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
  365. ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
  366. ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
  367. ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
  368. ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
  369. ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
  370. ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
  371. ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
  372. ccb[10] = 0; /* reserved */
  373. ccb[11] = 0; /* reserved */
  374. if (atapi_issue_autoreq(device, ccb, 12,
  375. (unsigned char *)buffer,
  376. cnt * ATAPI_READ_BLOCK_SIZE)
  377. == 0xFF) {
  378. return n;
  379. }
  380. n += cnt;
  381. blkcnt -= cnt;
  382. blknr += cnt;
  383. buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
  384. } while (blkcnt > 0);
  385. return n;
  386. }
  387. static void atapi_inquiry(struct blk_desc *dev_desc)
  388. {
  389. unsigned char ccb[12]; /* Command descriptor block */
  390. unsigned char iobuf[64]; /* temp buf */
  391. unsigned char c;
  392. int device;
  393. device = dev_desc->devnum;
  394. dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
  395. #ifndef CONFIG_BLK
  396. dev_desc->block_read = atapi_read;
  397. #endif
  398. memset(ccb, 0, sizeof(ccb));
  399. memset(iobuf, 0, sizeof(iobuf));
  400. ccb[0] = ATAPI_CMD_INQUIRY;
  401. ccb[4] = 40; /* allocation Legnth */
  402. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
  403. debug("ATAPI_CMD_INQUIRY returned %x\n", c);
  404. if (c != 0)
  405. return;
  406. /* copy device ident strings */
  407. ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
  408. ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
  409. ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
  410. dev_desc->lun = 0;
  411. dev_desc->lba = 0;
  412. dev_desc->blksz = 0;
  413. dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
  414. dev_desc->type = iobuf[0] & 0x1f;
  415. if ((iobuf[1] & 0x80) == 0x80)
  416. dev_desc->removable = 1;
  417. else
  418. dev_desc->removable = 0;
  419. memset(ccb, 0, sizeof(ccb));
  420. memset(iobuf, 0, sizeof(iobuf));
  421. ccb[0] = ATAPI_CMD_START_STOP;
  422. ccb[4] = 0x03; /* start */
  423. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  424. debug("ATAPI_CMD_START_STOP returned %x\n", c);
  425. if (c != 0)
  426. return;
  427. memset(ccb, 0, sizeof(ccb));
  428. memset(iobuf, 0, sizeof(iobuf));
  429. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
  430. debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
  431. if (c != 0)
  432. return;
  433. memset(ccb, 0, sizeof(ccb));
  434. memset(iobuf, 0, sizeof(iobuf));
  435. ccb[0] = ATAPI_CMD_READ_CAP;
  436. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
  437. debug("ATAPI_CMD_READ_CAP returned %x\n", c);
  438. if (c != 0)
  439. return;
  440. debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  441. iobuf[0], iobuf[1], iobuf[2], iobuf[3],
  442. iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
  443. dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
  444. ((unsigned long) iobuf[1] << 16) +
  445. ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
  446. dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
  447. ((unsigned long) iobuf[5] << 16) +
  448. ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
  449. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  450. #ifdef CONFIG_LBA48
  451. /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  452. dev_desc->lba48 = 0;
  453. #endif
  454. return;
  455. }
  456. #endif /* CONFIG_ATAPI */
  457. static void ide_ident(struct blk_desc *dev_desc)
  458. {
  459. unsigned char c;
  460. hd_driveid_t iop;
  461. #ifdef CONFIG_ATAPI
  462. int retries = 0;
  463. #endif
  464. int device;
  465. device = dev_desc->devnum;
  466. printf(" Device %d: ", device);
  467. /* Select device
  468. */
  469. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  470. dev_desc->if_type = IF_TYPE_IDE;
  471. #ifdef CONFIG_ATAPI
  472. retries = 0;
  473. /* Warning: This will be tricky to read */
  474. while (retries <= 1) {
  475. /* check signature */
  476. if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
  477. (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
  478. (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
  479. (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
  480. /* ATAPI Signature found */
  481. dev_desc->if_type = IF_TYPE_ATAPI;
  482. /*
  483. * Start Ident Command
  484. */
  485. ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
  486. /*
  487. * Wait for completion - ATAPI devices need more time
  488. * to become ready
  489. */
  490. c = ide_wait(device, ATAPI_TIME_OUT);
  491. } else
  492. #endif
  493. {
  494. /*
  495. * Start Ident Command
  496. */
  497. ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
  498. /*
  499. * Wait for completion
  500. */
  501. c = ide_wait(device, IDE_TIME_OUT);
  502. }
  503. if (((c & ATA_STAT_DRQ) == 0) ||
  504. ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
  505. #ifdef CONFIG_ATAPI
  506. {
  507. /*
  508. * Need to soft reset the device
  509. * in case it's an ATAPI...
  510. */
  511. debug("Retrying...\n");
  512. ide_outb(device, ATA_DEV_HD,
  513. ATA_LBA | ATA_DEVICE(device));
  514. udelay(100000);
  515. ide_outb(device, ATA_COMMAND, 0x08);
  516. udelay(500000); /* 500 ms */
  517. }
  518. /*
  519. * Select device
  520. */
  521. ide_outb(device, ATA_DEV_HD,
  522. ATA_LBA | ATA_DEVICE(device));
  523. retries++;
  524. #else
  525. return;
  526. #endif
  527. }
  528. #ifdef CONFIG_ATAPI
  529. else
  530. break;
  531. } /* see above - ugly to read */
  532. if (retries == 2) /* Not found */
  533. return;
  534. #endif
  535. ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
  536. ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
  537. sizeof(dev_desc->revision));
  538. ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
  539. sizeof(dev_desc->vendor));
  540. ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
  541. sizeof(dev_desc->product));
  542. #ifdef __LITTLE_ENDIAN
  543. /*
  544. * firmware revision, model, and serial number have Big Endian Byte
  545. * order in Word. Convert all three to little endian.
  546. *
  547. * See CF+ and CompactFlash Specification Revision 2.0:
  548. * 6.2.1.6: Identify Drive, Table 39 for more details
  549. */
  550. strswab(dev_desc->revision);
  551. strswab(dev_desc->vendor);
  552. strswab(dev_desc->product);
  553. #endif /* __LITTLE_ENDIAN */
  554. if ((iop.config & 0x0080) == 0x0080)
  555. dev_desc->removable = 1;
  556. else
  557. dev_desc->removable = 0;
  558. #ifdef CONFIG_ATAPI
  559. if (dev_desc->if_type == IF_TYPE_ATAPI) {
  560. atapi_inquiry(dev_desc);
  561. return;
  562. }
  563. #endif /* CONFIG_ATAPI */
  564. #ifdef __BIG_ENDIAN
  565. /* swap shorts */
  566. dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
  567. #else /* ! __BIG_ENDIAN */
  568. /*
  569. * do not swap shorts on little endian
  570. *
  571. * See CF+ and CompactFlash Specification Revision 2.0:
  572. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  573. */
  574. dev_desc->lba = iop.lba_capacity;
  575. #endif /* __BIG_ENDIAN */
  576. #ifdef CONFIG_LBA48
  577. if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
  578. dev_desc->lba48 = 1;
  579. dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
  580. ((unsigned long long) iop.lba48_capacity[1] << 16) |
  581. ((unsigned long long) iop.lba48_capacity[2] << 32) |
  582. ((unsigned long long) iop.lba48_capacity[3] << 48);
  583. } else {
  584. dev_desc->lba48 = 0;
  585. }
  586. #endif /* CONFIG_LBA48 */
  587. /* assuming HD */
  588. dev_desc->type = DEV_TYPE_HARDDISK;
  589. dev_desc->blksz = ATA_BLOCKSIZE;
  590. dev_desc->log2blksz = LOG2(dev_desc->blksz);
  591. dev_desc->lun = 0; /* just to fill something in... */
  592. #if 0 /* only used to test the powersaving mode,
  593. * if enabled, the drive goes after 5 sec
  594. * in standby mode */
  595. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  596. c = ide_wait(device, IDE_TIME_OUT);
  597. ide_outb(device, ATA_SECT_CNT, 1);
  598. ide_outb(device, ATA_LBA_LOW, 0);
  599. ide_outb(device, ATA_LBA_MID, 0);
  600. ide_outb(device, ATA_LBA_HIGH, 0);
  601. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  602. ide_outb(device, ATA_COMMAND, 0xe3);
  603. udelay(50);
  604. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  605. #endif
  606. }
  607. __weak void ide_outb(int dev, int port, unsigned char val)
  608. {
  609. debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  610. dev, port, val,
  611. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  612. #if defined(CONFIG_IDE_AHB)
  613. if (port) {
  614. /* write command */
  615. ide_write_register(dev, port, val);
  616. } else {
  617. /* write data */
  618. outb(val, (ATA_CURR_BASE(dev)));
  619. }
  620. #else
  621. outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  622. #endif
  623. }
  624. __weak unsigned char ide_inb(int dev, int port)
  625. {
  626. uchar val;
  627. #if defined(CONFIG_IDE_AHB)
  628. val = ide_read_register(dev, port);
  629. #else
  630. val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  631. #endif
  632. debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  633. dev, port,
  634. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  635. return val;
  636. }
  637. void ide_init(void)
  638. {
  639. unsigned char c;
  640. int i, bus;
  641. #ifdef CONFIG_IDE_PREINIT
  642. WATCHDOG_RESET();
  643. if (ide_preinit()) {
  644. puts("ide_preinit failed\n");
  645. return;
  646. }
  647. #endif /* CONFIG_IDE_PREINIT */
  648. WATCHDOG_RESET();
  649. /* ATAPI Drives seems to need a proper IDE Reset */
  650. ide_reset();
  651. /*
  652. * Wait for IDE to get ready.
  653. * According to spec, this can take up to 31 seconds!
  654. */
  655. for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
  656. int dev =
  657. bus * (CONFIG_SYS_IDE_MAXDEVICE /
  658. CONFIG_SYS_IDE_MAXBUS);
  659. printf("Bus %d: ", bus);
  660. ide_bus_ok[bus] = 0;
  661. /* Select device
  662. */
  663. udelay(100000); /* 100 ms */
  664. ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  665. udelay(100000); /* 100 ms */
  666. i = 0;
  667. do {
  668. udelay(10000); /* 10 ms */
  669. c = ide_inb(dev, ATA_STATUS);
  670. i++;
  671. if (i > (ATA_RESET_TIME * 100)) {
  672. puts("** Timeout **\n");
  673. return;
  674. }
  675. if ((i >= 100) && ((i % 100) == 0))
  676. putc('.');
  677. } while (c & ATA_STAT_BUSY);
  678. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  679. puts("not available ");
  680. debug("Status = 0x%02X ", c);
  681. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  682. } else if ((c & ATA_STAT_READY) == 0) {
  683. puts("not available ");
  684. debug("Status = 0x%02X ", c);
  685. #endif
  686. } else {
  687. puts("OK ");
  688. ide_bus_ok[bus] = 1;
  689. }
  690. WATCHDOG_RESET();
  691. }
  692. putc('\n');
  693. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  694. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  695. ide_dev_desc[i].if_type = IF_TYPE_IDE;
  696. ide_dev_desc[i].devnum = i;
  697. ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
  698. ide_dev_desc[i].blksz = 0;
  699. ide_dev_desc[i].log2blksz =
  700. LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
  701. ide_dev_desc[i].lba = 0;
  702. #ifndef CONFIG_BLK
  703. ide_dev_desc[i].block_read = ide_read;
  704. ide_dev_desc[i].block_write = ide_write;
  705. #endif
  706. if (!ide_bus_ok[IDE_BUS(i)])
  707. continue;
  708. ide_ident(&ide_dev_desc[i]);
  709. dev_print(&ide_dev_desc[i]);
  710. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  711. /* initialize partition type */
  712. part_init(&ide_dev_desc[i]);
  713. }
  714. }
  715. WATCHDOG_RESET();
  716. }
  717. /* We only need to swap data if we are running on a big endian cpu. */
  718. #if defined(__LITTLE_ENDIAN)
  719. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  720. {
  721. ide_input_data(dev, sect_buf, words);
  722. }
  723. #else
  724. __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
  725. {
  726. volatile ushort *pbuf =
  727. (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  728. ushort *dbuf = (ushort *)sect_buf;
  729. debug("in input swap data base for read is %lx\n",
  730. (unsigned long) pbuf);
  731. while (words--) {
  732. #ifdef __MIPS__
  733. *dbuf++ = swab16p((u16 *)pbuf);
  734. *dbuf++ = swab16p((u16 *)pbuf);
  735. #else
  736. *dbuf++ = ld_le16(pbuf);
  737. *dbuf++ = ld_le16(pbuf);
  738. #endif /* !MIPS */
  739. }
  740. }
  741. #endif /* __LITTLE_ENDIAN */
  742. #if defined(CONFIG_IDE_SWAP_IO)
  743. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  744. {
  745. ushort *dbuf;
  746. volatile ushort *pbuf;
  747. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  748. dbuf = (ushort *)sect_buf;
  749. while (words--) {
  750. EIEIO;
  751. *pbuf = *dbuf++;
  752. EIEIO;
  753. *pbuf = *dbuf++;
  754. }
  755. }
  756. #else /* ! CONFIG_IDE_SWAP_IO */
  757. __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
  758. {
  759. #if defined(CONFIG_IDE_AHB)
  760. ide_write_data(dev, sect_buf, words);
  761. #else
  762. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  763. #endif
  764. }
  765. #endif /* CONFIG_IDE_SWAP_IO */
  766. #if defined(CONFIG_IDE_SWAP_IO)
  767. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  768. {
  769. ushort *dbuf;
  770. volatile ushort *pbuf;
  771. pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
  772. dbuf = (ushort *)sect_buf;
  773. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  774. while (words--) {
  775. EIEIO;
  776. *dbuf++ = *pbuf;
  777. EIEIO;
  778. *dbuf++ = *pbuf;
  779. }
  780. }
  781. #else /* ! CONFIG_IDE_SWAP_IO */
  782. __weak void ide_input_data(int dev, ulong *sect_buf, int words)
  783. {
  784. #if defined(CONFIG_IDE_AHB)
  785. ide_read_data(dev, sect_buf, words);
  786. #else
  787. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  788. #endif
  789. }
  790. #endif /* CONFIG_IDE_SWAP_IO */
  791. #ifdef CONFIG_BLK
  792. ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  793. void *buffer)
  794. #else
  795. ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  796. void *buffer)
  797. #endif
  798. {
  799. #ifdef CONFIG_BLK
  800. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  801. #endif
  802. int device = block_dev->devnum;
  803. ulong n = 0;
  804. unsigned char c;
  805. unsigned char pwrsave = 0; /* power save */
  806. #ifdef CONFIG_LBA48
  807. unsigned char lba48 = 0;
  808. if (blknr & 0x0000fffff0000000ULL) {
  809. /* more than 28 bits used, use 48bit mode */
  810. lba48 = 1;
  811. }
  812. #endif
  813. debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
  814. device, blknr, blkcnt, (ulong) buffer);
  815. /* Select device
  816. */
  817. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  818. c = ide_wait(device, IDE_TIME_OUT);
  819. if (c & ATA_STAT_BUSY) {
  820. printf("IDE read: device %d not ready\n", device);
  821. goto IDE_READ_E;
  822. }
  823. /* first check if the drive is in Powersaving mode, if yes,
  824. * increase the timeout value */
  825. ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  826. udelay(50);
  827. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  828. if (c & ATA_STAT_BUSY) {
  829. printf("IDE read: device %d not ready\n", device);
  830. goto IDE_READ_E;
  831. }
  832. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  833. printf("No Powersaving mode %X\n", c);
  834. } else {
  835. c = ide_inb(device, ATA_SECT_CNT);
  836. debug("Powersaving %02X\n", c);
  837. if (c == 0)
  838. pwrsave = 1;
  839. }
  840. while (blkcnt-- > 0) {
  841. c = ide_wait(device, IDE_TIME_OUT);
  842. if (c & ATA_STAT_BUSY) {
  843. printf("IDE read: device %d not ready\n", device);
  844. break;
  845. }
  846. #ifdef CONFIG_LBA48
  847. if (lba48) {
  848. /* write high bits */
  849. ide_outb(device, ATA_SECT_CNT, 0);
  850. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  851. #ifdef CONFIG_SYS_64BIT_LBA
  852. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  853. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  854. #else
  855. ide_outb(device, ATA_LBA_MID, 0);
  856. ide_outb(device, ATA_LBA_HIGH, 0);
  857. #endif
  858. }
  859. #endif
  860. ide_outb(device, ATA_SECT_CNT, 1);
  861. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  862. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  863. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  864. #ifdef CONFIG_LBA48
  865. if (lba48) {
  866. ide_outb(device, ATA_DEV_HD,
  867. ATA_LBA | ATA_DEVICE(device));
  868. ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
  869. } else
  870. #endif
  871. {
  872. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  873. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  874. ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
  875. }
  876. udelay(50);
  877. if (pwrsave) {
  878. /* may take up to 4 sec */
  879. c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
  880. pwrsave = 0;
  881. } else {
  882. /* can't take over 500 ms */
  883. c = ide_wait(device, IDE_TIME_OUT);
  884. }
  885. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  886. ATA_STAT_DRQ) {
  887. printf("Error (no IRQ) dev %d blk " LBAF
  888. ": status %#02x\n", device, blknr, c);
  889. break;
  890. }
  891. ide_input_data(device, buffer, ATA_SECTORWORDS);
  892. (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
  893. ++n;
  894. ++blknr;
  895. buffer += ATA_BLOCKSIZE;
  896. }
  897. IDE_READ_E:
  898. return n;
  899. }
  900. #ifdef CONFIG_BLK
  901. ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
  902. const void *buffer)
  903. #else
  904. ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
  905. const void *buffer)
  906. #endif
  907. {
  908. #ifdef CONFIG_BLK
  909. struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
  910. #endif
  911. int device = block_dev->devnum;
  912. ulong n = 0;
  913. unsigned char c;
  914. #ifdef CONFIG_LBA48
  915. unsigned char lba48 = 0;
  916. if (blknr & 0x0000fffff0000000ULL) {
  917. /* more than 28 bits used, use 48bit mode */
  918. lba48 = 1;
  919. }
  920. #endif
  921. /* Select device
  922. */
  923. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  924. while (blkcnt-- > 0) {
  925. c = ide_wait(device, IDE_TIME_OUT);
  926. if (c & ATA_STAT_BUSY) {
  927. printf("IDE read: device %d not ready\n", device);
  928. goto WR_OUT;
  929. }
  930. #ifdef CONFIG_LBA48
  931. if (lba48) {
  932. /* write high bits */
  933. ide_outb(device, ATA_SECT_CNT, 0);
  934. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  935. #ifdef CONFIG_SYS_64BIT_LBA
  936. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  937. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  938. #else
  939. ide_outb(device, ATA_LBA_MID, 0);
  940. ide_outb(device, ATA_LBA_HIGH, 0);
  941. #endif
  942. }
  943. #endif
  944. ide_outb(device, ATA_SECT_CNT, 1);
  945. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  946. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  947. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  948. #ifdef CONFIG_LBA48
  949. if (lba48) {
  950. ide_outb(device, ATA_DEV_HD,
  951. ATA_LBA | ATA_DEVICE(device));
  952. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  953. } else
  954. #endif
  955. {
  956. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  957. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  958. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
  959. }
  960. udelay(50);
  961. /* can't take over 500 ms */
  962. c = ide_wait(device, IDE_TIME_OUT);
  963. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  964. ATA_STAT_DRQ) {
  965. printf("Error (no IRQ) dev %d blk " LBAF
  966. ": status %#02x\n", device, blknr, c);
  967. goto WR_OUT;
  968. }
  969. ide_output_data(device, buffer, ATA_SECTORWORDS);
  970. c = ide_inb(device, ATA_STATUS); /* clear IRQ */
  971. ++n;
  972. ++blknr;
  973. buffer += ATA_BLOCKSIZE;
  974. }
  975. WR_OUT:
  976. return n;
  977. }
  978. #if defined(CONFIG_OF_IDE_FIXUP)
  979. int ide_device_present(int dev)
  980. {
  981. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  982. return 0;
  983. return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
  984. }
  985. #endif
  986. #ifdef CONFIG_BLK
  987. static const struct blk_ops ide_blk_ops = {
  988. .read = ide_read,
  989. .write = ide_write,
  990. };
  991. U_BOOT_DRIVER(ide_blk) = {
  992. .name = "ide_blk",
  993. .id = UCLASS_BLK,
  994. .ops = &ide_blk_ops,
  995. };
  996. #else
  997. U_BOOT_LEGACY_BLK(ide) = {
  998. .if_typename = "ide",
  999. .if_type = IF_TYPE_IDE,
  1000. .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
  1001. .desc = ide_dev_desc,
  1002. };
  1003. #endif