test.dts 11 KB

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  1. /dts-v1/;
  2. / {
  3. model = "sandbox";
  4. compatible = "sandbox";
  5. #address-cells = <1>;
  6. #size-cells = <1>;
  7. aliases {
  8. console = &uart0;
  9. eth0 = "/eth@10002000";
  10. eth3 = &eth_3;
  11. eth5 = &eth_5;
  12. i2c0 = "/i2c@0";
  13. mmc0 = "/mmc0";
  14. mmc1 = "/mmc1";
  15. pci0 = &pci0;
  16. pci1 = &pci1;
  17. pci2 = &pci2;
  18. remoteproc1 = &rproc_1;
  19. remoteproc2 = &rproc_2;
  20. rtc0 = &rtc_0;
  21. rtc1 = &rtc_1;
  22. spi0 = "/spi@0";
  23. testfdt6 = "/e-test";
  24. testbus3 = "/some-bus";
  25. testfdt0 = "/some-bus/c-test@0";
  26. testfdt1 = "/some-bus/c-test@1";
  27. testfdt3 = "/b-test";
  28. testfdt5 = "/some-bus/c-test@5";
  29. testfdt8 = "/a-test";
  30. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  31. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  32. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  33. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  34. usb0 = &usb_0;
  35. usb1 = &usb_1;
  36. usb2 = &usb_2;
  37. axi0 = &axi;
  38. };
  39. a-test {
  40. reg = <0 1>;
  41. compatible = "denx,u-boot-fdt-test";
  42. ping-expect = <0>;
  43. ping-add = <0>;
  44. u-boot,dm-pre-reloc;
  45. test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
  46. <0>, <&gpio_a 12>;
  47. test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
  48. <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
  49. <&gpio_b 9 0xc 3 2 1>;
  50. };
  51. junk {
  52. reg = <1 1>;
  53. compatible = "not,compatible";
  54. };
  55. no-compatible {
  56. reg = <2 1>;
  57. };
  58. bind-test {
  59. bind-test-child1 {
  60. compatible = "sandbox,phy";
  61. #phy-cells = <1>;
  62. };
  63. bind-test-child2 {
  64. compatible = "simple-bus";
  65. };
  66. };
  67. b-test {
  68. reg = <3 1>;
  69. compatible = "denx,u-boot-fdt-test";
  70. ping-expect = <3>;
  71. ping-add = <3>;
  72. };
  73. phy_provider0: gen_phy@0 {
  74. compatible = "sandbox,phy";
  75. #phy-cells = <1>;
  76. };
  77. phy_provider1: gen_phy@1 {
  78. compatible = "sandbox,phy";
  79. #phy-cells = <0>;
  80. broken;
  81. };
  82. gen_phy_user: gen_phy_user {
  83. compatible = "simple-bus";
  84. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  85. phy-names = "phy1", "phy2", "phy3";
  86. };
  87. some-bus {
  88. #address-cells = <1>;
  89. #size-cells = <0>;
  90. compatible = "denx,u-boot-test-bus";
  91. reg = <3 1>;
  92. ping-expect = <4>;
  93. ping-add = <4>;
  94. c-test@5 {
  95. compatible = "denx,u-boot-fdt-test";
  96. reg = <5>;
  97. ping-expect = <5>;
  98. ping-add = <5>;
  99. };
  100. c-test@0 {
  101. compatible = "denx,u-boot-fdt-test";
  102. reg = <0>;
  103. ping-expect = <6>;
  104. ping-add = <6>;
  105. };
  106. c-test@1 {
  107. compatible = "denx,u-boot-fdt-test";
  108. reg = <1>;
  109. ping-expect = <7>;
  110. ping-add = <7>;
  111. };
  112. };
  113. d-test {
  114. reg = <3 1>;
  115. ping-expect = <6>;
  116. ping-add = <6>;
  117. compatible = "google,another-fdt-test";
  118. };
  119. e-test {
  120. reg = <3 1>;
  121. ping-expect = <6>;
  122. ping-add = <6>;
  123. compatible = "google,another-fdt-test";
  124. };
  125. f-test {
  126. compatible = "denx,u-boot-fdt-test";
  127. };
  128. g-test {
  129. compatible = "denx,u-boot-fdt-test";
  130. };
  131. clocks {
  132. clk_fixed: clk-fixed {
  133. compatible = "fixed-clock";
  134. #clock-cells = <0>;
  135. clock-frequency = <1234>;
  136. };
  137. };
  138. clk_sandbox: clk-sbox {
  139. compatible = "sandbox,clk";
  140. #clock-cells = <1>;
  141. };
  142. clk-test {
  143. compatible = "sandbox,clk-test";
  144. clocks = <&clk_fixed>,
  145. <&clk_sandbox 1>,
  146. <&clk_sandbox 0>;
  147. clock-names = "fixed", "i2c", "spi";
  148. };
  149. eth@10002000 {
  150. compatible = "sandbox,eth";
  151. reg = <0x10002000 0x1000>;
  152. fake-host-hwaddr = [00 00 66 44 22 00];
  153. };
  154. eth_5: eth@10003000 {
  155. compatible = "sandbox,eth";
  156. reg = <0x10003000 0x1000>;
  157. fake-host-hwaddr = [00 00 66 44 22 11];
  158. };
  159. eth_3: sbe5 {
  160. compatible = "sandbox,eth";
  161. reg = <0x10005000 0x1000>;
  162. fake-host-hwaddr = [00 00 66 44 22 33];
  163. };
  164. eth@10004000 {
  165. compatible = "sandbox,eth";
  166. reg = <0x10004000 0x1000>;
  167. fake-host-hwaddr = [00 00 66 44 22 22];
  168. };
  169. gpio_a: base-gpios {
  170. compatible = "sandbox,gpio";
  171. gpio-controller;
  172. #gpio-cells = <1>;
  173. gpio-bank-name = "a";
  174. sandbox,gpio-count = <20>;
  175. };
  176. gpio_b: extra-gpios {
  177. compatible = "sandbox,gpio";
  178. gpio-controller;
  179. #gpio-cells = <5>;
  180. gpio-bank-name = "b";
  181. sandbox,gpio-count = <10>;
  182. };
  183. i2c@0 {
  184. #address-cells = <1>;
  185. #size-cells = <0>;
  186. reg = <0 1>;
  187. compatible = "sandbox,i2c";
  188. clock-frequency = <100000>;
  189. eeprom@2c {
  190. reg = <0x2c>;
  191. compatible = "i2c-eeprom";
  192. emul {
  193. compatible = "sandbox,i2c-eeprom";
  194. sandbox,filename = "i2c.bin";
  195. sandbox,size = <256>;
  196. };
  197. };
  198. rtc_0: rtc@43 {
  199. reg = <0x43>;
  200. compatible = "sandbox-rtc";
  201. emul {
  202. compatible = "sandbox,i2c-rtc";
  203. };
  204. };
  205. rtc_1: rtc@61 {
  206. reg = <0x61>;
  207. compatible = "sandbox-rtc";
  208. emul {
  209. compatible = "sandbox,i2c-rtc";
  210. };
  211. };
  212. sandbox_pmic: sandbox_pmic {
  213. reg = <0x40>;
  214. };
  215. mc34708: pmic@41 {
  216. reg = <0x41>;
  217. };
  218. };
  219. adc@0 {
  220. compatible = "sandbox,adc";
  221. vdd-supply = <&buck2>;
  222. vss-microvolts = <0>;
  223. };
  224. lcd {
  225. u-boot,dm-pre-reloc;
  226. compatible = "sandbox,lcd-sdl";
  227. xres = <1366>;
  228. yres = <768>;
  229. };
  230. leds {
  231. compatible = "gpio-leds";
  232. iracibble {
  233. gpios = <&gpio_a 1 0>;
  234. label = "sandbox:red";
  235. };
  236. martinet {
  237. gpios = <&gpio_a 2 0>;
  238. label = "sandbox:green";
  239. };
  240. default_on {
  241. gpios = <&gpio_a 5 0>;
  242. label = "sandbox:default_on";
  243. default-state = "on";
  244. };
  245. default_off {
  246. gpios = <&gpio_a 6 0>;
  247. label = "sandbox:default_off";
  248. default-state = "off";
  249. };
  250. };
  251. mbox: mbox {
  252. compatible = "sandbox,mbox";
  253. #mbox-cells = <1>;
  254. };
  255. mbox-test {
  256. compatible = "sandbox,mbox-test";
  257. mboxes = <&mbox 100>, <&mbox 1>;
  258. mbox-names = "other", "test";
  259. };
  260. misc-test {
  261. compatible = "sandbox,misc_sandbox";
  262. };
  263. mmc2 {
  264. compatible = "sandbox,mmc";
  265. };
  266. mmc1 {
  267. compatible = "sandbox,mmc";
  268. };
  269. mmc0 {
  270. compatible = "sandbox,mmc";
  271. };
  272. pci0: pci-controller0 {
  273. compatible = "sandbox,pci";
  274. device_type = "pci";
  275. #address-cells = <3>;
  276. #size-cells = <2>;
  277. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
  278. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  279. pci@0,0 {
  280. compatible = "pci-generic";
  281. reg = <0x0000 0 0 0 0>;
  282. emul@0,0 {
  283. compatible = "sandbox,swap-case";
  284. };
  285. };
  286. pci@1f,0 {
  287. compatible = "pci-generic";
  288. reg = <0xf800 0 0 0 0>;
  289. emul@1f,0 {
  290. compatible = "sandbox,swap-case";
  291. };
  292. };
  293. };
  294. pci1: pci-controller1 {
  295. compatible = "sandbox,pci";
  296. device_type = "pci";
  297. #address-cells = <3>;
  298. #size-cells = <2>;
  299. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000
  300. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  301. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  302. 0x0c 0x00 0x1234 0x5678>;
  303. };
  304. pci2: pci-controller2 {
  305. compatible = "sandbox,pci";
  306. device_type = "pci";
  307. #address-cells = <3>;
  308. #size-cells = <2>;
  309. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  310. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  311. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  312. pci@1f,0 {
  313. compatible = "pci-generic";
  314. reg = <0xf800 0 0 0 0>;
  315. emul@1f,0 {
  316. compatible = "sandbox,swap-case";
  317. };
  318. };
  319. };
  320. probing {
  321. compatible = "simple-bus";
  322. test1 {
  323. compatible = "denx,u-boot-probe-test";
  324. };
  325. test2 {
  326. compatible = "denx,u-boot-probe-test";
  327. };
  328. test3 {
  329. compatible = "denx,u-boot-probe-test";
  330. };
  331. test4 {
  332. compatible = "denx,u-boot-probe-test";
  333. };
  334. };
  335. pwrdom: power-domain {
  336. compatible = "sandbox,power-domain";
  337. #power-domain-cells = <1>;
  338. };
  339. power-domain-test {
  340. compatible = "sandbox,power-domain-test";
  341. power-domains = <&pwrdom 2>;
  342. };
  343. pwm {
  344. compatible = "sandbox,pwm";
  345. };
  346. pwm2 {
  347. compatible = "sandbox,pwm";
  348. };
  349. ram {
  350. compatible = "sandbox,ram";
  351. };
  352. reset@0 {
  353. compatible = "sandbox,warm-reset";
  354. };
  355. reset@1 {
  356. compatible = "sandbox,reset";
  357. };
  358. resetc: reset-ctl {
  359. compatible = "sandbox,reset-ctl";
  360. #reset-cells = <1>;
  361. };
  362. reset-ctl-test {
  363. compatible = "sandbox,reset-ctl-test";
  364. resets = <&resetc 100>, <&resetc 2>;
  365. reset-names = "other", "test";
  366. };
  367. rproc_1: rproc@1 {
  368. compatible = "sandbox,test-processor";
  369. remoteproc-name = "remoteproc-test-dev1";
  370. };
  371. rproc_2: rproc@2 {
  372. compatible = "sandbox,test-processor";
  373. internal-memory-mapped;
  374. remoteproc-name = "remoteproc-test-dev2";
  375. };
  376. smem@0 {
  377. compatible = "sandbox,smem";
  378. };
  379. spi@0 {
  380. #address-cells = <1>;
  381. #size-cells = <0>;
  382. reg = <0 1>;
  383. compatible = "sandbox,spi";
  384. cs-gpios = <0>, <&gpio_a 0>;
  385. spi.bin@0 {
  386. reg = <0>;
  387. compatible = "spansion,m25p16", "spi-flash";
  388. spi-max-frequency = <40000000>;
  389. sandbox,filename = "spi.bin";
  390. };
  391. };
  392. syscon@0 {
  393. compatible = "sandbox,syscon0";
  394. reg = <0x10 4>;
  395. };
  396. syscon@1 {
  397. compatible = "sandbox,syscon1";
  398. reg = <0x20 5
  399. 0x28 6
  400. 0x30 7
  401. 0x38 8>;
  402. };
  403. syscon@2 {
  404. compatible = "simple-mfd", "syscon";
  405. reg = <0x40 5
  406. 0x48 6
  407. 0x50 7
  408. 0x58 8>;
  409. };
  410. timer {
  411. compatible = "sandbox,timer";
  412. clock-frequency = <1000000>;
  413. };
  414. tpm2 {
  415. compatible = "sandbox,tpm2";
  416. };
  417. uart0: serial {
  418. compatible = "sandbox,serial";
  419. u-boot,dm-pre-reloc;
  420. };
  421. usb_0: usb@0 {
  422. compatible = "sandbox,usb";
  423. status = "disabled";
  424. hub {
  425. compatible = "sandbox,usb-hub";
  426. #address-cells = <1>;
  427. #size-cells = <0>;
  428. flash-stick {
  429. reg = <0>;
  430. compatible = "sandbox,usb-flash";
  431. };
  432. };
  433. };
  434. usb_1: usb@1 {
  435. compatible = "sandbox,usb";
  436. hub {
  437. compatible = "usb-hub";
  438. usb,device-class = <9>;
  439. hub-emul {
  440. compatible = "sandbox,usb-hub";
  441. #address-cells = <1>;
  442. #size-cells = <0>;
  443. flash-stick@0 {
  444. reg = <0>;
  445. compatible = "sandbox,usb-flash";
  446. sandbox,filepath = "testflash.bin";
  447. };
  448. flash-stick@1 {
  449. reg = <1>;
  450. compatible = "sandbox,usb-flash";
  451. sandbox,filepath = "testflash1.bin";
  452. };
  453. flash-stick@2 {
  454. reg = <2>;
  455. compatible = "sandbox,usb-flash";
  456. sandbox,filepath = "testflash2.bin";
  457. };
  458. keyb@3 {
  459. reg = <3>;
  460. compatible = "sandbox,usb-keyb";
  461. };
  462. };
  463. };
  464. };
  465. usb_2: usb@2 {
  466. compatible = "sandbox,usb";
  467. status = "disabled";
  468. };
  469. spmi: spmi@0 {
  470. compatible = "sandbox,spmi";
  471. #address-cells = <0x1>;
  472. #size-cells = <0x1>;
  473. pm8916@0 {
  474. compatible = "qcom,spmi-pmic";
  475. reg = <0x0 0x1>;
  476. #address-cells = <0x1>;
  477. #size-cells = <0x1>;
  478. spmi_gpios: gpios@c000 {
  479. compatible = "qcom,pm8916-gpio";
  480. reg = <0xc000 0x400>;
  481. gpio-controller;
  482. gpio-count = <4>;
  483. #gpio-cells = <2>;
  484. gpio-bank-name="spmi";
  485. };
  486. };
  487. };
  488. wdt0: wdt@0 {
  489. compatible = "sandbox,wdt";
  490. };
  491. axi: axi@0 {
  492. compatible = "sandbox,axi";
  493. #address-cells = <0x1>;
  494. #size-cells = <0x1>;
  495. store@0 {
  496. compatible = "sandbox,sandbox_store";
  497. reg = <0x0 0x400>;
  498. };
  499. };
  500. chosen {
  501. #address-cells = <1>;
  502. #size-cells = <1>;
  503. chosen-test {
  504. compatible = "denx,u-boot-fdt-test";
  505. reg = <9 1>;
  506. };
  507. };
  508. translation-test@8000 {
  509. compatible = "simple-bus";
  510. reg = <0x8000 0x4000>;
  511. #address-cells = <0x2>;
  512. #size-cells = <0x1>;
  513. ranges = <0 0x0 0x8000 0x1000
  514. 1 0x100 0x9000 0x1000
  515. 2 0x200 0xA000 0x1000
  516. 3 0x300 0xB000 0x1000
  517. >;
  518. dev@0,0 {
  519. compatible = "denx,u-boot-fdt-dummy";
  520. reg = <0 0x0 0x1000>;
  521. };
  522. dev@1,100 {
  523. compatible = "denx,u-boot-fdt-dummy";
  524. reg = <1 0x100 0x1000>;
  525. };
  526. dev@2,200 {
  527. compatible = "denx,u-boot-fdt-dummy";
  528. reg = <2 0x200 0x1000>;
  529. };
  530. noxlatebus@3,300 {
  531. compatible = "simple-bus";
  532. reg = <3 0x300 0x1000>;
  533. #address-cells = <0x1>;
  534. #size-cells = <0x0>;
  535. dev@42 {
  536. compatible = "denx,u-boot-fdt-dummy";
  537. reg = <0x42>;
  538. };
  539. };
  540. };
  541. };
  542. #include "sandbox_pmic.dtsi"