spl.c 2.8 KB

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  1. /*
  2. * Copyright 2015 - 2016 Xilinx, Inc.
  3. *
  4. * Michal Simek <michal.simek@xilinx.com>
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #include <common.h>
  9. #include <debug_uart.h>
  10. #include <spl.h>
  11. #include <asm/io.h>
  12. #include <asm/spl.h>
  13. #include <asm/arch/hardware.h>
  14. #include <asm/arch/sys_proto.h>
  15. void board_init_f(ulong dummy)
  16. {
  17. psu_init();
  18. board_early_init_r();
  19. #ifdef CONFIG_DEBUG_UART
  20. /* Uart debug for sure */
  21. debug_uart_init();
  22. puts("Debug uart enabled\n"); /* or printch() */
  23. #endif
  24. /* Delay is required for clocks to be propagated */
  25. udelay(1000000);
  26. /* Clear the BSS */
  27. memset(__bss_start, 0, __bss_end - __bss_start);
  28. /* No need to call timer init - it is empty for ZynqMP */
  29. board_init_r(NULL, 0);
  30. }
  31. static void ps_mode_reset(ulong mode)
  32. {
  33. writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
  34. mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
  35. &crlapb_base->boot_pin_ctrl);
  36. udelay(1);
  37. writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
  38. &crlapb_base->boot_pin_ctrl);
  39. udelay(5);
  40. writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
  41. mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
  42. &crlapb_base->boot_pin_ctrl);
  43. }
  44. /*
  45. * Set default PS_MODE1 which is used for USB ULPI phy reset
  46. * Also other resets can be connected to this certain pin
  47. */
  48. #ifndef MODE_RESET
  49. # define MODE_RESET PS_MODE1
  50. #endif
  51. #ifdef CONFIG_SPL_BOARD_INIT
  52. void spl_board_init(void)
  53. {
  54. preloader_console_init();
  55. ps_mode_reset(MODE_RESET);
  56. board_init();
  57. }
  58. #endif
  59. u32 spl_boot_device(void)
  60. {
  61. u32 reg = 0;
  62. u8 bootmode;
  63. #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
  64. /* Change default boot mode at run-time */
  65. writel(BOOT_MODE_USE_ALT |
  66. CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
  67. &crlapb_base->boot_mode);
  68. #endif
  69. reg = readl(&crlapb_base->boot_mode);
  70. bootmode = reg & BOOT_MODES_MASK;
  71. switch (bootmode) {
  72. case JTAG_MODE:
  73. return BOOT_DEVICE_RAM;
  74. #ifdef CONFIG_SPL_MMC_SUPPORT
  75. case EMMC_MODE:
  76. case SD_MODE:
  77. case SD_MODE1:
  78. return BOOT_DEVICE_MMC1;
  79. #endif
  80. #ifdef CONFIG_SPL_DFU_SUPPORT
  81. case USB_MODE:
  82. return BOOT_DEVICE_DFU;
  83. #endif
  84. default:
  85. printf("Invalid Boot Mode:0x%x\n", bootmode);
  86. break;
  87. }
  88. return 0;
  89. }
  90. u32 spl_boot_mode(const u32 boot_device)
  91. {
  92. switch (spl_boot_device()) {
  93. case BOOT_DEVICE_RAM:
  94. return 0;
  95. case BOOT_DEVICE_MMC1:
  96. return MMCSD_MODE_FS;
  97. default:
  98. puts("spl: error: unsupported device\n");
  99. hang();
  100. }
  101. }
  102. __weak void psu_init(void)
  103. {
  104. /*
  105. * This function is overridden by the one in
  106. * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
  107. */
  108. }
  109. #ifdef CONFIG_SPL_OS_BOOT
  110. int spl_start_uboot(void)
  111. {
  112. return 0;
  113. }
  114. #endif
  115. #ifdef CONFIG_SPL_LOAD_FIT
  116. int board_fit_config_name_match(const char *name)
  117. {
  118. /* Just empty function now - can't decide what to choose */
  119. debug("%s: %s\n", __func__, name);
  120. return 0;
  121. }
  122. #endif