cmd_ide.c 50 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #include <ide.h>
  44. #include <ata.h>
  45. #ifdef CONFIG_STATUS_LED
  46. # include <status_led.h>
  47. #endif
  48. #ifdef CONFIG_IDE_8xx_DIRECT
  49. DECLARE_GLOBAL_DATA_PTR;
  50. #endif
  51. #ifdef __PPC__
  52. # define EIEIO __asm__ volatile ("eieio")
  53. # define SYNC __asm__ volatile ("sync")
  54. #else
  55. # define EIEIO /* nothing */
  56. # define SYNC /* nothing */
  57. #endif
  58. #ifdef CONFIG_IDE_8xx_DIRECT
  59. /* Timings for IDE Interface
  60. *
  61. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  62. * 70 165 30 PIO-Mode 0, [ns]
  63. * 4 9 2 [Cycles]
  64. * 50 125 20 PIO-Mode 1, [ns]
  65. * 3 7 2 [Cycles]
  66. * 30 100 15 PIO-Mode 2, [ns]
  67. * 2 6 1 [Cycles]
  68. * 30 80 10 PIO-Mode 3, [ns]
  69. * 2 5 1 [Cycles]
  70. * 25 70 10 PIO-Mode 4, [ns]
  71. * 2 4 1 [Cycles]
  72. */
  73. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  74. {
  75. /* Setup Length Hold */
  76. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  77. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  78. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  79. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  80. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  81. };
  82. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  83. #ifndef CONFIG_SYS_PIO_MODE
  84. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  85. #endif
  86. static int pio_mode = CONFIG_SYS_PIO_MODE;
  87. /* Make clock cycles and always round up */
  88. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  89. #endif /* CONFIG_IDE_8xx_DIRECT */
  90. /* ------------------------------------------------------------------------- */
  91. /* Current I/O Device */
  92. static int curr_device = -1;
  93. /* Current offset for IDE0 / IDE1 bus access */
  94. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  95. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  96. CONFIG_SYS_ATA_IDE0_OFFSET,
  97. #endif
  98. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  99. CONFIG_SYS_ATA_IDE1_OFFSET,
  100. #endif
  101. };
  102. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  103. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  104. /* ------------------------------------------------------------------------- */
  105. #ifdef CONFIG_IDE_LED
  106. # if !defined(CONFIG_BMS2003) && \
  107. !defined(CONFIG_CPC45) && \
  108. !defined(CONFIG_KUP4K) && \
  109. !defined(CONFIG_KUP4X)
  110. static void ide_led (uchar led, uchar status);
  111. #else
  112. extern void ide_led (uchar led, uchar status);
  113. #endif
  114. #else
  115. #define ide_led(a,b) /* dummy */
  116. #endif
  117. #ifdef CONFIG_IDE_RESET
  118. static void ide_reset (void);
  119. #else
  120. #define ide_reset() /* dummy */
  121. #endif
  122. static void ide_ident (block_dev_desc_t *dev_desc);
  123. static uchar ide_wait (int dev, ulong t);
  124. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  125. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  126. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  127. static void input_data(int dev, ulong *sect_buf, int words);
  128. static void output_data(int dev, ulong *sect_buf, int words);
  129. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  130. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  131. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  132. #endif
  133. #ifdef CONFIG_ATAPI
  134. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  135. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  136. #endif
  137. #ifdef CONFIG_IDE_8xx_DIRECT
  138. static void set_pcmcia_timing (int pmode);
  139. #endif
  140. /* ------------------------------------------------------------------------- */
  141. int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  142. {
  143. int rcode = 0;
  144. switch (argc) {
  145. case 0:
  146. case 1:
  147. return cmd_usage(cmdtp);
  148. case 2:
  149. if (strncmp(argv[1],"res",3) == 0) {
  150. puts ("\nReset IDE"
  151. #ifdef CONFIG_IDE_8xx_DIRECT
  152. " on PCMCIA " PCMCIA_SLOT_MSG
  153. #endif
  154. ": ");
  155. ide_init ();
  156. return 0;
  157. } else if (strncmp(argv[1],"inf",3) == 0) {
  158. int i;
  159. putc ('\n');
  160. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  161. if (ide_dev_desc[i].type==DEV_TYPE_UNKNOWN)
  162. continue; /* list only known devices */
  163. printf ("IDE device %d: ", i);
  164. dev_print(&ide_dev_desc[i]);
  165. }
  166. return 0;
  167. } else if (strncmp(argv[1],"dev",3) == 0) {
  168. if ((curr_device < 0) || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  169. puts ("\nno IDE devices available\n");
  170. return 1;
  171. }
  172. printf ("\nIDE device %d: ", curr_device);
  173. dev_print(&ide_dev_desc[curr_device]);
  174. return 0;
  175. } else if (strncmp(argv[1],"part",4) == 0) {
  176. int dev, ok;
  177. for (ok=0, dev=0; dev<CONFIG_SYS_IDE_MAXDEVICE; ++dev) {
  178. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  179. ++ok;
  180. if (dev)
  181. putc ('\n');
  182. print_part(&ide_dev_desc[dev]);
  183. }
  184. }
  185. if (!ok) {
  186. puts ("\nno IDE devices available\n");
  187. rcode ++;
  188. }
  189. return rcode;
  190. }
  191. return cmd_usage(cmdtp);
  192. case 3:
  193. if (strncmp(argv[1],"dev",3) == 0) {
  194. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  195. printf ("\nIDE device %d: ", dev);
  196. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  197. puts ("unknown device\n");
  198. return 1;
  199. }
  200. dev_print(&ide_dev_desc[dev]);
  201. /*ide_print (dev);*/
  202. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  203. return 1;
  204. }
  205. curr_device = dev;
  206. puts ("... is now current device\n");
  207. return 0;
  208. } else if (strncmp(argv[1],"part",4) == 0) {
  209. int dev = (int)simple_strtoul(argv[2], NULL, 10);
  210. if (ide_dev_desc[dev].part_type!=PART_TYPE_UNKNOWN) {
  211. print_part(&ide_dev_desc[dev]);
  212. } else {
  213. printf ("\nIDE device %d not available\n", dev);
  214. rcode = 1;
  215. }
  216. return rcode;
  217. #if 0
  218. } else if (strncmp(argv[1],"pio",4) == 0) {
  219. int mode = (int)simple_strtoul(argv[2], NULL, 10);
  220. if ((mode >= 0) && (mode <= IDE_MAX_PIO_MODE)) {
  221. puts ("\nSetting ");
  222. pio_mode = mode;
  223. ide_init ();
  224. } else {
  225. printf ("\nInvalid PIO mode %d (0 ... %d only)\n",
  226. mode, IDE_MAX_PIO_MODE);
  227. }
  228. return;
  229. #endif
  230. }
  231. return cmd_usage(cmdtp);
  232. default:
  233. /* at least 4 args */
  234. if (strcmp(argv[1],"read") == 0) {
  235. ulong addr = simple_strtoul(argv[2], NULL, 16);
  236. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  237. ulong n;
  238. #ifdef CONFIG_SYS_64BIT_LBA
  239. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  240. printf ("\nIDE read: device %d block # %Ld, count %ld ... ",
  241. curr_device, blk, cnt);
  242. #else
  243. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  244. printf ("\nIDE read: device %d block # %ld, count %ld ... ",
  245. curr_device, blk, cnt);
  246. #endif
  247. n = ide_dev_desc[curr_device].block_read (curr_device,
  248. blk, cnt,
  249. (ulong *)addr);
  250. /* flush cache after read */
  251. flush_cache (addr, cnt*ide_dev_desc[curr_device].blksz);
  252. printf ("%ld blocks read: %s\n",
  253. n, (n==cnt) ? "OK" : "ERROR");
  254. if (n==cnt) {
  255. return 0;
  256. } else {
  257. return 1;
  258. }
  259. } else if (strcmp(argv[1],"write") == 0) {
  260. ulong addr = simple_strtoul(argv[2], NULL, 16);
  261. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  262. ulong n;
  263. #ifdef CONFIG_SYS_64BIT_LBA
  264. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  265. printf ("\nIDE write: device %d block # %Ld, count %ld ... ",
  266. curr_device, blk, cnt);
  267. #else
  268. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  269. printf ("\nIDE write: device %d block # %ld, count %ld ... ",
  270. curr_device, blk, cnt);
  271. #endif
  272. n = ide_write (curr_device, blk, cnt, (ulong *)addr);
  273. printf ("%ld blocks written: %s\n",
  274. n, (n==cnt) ? "OK" : "ERROR");
  275. if (n==cnt)
  276. return 0;
  277. else
  278. return 1;
  279. } else {
  280. return cmd_usage(cmdtp);
  281. }
  282. return rcode;
  283. }
  284. }
  285. int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  286. {
  287. char *boot_device = NULL;
  288. char *ep;
  289. int dev, part = 0;
  290. ulong addr, cnt;
  291. disk_partition_t info;
  292. image_header_t *hdr;
  293. int rcode = 0;
  294. #if defined(CONFIG_FIT)
  295. const void *fit_hdr = NULL;
  296. #endif
  297. show_boot_progress (41);
  298. switch (argc) {
  299. case 1:
  300. addr = CONFIG_SYS_LOAD_ADDR;
  301. boot_device = getenv ("bootdevice");
  302. break;
  303. case 2:
  304. addr = simple_strtoul(argv[1], NULL, 16);
  305. boot_device = getenv ("bootdevice");
  306. break;
  307. case 3:
  308. addr = simple_strtoul(argv[1], NULL, 16);
  309. boot_device = argv[2];
  310. break;
  311. default:
  312. show_boot_progress (-42);
  313. return cmd_usage(cmdtp);
  314. }
  315. show_boot_progress (42);
  316. if (!boot_device) {
  317. puts ("\n** No boot device **\n");
  318. show_boot_progress (-43);
  319. return 1;
  320. }
  321. show_boot_progress (43);
  322. dev = simple_strtoul(boot_device, &ep, 16);
  323. if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
  324. printf ("\n** Device %d not available\n", dev);
  325. show_boot_progress (-44);
  326. return 1;
  327. }
  328. show_boot_progress (44);
  329. if (*ep) {
  330. if (*ep != ':') {
  331. puts ("\n** Invalid boot device, use `dev[:part]' **\n");
  332. show_boot_progress (-45);
  333. return 1;
  334. }
  335. part = simple_strtoul(++ep, NULL, 16);
  336. }
  337. show_boot_progress (45);
  338. if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
  339. show_boot_progress (-46);
  340. return 1;
  341. }
  342. show_boot_progress (46);
  343. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
  344. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
  345. printf ("\n** Invalid partition type \"%.32s\""
  346. " (expect \"" BOOT_PART_TYPE "\")\n",
  347. info.type);
  348. show_boot_progress (-47);
  349. return 1;
  350. }
  351. show_boot_progress (47);
  352. printf ("\nLoading from IDE device %d, partition %d: "
  353. "Name: %.32s Type: %.32s\n",
  354. dev, part, info.name, info.type);
  355. debug ("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  356. info.start, info.size, info.blksz);
  357. if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
  358. printf ("** Read error on %d:%d\n", dev, part);
  359. show_boot_progress (-48);
  360. return 1;
  361. }
  362. show_boot_progress (48);
  363. switch (genimg_get_format ((void *)addr)) {
  364. case IMAGE_FORMAT_LEGACY:
  365. hdr = (image_header_t *)addr;
  366. show_boot_progress (49);
  367. if (!image_check_hcrc (hdr)) {
  368. puts ("\n** Bad Header Checksum **\n");
  369. show_boot_progress (-50);
  370. return 1;
  371. }
  372. show_boot_progress (50);
  373. image_print_contents (hdr);
  374. cnt = image_get_image_size (hdr);
  375. break;
  376. #if defined(CONFIG_FIT)
  377. case IMAGE_FORMAT_FIT:
  378. fit_hdr = (const void *)addr;
  379. puts ("Fit image detected...\n");
  380. cnt = fit_get_size (fit_hdr);
  381. break;
  382. #endif
  383. default:
  384. show_boot_progress (-49);
  385. puts ("** Unknown image type\n");
  386. return 1;
  387. }
  388. cnt += info.blksz - 1;
  389. cnt /= info.blksz;
  390. cnt -= 1;
  391. if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
  392. (ulong *)(addr+info.blksz)) != cnt) {
  393. printf ("** Read error on %d:%d\n", dev, part);
  394. show_boot_progress (-51);
  395. return 1;
  396. }
  397. show_boot_progress (51);
  398. #if defined(CONFIG_FIT)
  399. /* This cannot be done earlier, we need complete FIT image in RAM first */
  400. if (genimg_get_format ((void *)addr) == IMAGE_FORMAT_FIT) {
  401. if (!fit_check_format (fit_hdr)) {
  402. show_boot_progress (-140);
  403. puts ("** Bad FIT image format\n");
  404. return 1;
  405. }
  406. show_boot_progress (141);
  407. fit_print_contents (fit_hdr);
  408. }
  409. #endif
  410. /* Loading ok, update default load address */
  411. load_addr = addr;
  412. /* Check if we should attempt an auto-start */
  413. if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) {
  414. char *local_args[2];
  415. extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
  416. local_args[0] = argv[0];
  417. local_args[1] = NULL;
  418. printf ("Automatic boot of image at addr 0x%08lX ...\n", addr);
  419. do_bootm (cmdtp, 0, 1, local_args);
  420. rcode = 1;
  421. }
  422. return rcode;
  423. }
  424. /* ------------------------------------------------------------------------- */
  425. void inline
  426. __ide_outb(int dev, int port, unsigned char val)
  427. {
  428. debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  429. dev, port, val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  430. outb(val, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  431. }
  432. void ide_outb (int dev, int port, unsigned char val)
  433. __attribute__((weak, alias("__ide_outb")));
  434. unsigned char inline
  435. __ide_inb(int dev, int port)
  436. {
  437. uchar val;
  438. val = inb((ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)));
  439. debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  440. dev, port, (ATA_CURR_BASE(dev)+CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  441. return val;
  442. }
  443. unsigned char ide_inb(int dev, int port)
  444. __attribute__((weak, alias("__ide_inb")));
  445. #ifdef CONFIG_TUNE_PIO
  446. int inline
  447. __ide_set_piomode(int pio_mode)
  448. {
  449. return 0;
  450. }
  451. int inline ide_set_piomode(int pio_mode)
  452. __attribute__((weak, alias("__ide_set_piomode")));
  453. #endif
  454. void ide_init (void)
  455. {
  456. #ifdef CONFIG_IDE_8xx_DIRECT
  457. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  458. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  459. #endif
  460. unsigned char c;
  461. int i, bus;
  462. #if defined(CONFIG_SC3)
  463. unsigned int ata_reset_time = ATA_RESET_TIME;
  464. #endif
  465. #ifdef CONFIG_IDE_8xx_PCCARD
  466. extern int pcmcia_on (void);
  467. extern int ide_devices_found; /* Initialized in check_ide_device() */
  468. #endif /* CONFIG_IDE_8xx_PCCARD */
  469. #ifdef CONFIG_IDE_PREINIT
  470. extern int ide_preinit (void);
  471. WATCHDOG_RESET();
  472. if (ide_preinit ()) {
  473. puts ("ide_preinit failed\n");
  474. return;
  475. }
  476. #endif /* CONFIG_IDE_PREINIT */
  477. #ifdef CONFIG_IDE_8xx_PCCARD
  478. extern int pcmcia_on (void);
  479. extern int ide_devices_found; /* Initialized in check_ide_device() */
  480. WATCHDOG_RESET();
  481. ide_devices_found = 0;
  482. /* initialize the PCMCIA IDE adapter card */
  483. pcmcia_on();
  484. if (!ide_devices_found)
  485. return;
  486. udelay (1000000); /* 1 s */
  487. #endif /* CONFIG_IDE_8xx_PCCARD */
  488. WATCHDOG_RESET();
  489. #ifdef CONFIG_IDE_8xx_DIRECT
  490. /* Initialize PIO timing tables */
  491. for (i=0; i <= IDE_MAX_PIO_MODE; ++i) {
  492. pio_config_clk[i].t_setup = PCMCIA_MK_CLKS(pio_config_ns[i].t_setup,
  493. gd->bus_clk);
  494. pio_config_clk[i].t_length = PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  495. gd->bus_clk);
  496. pio_config_clk[i].t_hold = PCMCIA_MK_CLKS(pio_config_ns[i].t_hold,
  497. gd->bus_clk);
  498. debug ( "PIO Mode %d: setup=%2d ns/%d clk"
  499. " len=%3d ns/%d clk"
  500. " hold=%2d ns/%d clk\n",
  501. i,
  502. pio_config_ns[i].t_setup, pio_config_clk[i].t_setup,
  503. pio_config_ns[i].t_length, pio_config_clk[i].t_length,
  504. pio_config_ns[i].t_hold, pio_config_clk[i].t_hold);
  505. }
  506. #endif /* CONFIG_IDE_8xx_DIRECT */
  507. /* Reset the IDE just to be sure.
  508. * Light LED's to show
  509. */
  510. ide_led ((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  511. ide_reset (); /* ATAPI Drives seems to need a proper IDE Reset */
  512. #ifdef CONFIG_IDE_8xx_DIRECT
  513. /* PCMCIA / IDE initialization for common mem space */
  514. pcmp->pcmc_pgcrb = 0;
  515. /* start in PIO mode 0 - most relaxed timings */
  516. pio_mode = 0;
  517. set_pcmcia_timing (pio_mode);
  518. #endif /* CONFIG_IDE_8xx_DIRECT */
  519. /*
  520. * Wait for IDE to get ready.
  521. * According to spec, this can take up to 31 seconds!
  522. */
  523. for (bus=0; bus<CONFIG_SYS_IDE_MAXBUS; ++bus) {
  524. int dev = bus * (CONFIG_SYS_IDE_MAXDEVICE / CONFIG_SYS_IDE_MAXBUS);
  525. #ifdef CONFIG_IDE_8xx_PCCARD
  526. /* Skip non-ide devices from probing */
  527. if ((ide_devices_found & (1 << bus)) == 0) {
  528. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  529. continue;
  530. }
  531. #endif
  532. printf ("Bus %d: ", bus);
  533. ide_bus_ok[bus] = 0;
  534. /* Select device
  535. */
  536. udelay (100000); /* 100 ms */
  537. ide_outb (dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  538. udelay (100000); /* 100 ms */
  539. i = 0;
  540. do {
  541. udelay (10000); /* 10 ms */
  542. c = ide_inb (dev, ATA_STATUS);
  543. i++;
  544. #if defined(CONFIG_SC3)
  545. if (i > (ata_reset_time * 100)) {
  546. #else
  547. if (i > (ATA_RESET_TIME * 100)) {
  548. #endif
  549. puts ("** Timeout **\n");
  550. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  551. return;
  552. }
  553. if ((i >= 100) && ((i%100)==0)) {
  554. putc ('.');
  555. }
  556. } while (c & ATA_STAT_BUSY);
  557. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  558. puts ("not available ");
  559. debug ("Status = 0x%02X ", c);
  560. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  561. } else if ((c & ATA_STAT_READY) == 0) {
  562. puts ("not available ");
  563. debug ("Status = 0x%02X ", c);
  564. #endif
  565. } else {
  566. puts ("OK ");
  567. ide_bus_ok[bus] = 1;
  568. }
  569. WATCHDOG_RESET();
  570. }
  571. putc ('\n');
  572. ide_led ((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  573. curr_device = -1;
  574. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  575. #ifdef CONFIG_IDE_LED
  576. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  577. #endif
  578. ide_dev_desc[i].type=DEV_TYPE_UNKNOWN;
  579. ide_dev_desc[i].if_type=IF_TYPE_IDE;
  580. ide_dev_desc[i].dev=i;
  581. ide_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
  582. ide_dev_desc[i].blksz=0;
  583. ide_dev_desc[i].lba=0;
  584. ide_dev_desc[i].block_read=ide_read;
  585. if (!ide_bus_ok[IDE_BUS(i)])
  586. continue;
  587. ide_led (led, 1); /* LED on */
  588. ide_ident(&ide_dev_desc[i]);
  589. ide_led (led, 0); /* LED off */
  590. dev_print(&ide_dev_desc[i]);
  591. /* ide_print (i); */
  592. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  593. init_part (&ide_dev_desc[i]); /* initialize partition type */
  594. if (curr_device < 0)
  595. curr_device = i;
  596. }
  597. }
  598. WATCHDOG_RESET();
  599. }
  600. /* ------------------------------------------------------------------------- */
  601. block_dev_desc_t * ide_get_dev(int dev)
  602. {
  603. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  604. }
  605. #ifdef CONFIG_IDE_8xx_DIRECT
  606. static void
  607. set_pcmcia_timing (int pmode)
  608. {
  609. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  610. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  611. ulong timings;
  612. debug ("Set timing for PIO Mode %d\n", pmode);
  613. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  614. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  615. | PCMCIA_SL (pio_config_clk[pmode].t_length)
  616. ;
  617. /* IDE 0
  618. */
  619. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  620. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  621. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  622. | timings
  623. #endif
  624. ;
  625. debug ("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  626. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  627. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  628. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  629. | timings
  630. #endif
  631. ;
  632. debug ("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  633. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  634. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  635. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  636. | timings
  637. #endif
  638. ;
  639. debug ("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  640. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  641. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  642. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  643. | timings
  644. #endif
  645. ;
  646. debug ("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  647. /* IDE 1
  648. */
  649. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  650. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  651. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  652. | timings
  653. #endif
  654. ;
  655. debug ("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  656. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  657. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  658. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  659. | timings
  660. #endif
  661. ;
  662. debug ("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  663. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  664. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  665. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  666. | timings
  667. #endif
  668. ;
  669. debug ("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  670. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  671. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  672. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  673. | timings
  674. #endif
  675. ;
  676. debug ("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  677. }
  678. #endif /* CONFIG_IDE_8xx_DIRECT */
  679. /* ------------------------------------------------------------------------- */
  680. /* We only need to swap data if we are running on a big endian cpu. */
  681. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  682. #if defined(__LITTLE_ENDIAN) || ( defined(CONFIG_AU1X00) && !defined(CONFIG_GTH2) )
  683. #define input_swap_data(x,y,z) input_data(x,y,z)
  684. #else
  685. static void
  686. input_swap_data(int dev, ulong *sect_buf, int words)
  687. {
  688. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  689. uchar i;
  690. volatile uchar *pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  691. volatile uchar *pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  692. ushort *dbuf = (ushort *)sect_buf;
  693. while (words--) {
  694. for (i=0; i<2; i++) {
  695. *(((uchar *)(dbuf)) + 1) = *pbuf_even;
  696. *(uchar *)dbuf = *pbuf_odd;
  697. dbuf+=1;
  698. }
  699. }
  700. #else
  701. volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  702. ushort *dbuf = (ushort *)sect_buf;
  703. debug("in input swap data base for read is %lx\n", (unsigned long) pbuf);
  704. while (words--) {
  705. #ifdef __MIPS__
  706. *dbuf++ = swab16p((u16*)pbuf);
  707. *dbuf++ = swab16p((u16*)pbuf);
  708. #elif defined(CONFIG_PCS440EP)
  709. *dbuf++ = *pbuf;
  710. *dbuf++ = *pbuf;
  711. #else
  712. *dbuf++ = ld_le16(pbuf);
  713. *dbuf++ = ld_le16(pbuf);
  714. #endif /* !MIPS */
  715. }
  716. #endif
  717. }
  718. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  719. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  720. static void
  721. output_data(int dev, ulong *sect_buf, int words)
  722. {
  723. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  724. uchar *dbuf;
  725. volatile uchar *pbuf_even;
  726. volatile uchar *pbuf_odd;
  727. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  728. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  729. dbuf = (uchar *)sect_buf;
  730. while (words--) {
  731. EIEIO;
  732. *pbuf_even = *dbuf++;
  733. EIEIO;
  734. *pbuf_odd = *dbuf++;
  735. EIEIO;
  736. *pbuf_even = *dbuf++;
  737. EIEIO;
  738. *pbuf_odd = *dbuf++;
  739. }
  740. #else
  741. ushort *dbuf;
  742. volatile ushort *pbuf;
  743. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  744. dbuf = (ushort *)sect_buf;
  745. while (words--) {
  746. #if defined(CONFIG_PCS440EP)
  747. /* not tested, because CF was write protected */
  748. EIEIO;
  749. *pbuf = ld_le16(dbuf++);
  750. EIEIO;
  751. *pbuf = ld_le16(dbuf++);
  752. #else
  753. EIEIO;
  754. *pbuf = *dbuf++;
  755. EIEIO;
  756. *pbuf = *dbuf++;
  757. #endif
  758. }
  759. #endif
  760. }
  761. #else /* ! __PPC__ */
  762. static void
  763. output_data(int dev, ulong *sect_buf, int words)
  764. {
  765. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
  766. }
  767. #endif /* __PPC__ */
  768. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
  769. static void
  770. input_data(int dev, ulong *sect_buf, int words)
  771. {
  772. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  773. uchar *dbuf;
  774. volatile uchar *pbuf_even;
  775. volatile uchar *pbuf_odd;
  776. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  777. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  778. dbuf = (uchar *)sect_buf;
  779. while (words--) {
  780. *dbuf++ = *pbuf_even;
  781. EIEIO;
  782. SYNC;
  783. *dbuf++ = *pbuf_odd;
  784. EIEIO;
  785. SYNC;
  786. *dbuf++ = *pbuf_even;
  787. EIEIO;
  788. SYNC;
  789. *dbuf++ = *pbuf_odd;
  790. EIEIO;
  791. SYNC;
  792. }
  793. #else
  794. ushort *dbuf;
  795. volatile ushort *pbuf;
  796. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  797. dbuf = (ushort *)sect_buf;
  798. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  799. while (words--) {
  800. #if defined(CONFIG_PCS440EP)
  801. EIEIO;
  802. *dbuf++ = ld_le16(pbuf);
  803. EIEIO;
  804. *dbuf++ = ld_le16(pbuf);
  805. #else
  806. EIEIO;
  807. *dbuf++ = *pbuf;
  808. EIEIO;
  809. *dbuf++ = *pbuf;
  810. #endif
  811. }
  812. #endif
  813. }
  814. #else /* ! __PPC__ */
  815. static void
  816. input_data(int dev, ulong *sect_buf, int words)
  817. {
  818. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
  819. }
  820. #endif /* __PPC__ */
  821. /* -------------------------------------------------------------------------
  822. */
  823. static void ide_ident (block_dev_desc_t *dev_desc)
  824. {
  825. ulong iobuf[ATA_SECTORWORDS];
  826. unsigned char c;
  827. hd_driveid_t *iop = (hd_driveid_t *)iobuf;
  828. #ifdef CONFIG_ATAPI
  829. int retries = 0;
  830. int do_retry = 0;
  831. #endif
  832. #ifdef CONFIG_TUNE_PIO
  833. int pio_mode;
  834. #endif
  835. #if 0
  836. int mode, cycle_time;
  837. #endif
  838. int device;
  839. device=dev_desc->dev;
  840. printf (" Device %d: ", device);
  841. ide_led (DEVICE_LED(device), 1); /* LED on */
  842. /* Select device
  843. */
  844. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  845. dev_desc->if_type=IF_TYPE_IDE;
  846. #ifdef CONFIG_ATAPI
  847. do_retry = 0;
  848. retries = 0;
  849. /* Warning: This will be tricky to read */
  850. while (retries <= 1) {
  851. /* check signature */
  852. if ((ide_inb(device,ATA_SECT_CNT) == 0x01) &&
  853. (ide_inb(device,ATA_SECT_NUM) == 0x01) &&
  854. (ide_inb(device,ATA_CYL_LOW) == 0x14) &&
  855. (ide_inb(device,ATA_CYL_HIGH) == 0xEB)) {
  856. /* ATAPI Signature found */
  857. dev_desc->if_type=IF_TYPE_ATAPI;
  858. /* Start Ident Command
  859. */
  860. ide_outb (device, ATA_COMMAND, ATAPI_CMD_IDENT);
  861. /*
  862. * Wait for completion - ATAPI devices need more time
  863. * to become ready
  864. */
  865. c = ide_wait (device, ATAPI_TIME_OUT);
  866. } else
  867. #endif
  868. {
  869. /* Start Ident Command
  870. */
  871. ide_outb (device, ATA_COMMAND, ATA_CMD_IDENT);
  872. /* Wait for completion
  873. */
  874. c = ide_wait (device, IDE_TIME_OUT);
  875. }
  876. ide_led (DEVICE_LED(device), 0); /* LED off */
  877. if (((c & ATA_STAT_DRQ) == 0) ||
  878. ((c & (ATA_STAT_FAULT|ATA_STAT_ERR)) != 0) ) {
  879. #ifdef CONFIG_ATAPI
  880. {
  881. /* Need to soft reset the device in case it's an ATAPI... */
  882. debug ("Retrying...\n");
  883. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  884. udelay(100000);
  885. ide_outb (device, ATA_COMMAND, 0x08);
  886. udelay (500000); /* 500 ms */
  887. }
  888. /* Select device
  889. */
  890. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  891. retries++;
  892. #else
  893. return;
  894. #endif
  895. }
  896. #ifdef CONFIG_ATAPI
  897. else
  898. break;
  899. } /* see above - ugly to read */
  900. if (retries == 2) /* Not found */
  901. return;
  902. #endif
  903. input_swap_data (device, iobuf, ATA_SECTORWORDS);
  904. ident_cpy ((unsigned char*)dev_desc->revision, iop->fw_rev, sizeof(dev_desc->revision));
  905. ident_cpy ((unsigned char*)dev_desc->vendor, iop->model, sizeof(dev_desc->vendor));
  906. ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
  907. #ifdef __LITTLE_ENDIAN
  908. /*
  909. * firmware revision, model, and serial number have Big Endian Byte
  910. * order in Word. Convert all three to little endian.
  911. *
  912. * See CF+ and CompactFlash Specification Revision 2.0:
  913. * 6.2.1.6: Identify Drive, Table 39 for more details
  914. */
  915. strswab (dev_desc->revision);
  916. strswab (dev_desc->vendor);
  917. strswab (dev_desc->product);
  918. #endif /* __LITTLE_ENDIAN */
  919. if ((iop->config & 0x0080)==0x0080)
  920. dev_desc->removable = 1;
  921. else
  922. dev_desc->removable = 0;
  923. #ifdef CONFIG_TUNE_PIO
  924. /* Mode 0 - 2 only, are directly determined by word 51. */
  925. pio_mode = iop->tPIO;
  926. if (pio_mode > 2) {
  927. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  928. pio_mode = 0; /* Force it to dead slow, and hope for the best... */
  929. }
  930. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  931. * shall set bit 1 of word 53 to one and support the fields contained
  932. * in words 64 through 70.
  933. */
  934. if (iop->field_valid & 0x02) {
  935. /* Mode 3 and above are possible. Check in order from slow
  936. * to fast, so we wind up with the highest mode allowed.
  937. */
  938. if (iop->eide_pio_modes & 0x01)
  939. pio_mode = 3;
  940. if (iop->eide_pio_modes & 0x02)
  941. pio_mode = 4;
  942. if (ata_id_is_cfa((u16 *)iop)) {
  943. if ((iop->cf_advanced_caps & 0x07) == 0x01)
  944. pio_mode = 5;
  945. if ((iop->cf_advanced_caps & 0x07) == 0x02)
  946. pio_mode = 6;
  947. }
  948. }
  949. /* System-specific, depends on bus speeds, etc. */
  950. ide_set_piomode(pio_mode);
  951. #endif /* CONFIG_TUNE_PIO */
  952. #if 0
  953. /*
  954. * Drive PIO mode autoselection
  955. */
  956. mode = iop->tPIO;
  957. printf ("tPIO = 0x%02x = %d\n",mode, mode);
  958. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  959. mode = 2;
  960. debug ("Override tPIO -> 2\n");
  961. }
  962. if (iop->field_valid & 2) { /* drive implements ATA2? */
  963. debug ("Drive implements ATA2\n");
  964. if (iop->capability & 8) { /* drive supports use_iordy? */
  965. cycle_time = iop->eide_pio_iordy;
  966. } else {
  967. cycle_time = iop->eide_pio;
  968. }
  969. debug ("cycle time = %d\n", cycle_time);
  970. mode = 4;
  971. if (cycle_time > 120) mode = 3; /* 120 ns for PIO mode 4 */
  972. if (cycle_time > 180) mode = 2; /* 180 ns for PIO mode 3 */
  973. if (cycle_time > 240) mode = 1; /* 240 ns for PIO mode 4 */
  974. if (cycle_time > 383) mode = 0; /* 383 ns for PIO mode 4 */
  975. }
  976. printf ("PIO mode to use: PIO %d\n", mode);
  977. #endif /* 0 */
  978. #ifdef CONFIG_ATAPI
  979. if (dev_desc->if_type==IF_TYPE_ATAPI) {
  980. atapi_inquiry(dev_desc);
  981. return;
  982. }
  983. #endif /* CONFIG_ATAPI */
  984. #ifdef __BIG_ENDIAN
  985. /* swap shorts */
  986. dev_desc->lba = (iop->lba_capacity << 16) | (iop->lba_capacity >> 16);
  987. #else /* ! __BIG_ENDIAN */
  988. /*
  989. * do not swap shorts on little endian
  990. *
  991. * See CF+ and CompactFlash Specification Revision 2.0:
  992. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  993. */
  994. dev_desc->lba = iop->lba_capacity;
  995. #endif /* __BIG_ENDIAN */
  996. #ifdef CONFIG_LBA48
  997. if (iop->command_set_2 & 0x0400) { /* LBA 48 support */
  998. dev_desc->lba48 = 1;
  999. dev_desc->lba = (unsigned long long)iop->lba48_capacity[0] |
  1000. ((unsigned long long)iop->lba48_capacity[1] << 16) |
  1001. ((unsigned long long)iop->lba48_capacity[2] << 32) |
  1002. ((unsigned long long)iop->lba48_capacity[3] << 48);
  1003. } else {
  1004. dev_desc->lba48 = 0;
  1005. }
  1006. #endif /* CONFIG_LBA48 */
  1007. /* assuming HD */
  1008. dev_desc->type=DEV_TYPE_HARDDISK;
  1009. dev_desc->blksz=ATA_BLOCKSIZE;
  1010. dev_desc->lun=0; /* just to fill something in... */
  1011. #if 0 /* only used to test the powersaving mode,
  1012. * if enabled, the drive goes after 5 sec
  1013. * in standby mode */
  1014. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1015. c = ide_wait (device, IDE_TIME_OUT);
  1016. ide_outb (device, ATA_SECT_CNT, 1);
  1017. ide_outb (device, ATA_LBA_LOW, 0);
  1018. ide_outb (device, ATA_LBA_MID, 0);
  1019. ide_outb (device, ATA_LBA_HIGH, 0);
  1020. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1021. ide_outb (device, ATA_COMMAND, 0xe3);
  1022. udelay (50);
  1023. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1024. #endif
  1025. }
  1026. /* ------------------------------------------------------------------------- */
  1027. ulong ide_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1028. {
  1029. ulong n = 0;
  1030. unsigned char c;
  1031. unsigned char pwrsave=0; /* power save */
  1032. #ifdef CONFIG_LBA48
  1033. unsigned char lba48 = 0;
  1034. if (blknr & 0x0000fffff0000000ULL) {
  1035. /* more than 28 bits used, use 48bit mode */
  1036. lba48 = 1;
  1037. }
  1038. #endif
  1039. debug ("ide_read dev %d start %LX, blocks %lX buffer at %lX\n",
  1040. device, blknr, blkcnt, (ulong)buffer);
  1041. ide_led (DEVICE_LED(device), 1); /* LED on */
  1042. /* Select device
  1043. */
  1044. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1045. c = ide_wait (device, IDE_TIME_OUT);
  1046. if (c & ATA_STAT_BUSY) {
  1047. printf ("IDE read: device %d not ready\n", device);
  1048. goto IDE_READ_E;
  1049. }
  1050. /* first check if the drive is in Powersaving mode, if yes,
  1051. * increase the timeout value */
  1052. ide_outb (device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1053. udelay (50);
  1054. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1055. if (c & ATA_STAT_BUSY) {
  1056. printf ("IDE read: device %d not ready\n", device);
  1057. goto IDE_READ_E;
  1058. }
  1059. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1060. printf ("No Powersaving mode %X\n", c);
  1061. } else {
  1062. c = ide_inb(device,ATA_SECT_CNT);
  1063. debug ("Powersaving %02X\n",c);
  1064. if(c==0)
  1065. pwrsave=1;
  1066. }
  1067. while (blkcnt-- > 0) {
  1068. c = ide_wait (device, IDE_TIME_OUT);
  1069. if (c & ATA_STAT_BUSY) {
  1070. printf ("IDE read: device %d not ready\n", device);
  1071. break;
  1072. }
  1073. #ifdef CONFIG_LBA48
  1074. if (lba48) {
  1075. /* write high bits */
  1076. ide_outb (device, ATA_SECT_CNT, 0);
  1077. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1078. #ifdef CONFIG_SYS_64BIT_LBA
  1079. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1080. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1081. #else
  1082. ide_outb (device, ATA_LBA_MID, 0);
  1083. ide_outb (device, ATA_LBA_HIGH, 0);
  1084. #endif
  1085. }
  1086. #endif
  1087. ide_outb (device, ATA_SECT_CNT, 1);
  1088. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1089. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1090. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1091. #ifdef CONFIG_LBA48
  1092. if (lba48) {
  1093. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1094. ide_outb (device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1095. } else
  1096. #endif
  1097. {
  1098. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1099. ATA_DEVICE(device) |
  1100. ((blknr >> 24) & 0xF) );
  1101. ide_outb (device, ATA_COMMAND, ATA_CMD_READ);
  1102. }
  1103. udelay (50);
  1104. if(pwrsave) {
  1105. c = ide_wait (device, IDE_SPIN_UP_TIME_OUT); /* may take up to 4 sec */
  1106. pwrsave=0;
  1107. } else {
  1108. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1109. }
  1110. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1111. #if defined(CONFIG_SYS_64BIT_LBA)
  1112. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1113. device, blknr, c);
  1114. #else
  1115. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1116. device, (ulong)blknr, c);
  1117. #endif
  1118. break;
  1119. }
  1120. input_data (device, buffer, ATA_SECTORWORDS);
  1121. (void) ide_inb (device, ATA_STATUS); /* clear IRQ */
  1122. ++n;
  1123. ++blknr;
  1124. buffer += ATA_BLOCKSIZE;
  1125. }
  1126. IDE_READ_E:
  1127. ide_led (DEVICE_LED(device), 0); /* LED off */
  1128. return (n);
  1129. }
  1130. /* ------------------------------------------------------------------------- */
  1131. ulong ide_write (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1132. {
  1133. ulong n = 0;
  1134. unsigned char c;
  1135. #ifdef CONFIG_LBA48
  1136. unsigned char lba48 = 0;
  1137. if (blknr & 0x0000fffff0000000ULL) {
  1138. /* more than 28 bits used, use 48bit mode */
  1139. lba48 = 1;
  1140. }
  1141. #endif
  1142. ide_led (DEVICE_LED(device), 1); /* LED on */
  1143. /* Select device
  1144. */
  1145. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1146. while (blkcnt-- > 0) {
  1147. c = ide_wait (device, IDE_TIME_OUT);
  1148. if (c & ATA_STAT_BUSY) {
  1149. printf ("IDE read: device %d not ready\n", device);
  1150. goto WR_OUT;
  1151. }
  1152. #ifdef CONFIG_LBA48
  1153. if (lba48) {
  1154. /* write high bits */
  1155. ide_outb (device, ATA_SECT_CNT, 0);
  1156. ide_outb (device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1157. #ifdef CONFIG_SYS_64BIT_LBA
  1158. ide_outb (device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1159. ide_outb (device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1160. #else
  1161. ide_outb (device, ATA_LBA_MID, 0);
  1162. ide_outb (device, ATA_LBA_HIGH, 0);
  1163. #endif
  1164. }
  1165. #endif
  1166. ide_outb (device, ATA_SECT_CNT, 1);
  1167. ide_outb (device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1168. ide_outb (device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1169. ide_outb (device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1170. #ifdef CONFIG_LBA48
  1171. if (lba48) {
  1172. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device) );
  1173. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1174. } else
  1175. #endif
  1176. {
  1177. ide_outb (device, ATA_DEV_HD, ATA_LBA |
  1178. ATA_DEVICE(device) |
  1179. ((blknr >> 24) & 0xF) );
  1180. ide_outb (device, ATA_COMMAND, ATA_CMD_WRITE);
  1181. }
  1182. udelay (50);
  1183. c = ide_wait (device, IDE_TIME_OUT); /* can't take over 500 ms */
  1184. if ((c&(ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR)) != ATA_STAT_DRQ) {
  1185. #if defined(CONFIG_SYS_64BIT_LBA)
  1186. printf ("Error (no IRQ) dev %d blk %Ld: status 0x%02x\n",
  1187. device, blknr, c);
  1188. #else
  1189. printf ("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1190. device, (ulong)blknr, c);
  1191. #endif
  1192. goto WR_OUT;
  1193. }
  1194. output_data (device, buffer, ATA_SECTORWORDS);
  1195. c = ide_inb (device, ATA_STATUS); /* clear IRQ */
  1196. ++n;
  1197. ++blknr;
  1198. buffer += ATA_BLOCKSIZE;
  1199. }
  1200. WR_OUT:
  1201. ide_led (DEVICE_LED(device), 0); /* LED off */
  1202. return (n);
  1203. }
  1204. /* ------------------------------------------------------------------------- */
  1205. /*
  1206. * copy src to dest, skipping leading and trailing blanks and null
  1207. * terminate the string
  1208. * "len" is the size of available memory including the terminating '\0'
  1209. */
  1210. static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
  1211. {
  1212. unsigned char *end, *last;
  1213. last = dst;
  1214. end = src + len - 1;
  1215. /* reserve space for '\0' */
  1216. if (len < 2)
  1217. goto OUT;
  1218. /* skip leading white space */
  1219. while ((*src) && (src<end) && (*src==' '))
  1220. ++src;
  1221. /* copy string, omitting trailing white space */
  1222. while ((*src) && (src<end)) {
  1223. *dst++ = *src;
  1224. if (*src++ != ' ')
  1225. last = dst;
  1226. }
  1227. OUT:
  1228. *last = '\0';
  1229. }
  1230. /* ------------------------------------------------------------------------- */
  1231. /*
  1232. * Wait until Busy bit is off, or timeout (in ms)
  1233. * Return last status
  1234. */
  1235. static uchar ide_wait (int dev, ulong t)
  1236. {
  1237. ulong delay = 10 * t; /* poll every 100 us */
  1238. uchar c;
  1239. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1240. udelay (100);
  1241. if (delay-- == 0) {
  1242. break;
  1243. }
  1244. }
  1245. return (c);
  1246. }
  1247. /* ------------------------------------------------------------------------- */
  1248. #ifdef CONFIG_IDE_RESET
  1249. extern void ide_set_reset(int idereset);
  1250. static void ide_reset (void)
  1251. {
  1252. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1253. volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
  1254. #endif
  1255. int i;
  1256. curr_device = -1;
  1257. for (i=0; i<CONFIG_SYS_IDE_MAXBUS; ++i)
  1258. ide_bus_ok[i] = 0;
  1259. for (i=0; i<CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1260. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1261. ide_set_reset (1); /* assert reset */
  1262. /* the reset signal shall be asserted for et least 25 us */
  1263. udelay(25);
  1264. WATCHDOG_RESET();
  1265. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1266. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE); /* 12V Enable output OFF */
  1267. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1268. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1269. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1270. /* wait 500 ms for the voltage to stabilize
  1271. */
  1272. for (i=0; i<500; ++i) {
  1273. udelay (1000);
  1274. }
  1275. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE; /* 12V Enable output ON */
  1276. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1277. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1278. /* configure IDE Motor voltage monitor pin as input */
  1279. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1280. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1281. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1282. /* wait up to 1 s for the motor voltage to stabilize
  1283. */
  1284. for (i=0; i<1000; ++i) {
  1285. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1286. break;
  1287. }
  1288. udelay (1000);
  1289. }
  1290. if (i == 1000) { /* Timeout */
  1291. printf ("\nWarning: 5V for IDE Motor missing\n");
  1292. # ifdef CONFIG_STATUS_LED
  1293. # ifdef STATUS_LED_YELLOW
  1294. status_led_set (STATUS_LED_YELLOW, STATUS_LED_ON );
  1295. # endif
  1296. # ifdef STATUS_LED_GREEN
  1297. status_led_set (STATUS_LED_GREEN, STATUS_LED_OFF);
  1298. # endif
  1299. # endif /* CONFIG_STATUS_LED */
  1300. }
  1301. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1302. WATCHDOG_RESET();
  1303. /* de-assert RESET signal */
  1304. ide_set_reset(0);
  1305. /* wait 250 ms */
  1306. for (i=0; i<250; ++i) {
  1307. udelay (1000);
  1308. }
  1309. }
  1310. #endif /* CONFIG_IDE_RESET */
  1311. /* ------------------------------------------------------------------------- */
  1312. #if defined(CONFIG_IDE_LED) && \
  1313. !defined(CONFIG_CPC45) && \
  1314. !defined(CONFIG_HMI10) && \
  1315. !defined(CONFIG_KUP4K) && \
  1316. !defined(CONFIG_KUP4X)
  1317. static uchar led_buffer = 0; /* Buffer for current LED status */
  1318. static void ide_led (uchar led, uchar status)
  1319. {
  1320. uchar *led_port = LED_PORT;
  1321. if (status) { /* switch LED on */
  1322. led_buffer |= led;
  1323. } else { /* switch LED off */
  1324. led_buffer &= ~led;
  1325. }
  1326. *led_port = led_buffer;
  1327. }
  1328. #endif /* CONFIG_IDE_LED */
  1329. #if defined(CONFIG_OF_IDE_FIXUP)
  1330. int ide_device_present(int dev)
  1331. {
  1332. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1333. return 0;
  1334. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1335. }
  1336. #endif
  1337. /* ------------------------------------------------------------------------- */
  1338. #ifdef CONFIG_ATAPI
  1339. /****************************************************************************
  1340. * ATAPI Support
  1341. */
  1342. #if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
  1343. /* since ATAPI may use commands with not 4 bytes alligned length
  1344. * we have our own transfer functions, 2 bytes alligned */
  1345. static void
  1346. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1347. {
  1348. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1349. uchar *dbuf;
  1350. volatile uchar *pbuf_even;
  1351. volatile uchar *pbuf_odd;
  1352. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1353. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1354. while (shorts--) {
  1355. EIEIO;
  1356. *pbuf_even = *dbuf++;
  1357. EIEIO;
  1358. *pbuf_odd = *dbuf++;
  1359. }
  1360. #else
  1361. ushort *dbuf;
  1362. volatile ushort *pbuf;
  1363. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1364. dbuf = (ushort *)sect_buf;
  1365. debug ("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
  1366. while (shorts--) {
  1367. EIEIO;
  1368. *pbuf = *dbuf++;
  1369. }
  1370. #endif
  1371. }
  1372. static void
  1373. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1374. {
  1375. #if defined(CONFIG_HMI10) || defined(CONFIG_CPC45)
  1376. uchar *dbuf;
  1377. volatile uchar *pbuf_even;
  1378. volatile uchar *pbuf_odd;
  1379. pbuf_even = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_EVEN);
  1380. pbuf_odd = (uchar *)(ATA_CURR_BASE(dev)+ATA_DATA_ODD);
  1381. while (shorts--) {
  1382. EIEIO;
  1383. *dbuf++ = *pbuf_even;
  1384. EIEIO;
  1385. *dbuf++ = *pbuf_odd;
  1386. }
  1387. #else
  1388. ushort *dbuf;
  1389. volatile ushort *pbuf;
  1390. pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
  1391. dbuf = (ushort *)sect_buf;
  1392. debug("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
  1393. while (shorts--) {
  1394. EIEIO;
  1395. *dbuf++ = *pbuf;
  1396. }
  1397. #endif
  1398. }
  1399. #else /* ! __PPC__ */
  1400. static void
  1401. output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1402. {
  1403. outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1404. }
  1405. static void
  1406. input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1407. {
  1408. insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
  1409. }
  1410. #endif /* __PPC__ */
  1411. /*
  1412. * Wait until (Status & mask) == res, or timeout (in ms)
  1413. * Return last status
  1414. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1415. * and then they set their DRQ Bit
  1416. */
  1417. static uchar atapi_wait_mask (int dev, ulong t,uchar mask, uchar res)
  1418. {
  1419. ulong delay = 10 * t; /* poll every 100 us */
  1420. uchar c;
  1421. c = ide_inb(dev,ATA_DEV_CTL); /* prevents to read the status before valid */
  1422. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1423. /* break if error occurs (doesn't make sense to wait more) */
  1424. if((c & ATA_STAT_ERR)==ATA_STAT_ERR)
  1425. break;
  1426. udelay (100);
  1427. if (delay-- == 0) {
  1428. break;
  1429. }
  1430. }
  1431. return (c);
  1432. }
  1433. /*
  1434. * issue an atapi command
  1435. */
  1436. unsigned char atapi_issue(int device,unsigned char* ccb,int ccblen, unsigned char * buffer,int buflen)
  1437. {
  1438. unsigned char c,err,mask,res;
  1439. int n;
  1440. ide_led (DEVICE_LED(device), 1); /* LED on */
  1441. /* Select device
  1442. */
  1443. mask = ATA_STAT_BUSY|ATA_STAT_DRQ;
  1444. res = 0;
  1445. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1446. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1447. if ((c & mask) != res) {
  1448. printf ("ATAPI_ISSUE: device %d not ready status %X\n", device,c);
  1449. err=0xFF;
  1450. goto AI_OUT;
  1451. }
  1452. /* write taskfile */
  1453. ide_outb (device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1454. ide_outb (device, ATA_SECT_CNT, 0);
  1455. ide_outb (device, ATA_SECT_NUM, 0);
  1456. ide_outb (device, ATA_CYL_LOW, (unsigned char)(buflen & 0xFF));
  1457. ide_outb (device, ATA_CYL_HIGH, (unsigned char)((buflen>>8) & 0xFF));
  1458. ide_outb (device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1459. ide_outb (device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1460. udelay (50);
  1461. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1462. res = ATA_STAT_DRQ;
  1463. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1464. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1465. printf ("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",device,c);
  1466. err=0xFF;
  1467. goto AI_OUT;
  1468. }
  1469. output_data_shorts (device, (unsigned short *)ccb,ccblen/2); /* write command block */
  1470. /* ATAPI Command written wait for completition */
  1471. udelay (5000); /* device must set bsy */
  1472. mask = ATA_STAT_DRQ|ATA_STAT_BUSY|ATA_STAT_ERR;
  1473. /* if no data wait for DRQ = 0 BSY = 0
  1474. * if data wait for DRQ = 1 BSY = 0 */
  1475. res=0;
  1476. if(buflen)
  1477. res = ATA_STAT_DRQ;
  1478. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1479. if ((c & mask) != res ) {
  1480. if (c & ATA_STAT_ERR) {
  1481. err=(ide_inb(device,ATA_ERROR_REG))>>4;
  1482. debug ("atapi_issue 1 returned sense key %X status %02X\n",err,c);
  1483. } else {
  1484. printf ("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n", ccb[0],c);
  1485. err=0xFF;
  1486. }
  1487. goto AI_OUT;
  1488. }
  1489. n=ide_inb(device, ATA_CYL_HIGH);
  1490. n<<=8;
  1491. n+=ide_inb(device, ATA_CYL_LOW);
  1492. if(n>buflen) {
  1493. printf("ERROR, transfer bytes %d requested only %d\n",n,buflen);
  1494. err=0xff;
  1495. goto AI_OUT;
  1496. }
  1497. if((n==0)&&(buflen<0)) {
  1498. printf("ERROR, transfer bytes %d requested %d\n",n,buflen);
  1499. err=0xff;
  1500. goto AI_OUT;
  1501. }
  1502. if(n!=buflen) {
  1503. debug ("WARNING, transfer bytes %d not equal with requested %d\n",n,buflen);
  1504. }
  1505. if(n!=0) { /* data transfer */
  1506. debug ("ATAPI_ISSUE: %d Bytes to transfer\n",n);
  1507. /* we transfer shorts */
  1508. n>>=1;
  1509. /* ok now decide if it is an in or output */
  1510. if ((ide_inb(device, ATA_SECT_CNT)&0x02)==0) {
  1511. debug ("Write to device\n");
  1512. output_data_shorts(device,(unsigned short *)buffer,n);
  1513. } else {
  1514. debug ("Read from device @ %p shorts %d\n",buffer,n);
  1515. input_data_shorts(device,(unsigned short *)buffer,n);
  1516. }
  1517. }
  1518. udelay(5000); /* seems that some CD ROMs need this... */
  1519. mask = ATA_STAT_BUSY|ATA_STAT_ERR;
  1520. res=0;
  1521. c = atapi_wait_mask(device,ATAPI_TIME_OUT,mask,res);
  1522. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1523. err=(ide_inb(device,ATA_ERROR_REG) >> 4);
  1524. debug ("atapi_issue 2 returned sense key %X status %X\n",err,c);
  1525. } else {
  1526. err = 0;
  1527. }
  1528. AI_OUT:
  1529. ide_led (DEVICE_LED(device), 0); /* LED off */
  1530. return (err);
  1531. }
  1532. /*
  1533. * sending the command to atapi_issue. If an status other than good
  1534. * returns, an request_sense will be issued
  1535. */
  1536. #define ATAPI_DRIVE_NOT_READY 100
  1537. #define ATAPI_UNIT_ATTN 10
  1538. unsigned char atapi_issue_autoreq (int device,
  1539. unsigned char* ccb,
  1540. int ccblen,
  1541. unsigned char *buffer,
  1542. int buflen)
  1543. {
  1544. unsigned char sense_data[18],sense_ccb[12];
  1545. unsigned char res,key,asc,ascq;
  1546. int notready,unitattn;
  1547. unitattn=ATAPI_UNIT_ATTN;
  1548. notready=ATAPI_DRIVE_NOT_READY;
  1549. retry:
  1550. res= atapi_issue(device,ccb,ccblen,buffer,buflen);
  1551. if (res==0)
  1552. return (0); /* Ok */
  1553. if (res==0xFF)
  1554. return (0xFF); /* error */
  1555. debug ("(auto_req)atapi_issue returned sense key %X\n",res);
  1556. memset(sense_ccb,0,sizeof(sense_ccb));
  1557. memset(sense_data,0,sizeof(sense_data));
  1558. sense_ccb[0]=ATAPI_CMD_REQ_SENSE;
  1559. sense_ccb[4]=18; /* allocation Length */
  1560. res=atapi_issue(device,sense_ccb,12,sense_data,18);
  1561. key=(sense_data[2]&0xF);
  1562. asc=(sense_data[12]);
  1563. ascq=(sense_data[13]);
  1564. debug ("ATAPI_CMD_REQ_SENSE returned %x\n",res);
  1565. debug (" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1566. sense_data[0],
  1567. key,
  1568. asc,
  1569. ascq);
  1570. if((key==0))
  1571. return 0; /* ok device ready */
  1572. if((key==6)|| (asc==0x29) || (asc==0x28)) { /* Unit Attention */
  1573. if(unitattn-->0) {
  1574. udelay(200*1000);
  1575. goto retry;
  1576. }
  1577. printf("Unit Attention, tried %d\n",ATAPI_UNIT_ATTN);
  1578. goto error;
  1579. }
  1580. if((asc==0x4) && (ascq==0x1)) { /* not ready, but will be ready soon */
  1581. if (notready-->0) {
  1582. udelay(200*1000);
  1583. goto retry;
  1584. }
  1585. printf("Drive not ready, tried %d times\n",ATAPI_DRIVE_NOT_READY);
  1586. goto error;
  1587. }
  1588. if(asc==0x3a) {
  1589. debug ("Media not present\n");
  1590. goto error;
  1591. }
  1592. printf ("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1593. error:
  1594. debug ("ERROR Sense key %02X ASC %02X ASCQ %02X\n",key,asc,ascq);
  1595. return (0xFF);
  1596. }
  1597. static void atapi_inquiry(block_dev_desc_t * dev_desc)
  1598. {
  1599. unsigned char ccb[12]; /* Command descriptor block */
  1600. unsigned char iobuf[64]; /* temp buf */
  1601. unsigned char c;
  1602. int device;
  1603. device=dev_desc->dev;
  1604. dev_desc->type=DEV_TYPE_UNKNOWN; /* not yet valid */
  1605. dev_desc->block_read=atapi_read;
  1606. memset(ccb,0,sizeof(ccb));
  1607. memset(iobuf,0,sizeof(iobuf));
  1608. ccb[0]=ATAPI_CMD_INQUIRY;
  1609. ccb[4]=40; /* allocation Legnth */
  1610. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,40);
  1611. debug ("ATAPI_CMD_INQUIRY returned %x\n",c);
  1612. if (c!=0)
  1613. return;
  1614. /* copy device ident strings */
  1615. ident_cpy((unsigned char*)dev_desc->vendor,&iobuf[8],8);
  1616. ident_cpy((unsigned char*)dev_desc->product,&iobuf[16],16);
  1617. ident_cpy((unsigned char*)dev_desc->revision,&iobuf[32],5);
  1618. dev_desc->lun=0;
  1619. dev_desc->lba=0;
  1620. dev_desc->blksz=0;
  1621. dev_desc->type=iobuf[0] & 0x1f;
  1622. if ((iobuf[1]&0x80)==0x80)
  1623. dev_desc->removable = 1;
  1624. else
  1625. dev_desc->removable = 0;
  1626. memset(ccb,0,sizeof(ccb));
  1627. memset(iobuf,0,sizeof(iobuf));
  1628. ccb[0]=ATAPI_CMD_START_STOP;
  1629. ccb[4]=0x03; /* start */
  1630. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1631. debug ("ATAPI_CMD_START_STOP returned %x\n",c);
  1632. if (c!=0)
  1633. return;
  1634. memset(ccb,0,sizeof(ccb));
  1635. memset(iobuf,0,sizeof(iobuf));
  1636. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,0);
  1637. debug ("ATAPI_CMD_UNIT_TEST_READY returned %x\n",c);
  1638. if (c!=0)
  1639. return;
  1640. memset(ccb,0,sizeof(ccb));
  1641. memset(iobuf,0,sizeof(iobuf));
  1642. ccb[0]=ATAPI_CMD_READ_CAP;
  1643. c=atapi_issue_autoreq(device,ccb,12,(unsigned char *)iobuf,8);
  1644. debug ("ATAPI_CMD_READ_CAP returned %x\n",c);
  1645. if (c!=0)
  1646. return;
  1647. debug ("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1648. iobuf[0],iobuf[1],iobuf[2],iobuf[3],
  1649. iobuf[4],iobuf[5],iobuf[6],iobuf[7]);
  1650. dev_desc->lba =((unsigned long)iobuf[0]<<24) +
  1651. ((unsigned long)iobuf[1]<<16) +
  1652. ((unsigned long)iobuf[2]<< 8) +
  1653. ((unsigned long)iobuf[3]);
  1654. dev_desc->blksz=((unsigned long)iobuf[4]<<24) +
  1655. ((unsigned long)iobuf[5]<<16) +
  1656. ((unsigned long)iobuf[6]<< 8) +
  1657. ((unsigned long)iobuf[7]);
  1658. #ifdef CONFIG_LBA48
  1659. dev_desc->lba48 = 0; /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1660. #endif
  1661. return;
  1662. }
  1663. /*
  1664. * atapi_read:
  1665. * we transfer only one block per command, since the multiple DRQ per
  1666. * command is not yet implemented
  1667. */
  1668. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1669. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1670. #define ATAPI_READ_MAX_BLOCK ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE /* max blocks */
  1671. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1672. {
  1673. ulong n = 0;
  1674. unsigned char ccb[12]; /* Command descriptor block */
  1675. ulong cnt;
  1676. debug ("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1677. device, blknr, blkcnt, (ulong)buffer);
  1678. do {
  1679. if (blkcnt>ATAPI_READ_MAX_BLOCK) {
  1680. cnt=ATAPI_READ_MAX_BLOCK;
  1681. } else {
  1682. cnt=blkcnt;
  1683. }
  1684. ccb[0]=ATAPI_CMD_READ_12;
  1685. ccb[1]=0; /* reserved */
  1686. ccb[2]=(unsigned char) (blknr>>24) & 0xFF; /* MSB Block */
  1687. ccb[3]=(unsigned char) (blknr>>16) & 0xFF; /* */
  1688. ccb[4]=(unsigned char) (blknr>> 8) & 0xFF;
  1689. ccb[5]=(unsigned char) blknr & 0xFF; /* LSB Block */
  1690. ccb[6]=(unsigned char) (cnt >>24) & 0xFF; /* MSB Block count */
  1691. ccb[7]=(unsigned char) (cnt >>16) & 0xFF;
  1692. ccb[8]=(unsigned char) (cnt >> 8) & 0xFF;
  1693. ccb[9]=(unsigned char) cnt & 0xFF; /* LSB Block */
  1694. ccb[10]=0; /* reserved */
  1695. ccb[11]=0; /* reserved */
  1696. if (atapi_issue_autoreq(device,ccb,12,
  1697. (unsigned char *)buffer,
  1698. cnt*ATAPI_READ_BLOCK_SIZE) == 0xFF) {
  1699. return (n);
  1700. }
  1701. n+=cnt;
  1702. blkcnt-=cnt;
  1703. blknr+=cnt;
  1704. buffer+=(cnt*ATAPI_READ_BLOCK_SIZE);
  1705. } while (blkcnt > 0);
  1706. return (n);
  1707. }
  1708. /* ------------------------------------------------------------------------- */
  1709. #endif /* CONFIG_ATAPI */
  1710. U_BOOT_CMD(
  1711. ide, 5, 1, do_ide,
  1712. "IDE sub-system",
  1713. "reset - reset IDE controller\n"
  1714. "ide info - show available IDE devices\n"
  1715. "ide device [dev] - show or set current device\n"
  1716. "ide part [dev] - print partition table of one or all IDE devices\n"
  1717. "ide read addr blk# cnt\n"
  1718. "ide write addr blk# cnt - read/write `cnt'"
  1719. " blocks starting at block `blk#'\n"
  1720. " to/from memory address `addr'"
  1721. );
  1722. U_BOOT_CMD(
  1723. diskboot, 3, 1, do_diskboot,
  1724. "boot from IDE device",
  1725. "loadAddr dev:part"
  1726. );