processor.h 1.5 KB

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  1. /*
  2. * (C) Copyright 2002
  3. * Daniel Engström, Omicron Ceti AB, daniel@omicron.se
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #ifndef __ASM_PROCESSOR_H_
  8. #define __ASM_PROCESSOR_H_ 1
  9. #define X86_GDT_ENTRY_SIZE 8
  10. #define X86_GDT_ENTRY_NULL 0
  11. #define X86_GDT_ENTRY_UNUSED 1
  12. #define X86_GDT_ENTRY_32BIT_CS 2
  13. #define X86_GDT_ENTRY_32BIT_DS 3
  14. #define X86_GDT_ENTRY_32BIT_FS 4
  15. #define X86_GDT_ENTRY_16BIT_CS 5
  16. #define X86_GDT_ENTRY_16BIT_DS 6
  17. #define X86_GDT_ENTRY_16BIT_FLAT_CS 7
  18. #define X86_GDT_ENTRY_16BIT_FLAT_DS 8
  19. #define X86_GDT_NUM_ENTRIES 9
  20. #define X86_GDT_SIZE (X86_GDT_NUM_ENTRIES * X86_GDT_ENTRY_SIZE)
  21. /* Length of the public header on Intel microcode blobs */
  22. #define UCODE_HEADER_LEN 0x30
  23. #ifndef __ASSEMBLY__
  24. /*
  25. * This register is documented in (for example) the Intel Atom Processor E3800
  26. * Product Family Datasheet in "PCU - Power Management Controller (PMC)".
  27. *
  28. * RST_CNT: Reset Control Register (RST_CNT) Offset cf9.
  29. *
  30. * The naming follows Intel's naming.
  31. */
  32. #define PORT_RESET 0xcf9
  33. enum {
  34. SYS_RST = 1 << 1, /* 0 for soft reset, 1 for hard reset */
  35. RST_CPU = 1 << 2, /* initiate reset */
  36. FULL_RST = 1 << 3, /* full power cycle */
  37. };
  38. /**
  39. * x86_full_reset() - reset everything: perform a full power cycle
  40. */
  41. void x86_full_reset(void);
  42. static inline __attribute__((always_inline)) void cpu_hlt(void)
  43. {
  44. asm("hlt");
  45. }
  46. static inline ulong cpu_get_sp(void)
  47. {
  48. ulong result;
  49. asm volatile(
  50. "mov %%esp, %%eax"
  51. : "=a" (result));
  52. return result;
  53. }
  54. #endif /* __ASSEMBLY__ */
  55. #endif