intel_broadwell_gpio.c 4.7 KB

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  1. /*
  2. * Copyright (c) 2012 The Chromium OS Authors.
  3. * SPDX-License-Identifier: GPL-2.0+
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <fdtdec.h>
  9. #include <pch.h>
  10. #include <pci.h>
  11. #include <asm/cpu.h>
  12. #include <asm/gpio.h>
  13. #include <asm/io.h>
  14. #include <asm/pci.h>
  15. #include <asm/arch/gpio.h>
  16. #include <dt-bindings/gpio/x86-gpio.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. /**
  19. * struct broadwell_bank_priv - Private driver data
  20. *
  21. * @regs: Pointer to GPIO registers
  22. * @bank: Bank number for this bank (0, 1 or 2)
  23. * @offset: GPIO offset for this bank (0, 32 or 64)
  24. */
  25. struct broadwell_bank_priv {
  26. struct pch_lp_gpio_regs *regs;
  27. int bank;
  28. int offset;
  29. };
  30. static int broadwell_gpio_request(struct udevice *dev, unsigned offset,
  31. const char *label)
  32. {
  33. struct broadwell_bank_priv *priv = dev_get_priv(dev);
  34. struct pch_lp_gpio_regs *regs = priv->regs;
  35. u32 val;
  36. /*
  37. * Make sure that the GPIO pin we want isn't already in use for some
  38. * built-in hardware function. We have to check this for every
  39. * requested pin.
  40. */
  41. debug("%s: request bank %d offset %d: ", __func__, priv->bank, offset);
  42. val = inl(&regs->own[priv->bank]);
  43. if (!(val & (1UL << offset))) {
  44. debug("gpio is reserved for internal use\n");
  45. return -EPERM;
  46. }
  47. debug("ok\n");
  48. return 0;
  49. }
  50. static int broadwell_gpio_direction_input(struct udevice *dev, unsigned offset)
  51. {
  52. struct broadwell_bank_priv *priv = dev_get_priv(dev);
  53. struct pch_lp_gpio_regs *regs = priv->regs;
  54. setio_32(&regs->config[priv->offset + offset], CONFA_DIR_INPUT);
  55. return 0;
  56. }
  57. static int broadwell_gpio_get_value(struct udevice *dev, unsigned offset)
  58. {
  59. struct broadwell_bank_priv *priv = dev_get_priv(dev);
  60. struct pch_lp_gpio_regs *regs = priv->regs;
  61. return inl(&regs->config[priv->offset + offset]) & CONFA_LEVEL_HIGH ?
  62. 1 : 0;
  63. }
  64. static int broadwell_gpio_set_value(struct udevice *dev, unsigned offset,
  65. int value)
  66. {
  67. struct broadwell_bank_priv *priv = dev_get_priv(dev);
  68. struct pch_lp_gpio_regs *regs = priv->regs;
  69. debug("%s: dev=%s, offset=%d, value=%d\n", __func__, dev->name, offset,
  70. value);
  71. clrsetio_32(&regs->config[priv->offset + offset], CONFA_OUTPUT_HIGH,
  72. value ? CONFA_OUTPUT_HIGH : 0);
  73. return 0;
  74. }
  75. static int broadwell_gpio_direction_output(struct udevice *dev, unsigned offset,
  76. int value)
  77. {
  78. struct broadwell_bank_priv *priv = dev_get_priv(dev);
  79. struct pch_lp_gpio_regs *regs = priv->regs;
  80. broadwell_gpio_set_value(dev, offset, value);
  81. clrio_32(&regs->config[priv->offset + offset], CONFA_DIR_INPUT);
  82. return 0;
  83. }
  84. static int broadwell_gpio_get_function(struct udevice *dev, unsigned offset)
  85. {
  86. struct broadwell_bank_priv *priv = dev_get_priv(dev);
  87. struct pch_lp_gpio_regs *regs = priv->regs;
  88. u32 mask = 1UL << offset;
  89. if (!(inl(&regs->own[priv->bank]) & mask))
  90. return GPIOF_FUNC;
  91. if (inl(&regs->config[priv->offset + offset]) & CONFA_DIR_INPUT)
  92. return GPIOF_INPUT;
  93. else
  94. return GPIOF_OUTPUT;
  95. }
  96. static int broadwell_gpio_probe(struct udevice *dev)
  97. {
  98. struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
  99. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  100. struct broadwell_bank_priv *priv = dev_get_priv(dev);
  101. uc_priv->gpio_count = GPIO_PER_BANK;
  102. uc_priv->bank_name = plat->bank_name;
  103. priv->regs = (struct pch_lp_gpio_regs *)(uintptr_t)plat->base_addr;
  104. priv->bank = plat->bank;
  105. priv->offset = priv->bank * 32;
  106. debug("%s: probe done, regs %p, bank %d\n", __func__, priv->regs,
  107. priv->bank);
  108. return 0;
  109. }
  110. static int broadwell_gpio_ofdata_to_platdata(struct udevice *dev)
  111. {
  112. struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
  113. u32 gpiobase;
  114. int bank;
  115. int ret;
  116. ret = pch_get_gpio_base(dev->parent, &gpiobase);
  117. if (ret)
  118. return ret;
  119. bank = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", -1);
  120. if (bank == -1) {
  121. debug("%s: Invalid bank number %d\n", __func__, bank);
  122. return -EINVAL;
  123. }
  124. plat->bank = bank;
  125. plat->base_addr = gpiobase;
  126. plat->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset,
  127. "bank-name", NULL);
  128. return 0;
  129. }
  130. static const struct dm_gpio_ops gpio_broadwell_ops = {
  131. .request = broadwell_gpio_request,
  132. .direction_input = broadwell_gpio_direction_input,
  133. .direction_output = broadwell_gpio_direction_output,
  134. .get_value = broadwell_gpio_get_value,
  135. .set_value = broadwell_gpio_set_value,
  136. .get_function = broadwell_gpio_get_function,
  137. };
  138. static const struct udevice_id intel_broadwell_gpio_ids[] = {
  139. { .compatible = "intel,broadwell-gpio" },
  140. { }
  141. };
  142. U_BOOT_DRIVER(gpio_broadwell) = {
  143. .name = "gpio_broadwell",
  144. .id = UCLASS_GPIO,
  145. .of_match = intel_broadwell_gpio_ids,
  146. .ops = &gpio_broadwell_ops,
  147. .ofdata_to_platdata = broadwell_gpio_ofdata_to_platdata,
  148. .probe = broadwell_gpio_probe,
  149. .priv_auto_alloc_size = sizeof(struct broadwell_bank_priv),
  150. .platdata_auto_alloc_size = sizeof(struct broadwell_bank_platdata),
  151. };