phy.c 19 KB

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  1. /*
  2. * Generic PHY Management code
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * Copyright 2011 Freescale Semiconductor, Inc.
  7. * author Andy Fleming
  8. *
  9. * Based loosely off of Linux's PHY Lib
  10. */
  11. #include <config.h>
  12. #include <common.h>
  13. #include <dm.h>
  14. #include <malloc.h>
  15. #include <net.h>
  16. #include <command.h>
  17. #include <miiphy.h>
  18. #include <phy.h>
  19. #include <errno.h>
  20. #include <linux/err.h>
  21. #include <linux/compiler.h>
  22. DECLARE_GLOBAL_DATA_PTR;
  23. /* Generic PHY support and helper functions */
  24. /**
  25. * genphy_config_advert - sanitize and advertise auto-negotation parameters
  26. * @phydev: target phy_device struct
  27. *
  28. * Description: Writes MII_ADVERTISE with the appropriate values,
  29. * after sanitizing the values to make sure we only advertise
  30. * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
  31. * hasn't changed, and > 0 if it has changed.
  32. */
  33. static int genphy_config_advert(struct phy_device *phydev)
  34. {
  35. u32 advertise;
  36. int oldadv, adv;
  37. int err, changed = 0;
  38. /* Only allow advertising what
  39. * this PHY supports */
  40. phydev->advertising &= phydev->supported;
  41. advertise = phydev->advertising;
  42. /* Setup standard advertisement */
  43. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  44. if (adv < 0)
  45. return adv;
  46. adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  47. ADVERTISE_PAUSE_ASYM);
  48. if (advertise & ADVERTISED_10baseT_Half)
  49. adv |= ADVERTISE_10HALF;
  50. if (advertise & ADVERTISED_10baseT_Full)
  51. adv |= ADVERTISE_10FULL;
  52. if (advertise & ADVERTISED_100baseT_Half)
  53. adv |= ADVERTISE_100HALF;
  54. if (advertise & ADVERTISED_100baseT_Full)
  55. adv |= ADVERTISE_100FULL;
  56. if (advertise & ADVERTISED_Pause)
  57. adv |= ADVERTISE_PAUSE_CAP;
  58. if (advertise & ADVERTISED_Asym_Pause)
  59. adv |= ADVERTISE_PAUSE_ASYM;
  60. if (advertise & ADVERTISED_1000baseX_Half)
  61. adv |= ADVERTISE_1000XHALF;
  62. if (advertise & ADVERTISED_1000baseX_Full)
  63. adv |= ADVERTISE_1000XFULL;
  64. if (adv != oldadv) {
  65. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  66. if (err < 0)
  67. return err;
  68. changed = 1;
  69. }
  70. /* Configure gigabit if it's supported */
  71. if (phydev->supported & (SUPPORTED_1000baseT_Half |
  72. SUPPORTED_1000baseT_Full)) {
  73. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  74. if (adv < 0)
  75. return adv;
  76. adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  77. if (advertise & SUPPORTED_1000baseT_Half)
  78. adv |= ADVERTISE_1000HALF;
  79. if (advertise & SUPPORTED_1000baseT_Full)
  80. adv |= ADVERTISE_1000FULL;
  81. if (adv != oldadv) {
  82. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
  83. adv);
  84. if (err < 0)
  85. return err;
  86. changed = 1;
  87. }
  88. }
  89. return changed;
  90. }
  91. /**
  92. * genphy_setup_forced - configures/forces speed/duplex from @phydev
  93. * @phydev: target phy_device struct
  94. *
  95. * Description: Configures MII_BMCR to force speed/duplex
  96. * to the values in phydev. Assumes that the values are valid.
  97. */
  98. static int genphy_setup_forced(struct phy_device *phydev)
  99. {
  100. int err;
  101. int ctl = 0;
  102. phydev->pause = phydev->asym_pause = 0;
  103. if (SPEED_1000 == phydev->speed)
  104. ctl |= BMCR_SPEED1000;
  105. else if (SPEED_100 == phydev->speed)
  106. ctl |= BMCR_SPEED100;
  107. if (DUPLEX_FULL == phydev->duplex)
  108. ctl |= BMCR_FULLDPLX;
  109. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  110. return err;
  111. }
  112. /**
  113. * genphy_restart_aneg - Enable and Restart Autonegotiation
  114. * @phydev: target phy_device struct
  115. */
  116. int genphy_restart_aneg(struct phy_device *phydev)
  117. {
  118. int ctl;
  119. ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  120. if (ctl < 0)
  121. return ctl;
  122. ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
  123. /* Don't isolate the PHY if we're negotiating */
  124. ctl &= ~(BMCR_ISOLATE);
  125. ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  126. return ctl;
  127. }
  128. /**
  129. * genphy_config_aneg - restart auto-negotiation or write BMCR
  130. * @phydev: target phy_device struct
  131. *
  132. * Description: If auto-negotiation is enabled, we configure the
  133. * advertising, and then restart auto-negotiation. If it is not
  134. * enabled, then we write the BMCR.
  135. */
  136. int genphy_config_aneg(struct phy_device *phydev)
  137. {
  138. int result;
  139. if (AUTONEG_ENABLE != phydev->autoneg)
  140. return genphy_setup_forced(phydev);
  141. result = genphy_config_advert(phydev);
  142. if (result < 0) /* error */
  143. return result;
  144. if (result == 0) {
  145. /* Advertisment hasn't changed, but maybe aneg was never on to
  146. * begin with? Or maybe phy was isolated? */
  147. int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  148. if (ctl < 0)
  149. return ctl;
  150. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  151. result = 1; /* do restart aneg */
  152. }
  153. /* Only restart aneg if we are advertising something different
  154. * than we were before. */
  155. if (result > 0)
  156. result = genphy_restart_aneg(phydev);
  157. return result;
  158. }
  159. /**
  160. * genphy_update_link - update link status in @phydev
  161. * @phydev: target phy_device struct
  162. *
  163. * Description: Update the value in phydev->link to reflect the
  164. * current link value. In order to do this, we need to read
  165. * the status register twice, keeping the second value.
  166. */
  167. int genphy_update_link(struct phy_device *phydev)
  168. {
  169. unsigned int mii_reg;
  170. /*
  171. * Wait if the link is up, and autonegotiation is in progress
  172. * (ie - we're capable and it's not done)
  173. */
  174. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  175. /*
  176. * If we already saw the link up, and it hasn't gone down, then
  177. * we don't need to wait for autoneg again
  178. */
  179. if (phydev->link && mii_reg & BMSR_LSTATUS)
  180. return 0;
  181. if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
  182. int i = 0;
  183. printf("%s Waiting for PHY auto negotiation to complete",
  184. phydev->dev->name);
  185. while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
  186. /*
  187. * Timeout reached ?
  188. */
  189. if (i > PHY_ANEG_TIMEOUT) {
  190. printf(" TIMEOUT !\n");
  191. phydev->link = 0;
  192. return 0;
  193. }
  194. if (ctrlc()) {
  195. puts("user interrupt!\n");
  196. phydev->link = 0;
  197. return -EINTR;
  198. }
  199. if ((i++ % 500) == 0)
  200. printf(".");
  201. udelay(1000); /* 1 ms */
  202. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  203. }
  204. printf(" done\n");
  205. phydev->link = 1;
  206. } else {
  207. /* Read the link a second time to clear the latched state */
  208. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  209. if (mii_reg & BMSR_LSTATUS)
  210. phydev->link = 1;
  211. else
  212. phydev->link = 0;
  213. }
  214. return 0;
  215. }
  216. /*
  217. * Generic function which updates the speed and duplex. If
  218. * autonegotiation is enabled, it uses the AND of the link
  219. * partner's advertised capabilities and our advertised
  220. * capabilities. If autonegotiation is disabled, we use the
  221. * appropriate bits in the control register.
  222. *
  223. * Stolen from Linux's mii.c and phy_device.c
  224. */
  225. int genphy_parse_link(struct phy_device *phydev)
  226. {
  227. int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  228. /* We're using autonegotiation */
  229. if (phydev->supported & SUPPORTED_Autoneg) {
  230. u32 lpa = 0;
  231. int gblpa = 0;
  232. u32 estatus = 0;
  233. /* Check for gigabit capability */
  234. if (phydev->supported & (SUPPORTED_1000baseT_Full |
  235. SUPPORTED_1000baseT_Half)) {
  236. /* We want a list of states supported by
  237. * both PHYs in the link
  238. */
  239. gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
  240. if (gblpa < 0) {
  241. debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
  242. gblpa = 0;
  243. }
  244. gblpa &= phy_read(phydev,
  245. MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
  246. }
  247. /* Set the baseline so we only have to set them
  248. * if they're different
  249. */
  250. phydev->speed = SPEED_10;
  251. phydev->duplex = DUPLEX_HALF;
  252. /* Check the gigabit fields */
  253. if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
  254. phydev->speed = SPEED_1000;
  255. if (gblpa & PHY_1000BTSR_1000FD)
  256. phydev->duplex = DUPLEX_FULL;
  257. /* We're done! */
  258. return 0;
  259. }
  260. lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  261. lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
  262. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  263. phydev->speed = SPEED_100;
  264. if (lpa & LPA_100FULL)
  265. phydev->duplex = DUPLEX_FULL;
  266. } else if (lpa & LPA_10FULL)
  267. phydev->duplex = DUPLEX_FULL;
  268. /*
  269. * Extended status may indicate that the PHY supports
  270. * 1000BASE-T/X even though the 1000BASE-T registers
  271. * are missing. In this case we can't tell whether the
  272. * peer also supports it, so we only check extended
  273. * status if the 1000BASE-T registers are actually
  274. * missing.
  275. */
  276. if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
  277. estatus = phy_read(phydev, MDIO_DEVAD_NONE,
  278. MII_ESTATUS);
  279. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
  280. ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
  281. phydev->speed = SPEED_1000;
  282. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
  283. phydev->duplex = DUPLEX_FULL;
  284. }
  285. } else {
  286. u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  287. phydev->speed = SPEED_10;
  288. phydev->duplex = DUPLEX_HALF;
  289. if (bmcr & BMCR_FULLDPLX)
  290. phydev->duplex = DUPLEX_FULL;
  291. if (bmcr & BMCR_SPEED1000)
  292. phydev->speed = SPEED_1000;
  293. else if (bmcr & BMCR_SPEED100)
  294. phydev->speed = SPEED_100;
  295. }
  296. return 0;
  297. }
  298. int genphy_config(struct phy_device *phydev)
  299. {
  300. int val;
  301. u32 features;
  302. /* For now, I'll claim that the generic driver supports
  303. * all possible port types */
  304. features = (SUPPORTED_TP | SUPPORTED_MII
  305. | SUPPORTED_AUI | SUPPORTED_FIBRE |
  306. SUPPORTED_BNC);
  307. /* Do we support autonegotiation? */
  308. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  309. if (val < 0)
  310. return val;
  311. if (val & BMSR_ANEGCAPABLE)
  312. features |= SUPPORTED_Autoneg;
  313. if (val & BMSR_100FULL)
  314. features |= SUPPORTED_100baseT_Full;
  315. if (val & BMSR_100HALF)
  316. features |= SUPPORTED_100baseT_Half;
  317. if (val & BMSR_10FULL)
  318. features |= SUPPORTED_10baseT_Full;
  319. if (val & BMSR_10HALF)
  320. features |= SUPPORTED_10baseT_Half;
  321. if (val & BMSR_ESTATEN) {
  322. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
  323. if (val < 0)
  324. return val;
  325. if (val & ESTATUS_1000_TFULL)
  326. features |= SUPPORTED_1000baseT_Full;
  327. if (val & ESTATUS_1000_THALF)
  328. features |= SUPPORTED_1000baseT_Half;
  329. if (val & ESTATUS_1000_XFULL)
  330. features |= SUPPORTED_1000baseX_Full;
  331. if (val & ESTATUS_1000_XHALF)
  332. features |= SUPPORTED_1000baseX_Half;
  333. }
  334. phydev->supported = features;
  335. phydev->advertising = features;
  336. genphy_config_aneg(phydev);
  337. return 0;
  338. }
  339. int genphy_startup(struct phy_device *phydev)
  340. {
  341. genphy_update_link(phydev);
  342. genphy_parse_link(phydev);
  343. return 0;
  344. }
  345. int genphy_shutdown(struct phy_device *phydev)
  346. {
  347. return 0;
  348. }
  349. static struct phy_driver genphy_driver = {
  350. .uid = 0xffffffff,
  351. .mask = 0xffffffff,
  352. .name = "Generic PHY",
  353. .features = 0,
  354. .config = genphy_config,
  355. .startup = genphy_startup,
  356. .shutdown = genphy_shutdown,
  357. };
  358. static LIST_HEAD(phy_drivers);
  359. int phy_init(void)
  360. {
  361. #ifdef CONFIG_PHY_AQUANTIA
  362. phy_aquantia_init();
  363. #endif
  364. #ifdef CONFIG_PHY_ATHEROS
  365. phy_atheros_init();
  366. #endif
  367. #ifdef CONFIG_PHY_BROADCOM
  368. phy_broadcom_init();
  369. #endif
  370. #ifdef CONFIG_PHY_CORTINA
  371. phy_cortina_init();
  372. #endif
  373. #ifdef CONFIG_PHY_DAVICOM
  374. phy_davicom_init();
  375. #endif
  376. #ifdef CONFIG_PHY_ET1011C
  377. phy_et1011c_init();
  378. #endif
  379. #ifdef CONFIG_PHY_LXT
  380. phy_lxt_init();
  381. #endif
  382. #ifdef CONFIG_PHY_MARVELL
  383. phy_marvell_init();
  384. #endif
  385. #ifdef CONFIG_PHY_MICREL
  386. phy_micrel_init();
  387. #endif
  388. #ifdef CONFIG_PHY_NATSEMI
  389. phy_natsemi_init();
  390. #endif
  391. #ifdef CONFIG_PHY_REALTEK
  392. phy_realtek_init();
  393. #endif
  394. #ifdef CONFIG_PHY_SMSC
  395. phy_smsc_init();
  396. #endif
  397. #ifdef CONFIG_PHY_TERANETICS
  398. phy_teranetics_init();
  399. #endif
  400. #ifdef CONFIG_PHY_VITESSE
  401. phy_vitesse_init();
  402. #endif
  403. return 0;
  404. }
  405. int phy_register(struct phy_driver *drv)
  406. {
  407. INIT_LIST_HEAD(&drv->list);
  408. list_add_tail(&drv->list, &phy_drivers);
  409. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  410. if (drv->probe)
  411. drv->probe += gd->reloc_off;
  412. if (drv->config)
  413. drv->config += gd->reloc_off;
  414. if (drv->startup)
  415. drv->startup += gd->reloc_off;
  416. if (drv->shutdown)
  417. drv->shutdown += gd->reloc_off;
  418. if (drv->readext)
  419. drv->readext += gd->reloc_off;
  420. if (drv->writeext)
  421. drv->writeext += gd->reloc_off;
  422. #endif
  423. return 0;
  424. }
  425. static int phy_probe(struct phy_device *phydev)
  426. {
  427. int err = 0;
  428. phydev->advertising = phydev->supported = phydev->drv->features;
  429. phydev->mmds = phydev->drv->mmds;
  430. if (phydev->drv->probe)
  431. err = phydev->drv->probe(phydev);
  432. return err;
  433. }
  434. static struct phy_driver *generic_for_interface(phy_interface_t interface)
  435. {
  436. #ifdef CONFIG_PHYLIB_10G
  437. if (is_10g_interface(interface))
  438. return &gen10g_driver;
  439. #endif
  440. return &genphy_driver;
  441. }
  442. static struct phy_driver *get_phy_driver(struct phy_device *phydev,
  443. phy_interface_t interface)
  444. {
  445. struct list_head *entry;
  446. int phy_id = phydev->phy_id;
  447. struct phy_driver *drv = NULL;
  448. list_for_each(entry, &phy_drivers) {
  449. drv = list_entry(entry, struct phy_driver, list);
  450. if ((drv->uid & drv->mask) == (phy_id & drv->mask))
  451. return drv;
  452. }
  453. /* If we made it here, there's no driver for this PHY */
  454. return generic_for_interface(interface);
  455. }
  456. static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
  457. u32 phy_id,
  458. phy_interface_t interface)
  459. {
  460. struct phy_device *dev;
  461. /* We allocate the device, and initialize the
  462. * default values */
  463. dev = malloc(sizeof(*dev));
  464. if (!dev) {
  465. printf("Failed to allocate PHY device for %s:%d\n",
  466. bus->name, addr);
  467. return NULL;
  468. }
  469. memset(dev, 0, sizeof(*dev));
  470. dev->duplex = -1;
  471. dev->link = 0;
  472. dev->interface = interface;
  473. dev->autoneg = AUTONEG_ENABLE;
  474. dev->addr = addr;
  475. dev->phy_id = phy_id;
  476. dev->bus = bus;
  477. dev->drv = get_phy_driver(dev, interface);
  478. phy_probe(dev);
  479. bus->phymap[addr] = dev;
  480. return dev;
  481. }
  482. /**
  483. * get_phy_id - reads the specified addr for its ID.
  484. * @bus: the target MII bus
  485. * @addr: PHY address on the MII bus
  486. * @phy_id: where to store the ID retrieved.
  487. *
  488. * Description: Reads the ID registers of the PHY at @addr on the
  489. * @bus, stores it in @phy_id and returns zero on success.
  490. */
  491. int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
  492. {
  493. int phy_reg;
  494. /* Grab the bits from PHYIR1, and put them
  495. * in the upper half */
  496. phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
  497. if (phy_reg < 0)
  498. return -EIO;
  499. *phy_id = (phy_reg & 0xffff) << 16;
  500. /* Grab the bits from PHYIR2, and put them in the lower half */
  501. phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
  502. if (phy_reg < 0)
  503. return -EIO;
  504. *phy_id |= (phy_reg & 0xffff);
  505. return 0;
  506. }
  507. static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
  508. unsigned phy_mask, int devad, phy_interface_t interface)
  509. {
  510. u32 phy_id = 0xffffffff;
  511. while (phy_mask) {
  512. int addr = ffs(phy_mask) - 1;
  513. int r = get_phy_id(bus, addr, devad, &phy_id);
  514. /* If the PHY ID is mostly f's, we didn't find anything */
  515. if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
  516. return phy_device_create(bus, addr, phy_id, interface);
  517. phy_mask &= ~(1 << addr);
  518. }
  519. return NULL;
  520. }
  521. static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
  522. unsigned phy_mask, phy_interface_t interface)
  523. {
  524. /* If we have one, return the existing device, with new interface */
  525. while (phy_mask) {
  526. int addr = ffs(phy_mask) - 1;
  527. if (bus->phymap[addr]) {
  528. bus->phymap[addr]->interface = interface;
  529. return bus->phymap[addr];
  530. }
  531. phy_mask &= ~(1 << addr);
  532. }
  533. return NULL;
  534. }
  535. static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
  536. unsigned phy_mask, phy_interface_t interface)
  537. {
  538. int i;
  539. struct phy_device *phydev;
  540. phydev = search_for_existing_phy(bus, phy_mask, interface);
  541. if (phydev)
  542. return phydev;
  543. /* Try Standard (ie Clause 22) access */
  544. /* Otherwise we have to try Clause 45 */
  545. for (i = 0; i < 5; i++) {
  546. phydev = create_phy_by_mask(bus, phy_mask,
  547. i ? i : MDIO_DEVAD_NONE, interface);
  548. if (IS_ERR(phydev))
  549. return NULL;
  550. if (phydev)
  551. return phydev;
  552. }
  553. debug("\n%s PHY: ", bus->name);
  554. while (phy_mask) {
  555. int addr = ffs(phy_mask) - 1;
  556. debug("%d ", addr);
  557. phy_mask &= ~(1 << addr);
  558. }
  559. debug("not found\n");
  560. return NULL;
  561. }
  562. /**
  563. * get_phy_device - reads the specified PHY device and returns its @phy_device struct
  564. * @bus: the target MII bus
  565. * @addr: PHY address on the MII bus
  566. *
  567. * Description: Reads the ID registers of the PHY at @addr on the
  568. * @bus, then allocates and returns the phy_device to represent it.
  569. */
  570. static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
  571. phy_interface_t interface)
  572. {
  573. return get_phy_device_by_mask(bus, 1 << addr, interface);
  574. }
  575. int phy_reset(struct phy_device *phydev)
  576. {
  577. int reg;
  578. int timeout = 500;
  579. int devad = MDIO_DEVAD_NONE;
  580. #ifdef CONFIG_PHYLIB_10G
  581. /* If it's 10G, we need to issue reset through one of the MMDs */
  582. if (is_10g_interface(phydev->interface)) {
  583. if (!phydev->mmds)
  584. gen10g_discover_mmds(phydev);
  585. devad = ffs(phydev->mmds) - 1;
  586. }
  587. #endif
  588. reg = phy_read(phydev, devad, MII_BMCR);
  589. if (reg < 0) {
  590. debug("PHY status read failed\n");
  591. return -1;
  592. }
  593. reg |= BMCR_RESET;
  594. if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
  595. debug("PHY reset failed\n");
  596. return -1;
  597. }
  598. #ifdef CONFIG_PHY_RESET_DELAY
  599. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  600. #endif
  601. /*
  602. * Poll the control register for the reset bit to go to 0 (it is
  603. * auto-clearing). This should happen within 0.5 seconds per the
  604. * IEEE spec.
  605. */
  606. while ((reg & BMCR_RESET) && timeout--) {
  607. reg = phy_read(phydev, devad, MII_BMCR);
  608. if (reg < 0) {
  609. debug("PHY status read failed\n");
  610. return -1;
  611. }
  612. udelay(1000);
  613. }
  614. if (reg & BMCR_RESET) {
  615. puts("PHY reset timed out\n");
  616. return -1;
  617. }
  618. return 0;
  619. }
  620. int miiphy_reset(const char *devname, unsigned char addr)
  621. {
  622. struct mii_dev *bus = miiphy_get_dev_by_name(devname);
  623. struct phy_device *phydev;
  624. /*
  625. * miiphy_reset was only used on standard PHYs, so we'll fake it here.
  626. * If later code tries to connect with the right interface, this will
  627. * be corrected by get_phy_device in phy_connect()
  628. */
  629. phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
  630. return phy_reset(phydev);
  631. }
  632. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  633. phy_interface_t interface)
  634. {
  635. /* Reset the bus */
  636. if (bus->reset) {
  637. bus->reset(bus);
  638. /* Wait 15ms to make sure the PHY has come out of hard reset */
  639. udelay(15000);
  640. }
  641. return get_phy_device_by_mask(bus, phy_mask, interface);
  642. }
  643. #ifdef CONFIG_DM_ETH
  644. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
  645. #else
  646. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
  647. #endif
  648. {
  649. /* Soft Reset the PHY */
  650. phy_reset(phydev);
  651. if (phydev->dev) {
  652. printf("%s:%d is connected to %s. Reconnecting to %s\n",
  653. phydev->bus->name, phydev->addr,
  654. phydev->dev->name, dev->name);
  655. }
  656. phydev->dev = dev;
  657. debug("%s connected to %s\n", dev->name, phydev->drv->name);
  658. }
  659. #ifdef CONFIG_DM_ETH
  660. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  661. struct udevice *dev, phy_interface_t interface)
  662. #else
  663. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  664. struct eth_device *dev, phy_interface_t interface)
  665. #endif
  666. {
  667. struct phy_device *phydev;
  668. phydev = phy_find_by_mask(bus, 1 << addr, interface);
  669. if (phydev)
  670. phy_connect_dev(phydev, dev);
  671. else
  672. printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
  673. return phydev;
  674. }
  675. /*
  676. * Start the PHY. Returns 0 on success, or a negative error code.
  677. */
  678. int phy_startup(struct phy_device *phydev)
  679. {
  680. if (phydev->drv->startup)
  681. return phydev->drv->startup(phydev);
  682. return 0;
  683. }
  684. __weak int board_phy_config(struct phy_device *phydev)
  685. {
  686. if (phydev->drv->config)
  687. return phydev->drv->config(phydev);
  688. return 0;
  689. }
  690. int phy_config(struct phy_device *phydev)
  691. {
  692. /* Invoke an optional board-specific helper */
  693. board_phy_config(phydev);
  694. return 0;
  695. }
  696. int phy_shutdown(struct phy_device *phydev)
  697. {
  698. if (phydev->drv->shutdown)
  699. phydev->drv->shutdown(phydev);
  700. return 0;
  701. }
  702. int phy_get_interface_by_name(const char *str)
  703. {
  704. int i;
  705. for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
  706. if (!strcmp(str, phy_interface_strings[i]))
  707. return i;
  708. }
  709. return -1;
  710. }