da830evm.c 5.1 KB

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  1. /*
  2. * Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
  3. *
  4. * Base on code from TI. Original Notices follow:
  5. *
  6. * (C) Copyright 2008, Texas Instruments, Inc. http://www.ti.com/
  7. *
  8. * Modified for DA8xx EVM.
  9. *
  10. * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
  11. *
  12. * Parts are shamelessly stolen from various TI sources, original copyright
  13. * follows:
  14. * -----------------------------------------------------------------
  15. *
  16. * Copyright (C) 2004 Texas Instruments.
  17. *
  18. * ----------------------------------------------------------------------------
  19. * SPDX-License-Identifier: GPL-2.0+
  20. * ----------------------------------------------------------------------------
  21. */
  22. #include <common.h>
  23. #include <i2c.h>
  24. #include <net.h>
  25. #include <netdev.h>
  26. #include <asm/arch/hardware.h>
  27. #include <asm/arch/emac_defs.h>
  28. #include <asm/arch/pinmux_defs.h>
  29. #include <asm/io.h>
  30. #include <nand.h>
  31. #include <asm/ti-common/davinci_nand.h>
  32. #include <asm/arch/davinci_misc.h>
  33. #ifdef CONFIG_DAVINCI_MMC
  34. #include <mmc.h>
  35. #include <asm/arch/sdmmc_defs.h>
  36. #endif
  37. DECLARE_GLOBAL_DATA_PTR;
  38. static const struct pinmux_resource pinmuxes[] = {
  39. #ifdef CONFIG_SPI_FLASH
  40. PINMUX_ITEM(spi0_pins_base),
  41. PINMUX_ITEM(spi0_pins_scs0),
  42. PINMUX_ITEM(spi0_pins_ena),
  43. #endif
  44. PINMUX_ITEM(uart2_pins_txrx),
  45. PINMUX_ITEM(i2c0_pins),
  46. #ifdef CONFIG_USB_DA8XX
  47. PINMUX_ITEM(usb_pins),
  48. #endif
  49. #ifdef CONFIG_USE_NAND
  50. PINMUX_ITEM(emifa_pins),
  51. PINMUX_ITEM(emifa_pins_cs0),
  52. PINMUX_ITEM(emifa_pins_cs2),
  53. PINMUX_ITEM(emifa_pins_cs3),
  54. #endif
  55. #if defined(CONFIG_DRIVER_TI_EMAC)
  56. PINMUX_ITEM(emac_pins_rmii),
  57. PINMUX_ITEM(emac_pins_mdio),
  58. PINMUX_ITEM(emac_pins_rmii_clk_source),
  59. #endif
  60. #ifdef CONFIG_DAVINCI_MMC
  61. PINMUX_ITEM(mmc0_pins_8bit)
  62. #endif
  63. };
  64. static const struct lpsc_resource lpsc[] = {
  65. { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
  66. { DAVINCI_LPSC_SPI0 }, /* Serial Flash */
  67. { DAVINCI_LPSC_EMAC }, /* image download */
  68. { DAVINCI_LPSC_UART2 }, /* console */
  69. { DAVINCI_LPSC_GPIO },
  70. #ifdef CONFIG_DAVINCI_MMC
  71. { DAVINCI_LPSC_MMC_SD },
  72. #endif
  73. };
  74. #ifdef CONFIG_DAVINCI_MMC
  75. static struct davinci_mmc mmc_sd0 = {
  76. .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
  77. .host_caps = MMC_MODE_8BIT,
  78. .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
  79. .version = MMC_CTLR_VERSION_2,
  80. };
  81. int board_mmc_init(bd_t *bis)
  82. {
  83. mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
  84. printf("%x\n", mmc_sd0.input_clk);
  85. /* Add slot-0 to mmc subsystem */
  86. return davinci_mmc_init(bis, &mmc_sd0);
  87. }
  88. #endif
  89. int board_init(void)
  90. {
  91. #ifndef CONFIG_USE_IRQ
  92. irq_init();
  93. #endif
  94. #ifdef CONFIG_NAND_DAVINCI
  95. /* EMIFA 100MHz clock select */
  96. writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
  97. &davinci_syscfg_regs->cfgchip3);
  98. /* NAND CS setup */
  99. writel((DAVINCI_ABCR_WSETUP(0) |
  100. DAVINCI_ABCR_WSTROBE(2) |
  101. DAVINCI_ABCR_WHOLD(0) |
  102. DAVINCI_ABCR_RSETUP(0) |
  103. DAVINCI_ABCR_RSTROBE(2) |
  104. DAVINCI_ABCR_RHOLD(0) |
  105. DAVINCI_ABCR_TA(2) |
  106. DAVINCI_ABCR_ASIZE_8BIT),
  107. &davinci_emif_regs->ab2cr);
  108. #endif
  109. /* arch number of the board */
  110. gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
  111. /* address of boot parameters */
  112. gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
  113. /*
  114. * Power on required peripherals
  115. * ARM does not have access by default to PSC0 and PSC1
  116. * assuming here that the DSP bootloader has set the IOPU
  117. * such that PSC access is available to ARM
  118. */
  119. if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
  120. return 1;
  121. /* setup the SUSPSRC for ARM to control emulation suspend */
  122. writel(readl(&davinci_syscfg_regs->suspsrc) &
  123. ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
  124. DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
  125. DAVINCI_SYSCFG_SUSPSRC_UART2),
  126. &davinci_syscfg_regs->suspsrc);
  127. /* configure pinmux settings */
  128. if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
  129. return 1;
  130. /* enable the console UART */
  131. writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
  132. DAVINCI_UART_PWREMU_MGMT_UTRST),
  133. &davinci_uart2_ctrl_regs->pwremu_mgmt);
  134. return(0);
  135. }
  136. #ifdef CONFIG_NAND_DAVINCI
  137. int board_nand_init(struct nand_chip *nand)
  138. {
  139. davinci_nand_init(nand);
  140. return 0;
  141. }
  142. #endif
  143. #if defined(CONFIG_DRIVER_TI_EMAC)
  144. #define PHY_SW_I2C_ADDR 0x5f /* Address of PHY on i2c bus */
  145. /*
  146. * Initializes on-board ethernet controllers.
  147. */
  148. int board_eth_init(bd_t *bis)
  149. {
  150. u_int8_t mac_addr[6];
  151. u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
  152. struct eth_device *dev;
  153. /* Read Ethernet MAC address from EEPROM */
  154. if (dvevm_read_mac_address(mac_addr))
  155. /* set address env if not already set */
  156. davinci_sync_env_enetaddr(mac_addr);
  157. /* read the address back from env */
  158. if (!eth_getenv_enetaddr("ethaddr", mac_addr))
  159. return -1;
  160. /* enable the Ethernet switch in the 3 port PHY */
  161. if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
  162. switch_start_cmd, sizeof(switch_start_cmd))) {
  163. printf("Ethernet switch start failed!\n");
  164. return -1;
  165. }
  166. /* finally, initialise the driver */
  167. if (!davinci_emac_initialize()) {
  168. printf("Error: Ethernet init failed!\n");
  169. return -1;
  170. }
  171. dev = eth_get_dev();
  172. /* provide the resulting addr to the driver */
  173. memcpy(dev->enetaddr, mac_addr, 6);
  174. dev->write_hwaddr(dev);
  175. return 0;
  176. }
  177. #endif /* CONFIG_DRIVER_TI_EMAC */