musb_core.h 16 KB

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  1. /*
  2. * MUSB OTG driver defines
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #ifndef __MUSB_CORE_H__
  35. #define __MUSB_CORE_H__
  36. #ifndef __UBOOT__
  37. #include <linux/slab.h>
  38. #include <linux/list.h>
  39. #include <linux/interrupt.h>
  40. #include <linux/errno.h>
  41. #include <linux/timer.h>
  42. #include <linux/device.h>
  43. #include <linux/usb.h>
  44. #include <linux/usb/otg.h>
  45. #else
  46. #include <asm/errno.h>
  47. #endif
  48. #include <linux/usb/ch9.h>
  49. #include <linux/usb/gadget.h>
  50. #include <linux/usb/musb.h>
  51. struct musb;
  52. struct musb_hw_ep;
  53. struct musb_ep;
  54. /* Helper defines for struct musb->hwvers */
  55. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  56. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  57. #define MUSB_HWVERS_RC 0x8000
  58. #define MUSB_HWVERS_1300 0x52C
  59. #define MUSB_HWVERS_1400 0x590
  60. #define MUSB_HWVERS_1800 0x720
  61. #define MUSB_HWVERS_1900 0x784
  62. #define MUSB_HWVERS_2000 0x800
  63. #include "musb_debug.h"
  64. #include "musb_dma.h"
  65. #include "musb_io.h"
  66. #include "musb_regs.h"
  67. #include "musb_gadget.h"
  68. #ifndef __UBOOT__
  69. #include <linux/usb/hcd.h>
  70. #endif
  71. #include "musb_host.h"
  72. #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
  73. #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
  74. #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
  75. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  76. * OTG or host-only go to A_IDLE when ID is sensed.
  77. */
  78. #define is_peripheral_active(m) (!(m)->is_host)
  79. #define is_host_active(m) ((m)->is_host)
  80. #ifdef CONFIG_PROC_FS
  81. #include <linux/fs.h>
  82. #define MUSB_CONFIG_PROC_FS
  83. #endif
  84. /****************************** PERIPHERAL ROLE *****************************/
  85. #ifndef __UBOOT__
  86. #define is_peripheral_capable() (1)
  87. #else
  88. #ifdef CONFIG_MUSB_GADGET
  89. #define is_peripheral_capable() (1)
  90. #else
  91. #define is_peripheral_capable() (0)
  92. #endif
  93. #endif
  94. extern irqreturn_t musb_g_ep0_irq(struct musb *);
  95. extern void musb_g_tx(struct musb *, u8);
  96. extern void musb_g_rx(struct musb *, u8);
  97. extern void musb_g_reset(struct musb *);
  98. extern void musb_g_suspend(struct musb *);
  99. extern void musb_g_resume(struct musb *);
  100. extern void musb_g_wakeup(struct musb *);
  101. extern void musb_g_disconnect(struct musb *);
  102. /****************************** HOST ROLE ***********************************/
  103. #ifndef __UBOOT__
  104. #define is_host_capable() (1)
  105. #else
  106. #ifdef CONFIG_MUSB_HOST
  107. #define is_host_capable() (1)
  108. #else
  109. #define is_host_capable() (0)
  110. #endif
  111. #endif
  112. extern irqreturn_t musb_h_ep0_irq(struct musb *);
  113. extern void musb_host_tx(struct musb *, u8);
  114. extern void musb_host_rx(struct musb *, u8);
  115. /****************************** CONSTANTS ********************************/
  116. #ifndef MUSB_C_NUM_EPS
  117. #define MUSB_C_NUM_EPS ((u8)16)
  118. #endif
  119. #ifndef MUSB_MAX_END0_PACKET
  120. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  121. #endif
  122. /* host side ep0 states */
  123. enum musb_h_ep0_state {
  124. MUSB_EP0_IDLE,
  125. MUSB_EP0_START, /* expect ack of setup */
  126. MUSB_EP0_IN, /* expect IN DATA */
  127. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  128. MUSB_EP0_STATUS, /* expect ack of STATUS */
  129. } __attribute__ ((packed));
  130. /* peripheral side ep0 states */
  131. enum musb_g_ep0_state {
  132. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  133. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  134. MUSB_EP0_STAGE_TX, /* IN data */
  135. MUSB_EP0_STAGE_RX, /* OUT data */
  136. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  137. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  138. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  139. } __attribute__ ((packed));
  140. /*
  141. * OTG protocol constants. See USB OTG 1.3 spec,
  142. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  143. */
  144. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  145. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  146. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  147. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  148. /*************************** REGISTER ACCESS ********************************/
  149. /* Endpoint registers (other than dynfifo setup) can be accessed either
  150. * directly with the "flat" model, or after setting up an index register.
  151. */
  152. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
  153. || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
  154. || defined(CONFIG_ARCH_OMAP4)
  155. /* REVISIT indexed access seemed to
  156. * misbehave (on DaVinci) for at least peripheral IN ...
  157. */
  158. #define MUSB_FLAT_REG
  159. #endif
  160. /* TUSB mapping: "flat" plus ep0 special cases */
  161. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  162. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  163. #define musb_ep_select(_mbase, _epnum) \
  164. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  165. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  166. /* "flat" mapping: each endpoint has its own i/o address */
  167. #elif defined(MUSB_FLAT_REG)
  168. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  169. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  170. /* "indexed" mapping: INDEX register controls register bank select */
  171. #else
  172. #define musb_ep_select(_mbase, _epnum) \
  173. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  174. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  175. #endif
  176. /****************************** FUNCTIONS ********************************/
  177. #define MUSB_HST_MODE(_musb)\
  178. { (_musb)->is_host = true; }
  179. #define MUSB_DEV_MODE(_musb) \
  180. { (_musb)->is_host = false; }
  181. #define test_devctl_hst_mode(_x) \
  182. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  183. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  184. /******************************** TYPES *************************************/
  185. /**
  186. * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
  187. * @init: turns on clocks, sets up platform-specific registers, etc
  188. * @exit: undoes @init
  189. * @set_mode: forcefully changes operating mode
  190. * @try_ilde: tries to idle the IP
  191. * @vbus_status: returns vbus status if possible
  192. * @set_vbus: forces vbus status
  193. * @adjust_channel_params: pre check for standard dma channel_program func
  194. */
  195. struct musb_platform_ops {
  196. int (*init)(struct musb *musb);
  197. int (*exit)(struct musb *musb);
  198. void (*enable)(struct musb *musb);
  199. void (*disable)(struct musb *musb);
  200. int (*set_mode)(struct musb *musb, u8 mode);
  201. void (*try_idle)(struct musb *musb, unsigned long timeout);
  202. int (*vbus_status)(struct musb *musb);
  203. void (*set_vbus)(struct musb *musb, int on);
  204. int (*adjust_channel_params)(struct dma_channel *channel,
  205. u16 packet_sz, u8 *mode,
  206. dma_addr_t *dma_addr, u32 *len);
  207. };
  208. /*
  209. * struct musb_hw_ep - endpoint hardware (bidirectional)
  210. *
  211. * Ordered slightly for better cacheline locality.
  212. */
  213. struct musb_hw_ep {
  214. struct musb *musb;
  215. void __iomem *fifo;
  216. void __iomem *regs;
  217. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  218. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  219. void __iomem *conf;
  220. #endif
  221. /* index in musb->endpoints[] */
  222. u8 epnum;
  223. /* hardware configuration, possibly dynamic */
  224. bool is_shared_fifo;
  225. bool tx_double_buffered;
  226. bool rx_double_buffered;
  227. u16 max_packet_sz_tx;
  228. u16 max_packet_sz_rx;
  229. struct dma_channel *tx_channel;
  230. struct dma_channel *rx_channel;
  231. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  232. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  233. /* TUSB has "asynchronous" and "synchronous" dma modes */
  234. dma_addr_t fifo_async;
  235. dma_addr_t fifo_sync;
  236. void __iomem *fifo_sync_va;
  237. #endif
  238. void __iomem *target_regs;
  239. /* currently scheduled peripheral endpoint */
  240. struct musb_qh *in_qh;
  241. struct musb_qh *out_qh;
  242. u8 rx_reinit;
  243. u8 tx_reinit;
  244. /* peripheral side */
  245. struct musb_ep ep_in; /* TX */
  246. struct musb_ep ep_out; /* RX */
  247. };
  248. static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
  249. {
  250. return next_request(&hw_ep->ep_in);
  251. }
  252. static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
  253. {
  254. return next_request(&hw_ep->ep_out);
  255. }
  256. struct musb_csr_regs {
  257. /* FIFO registers */
  258. u16 txmaxp, txcsr, rxmaxp, rxcsr;
  259. u16 rxfifoadd, txfifoadd;
  260. u8 txtype, txinterval, rxtype, rxinterval;
  261. u8 rxfifosz, txfifosz;
  262. u8 txfunaddr, txhubaddr, txhubport;
  263. u8 rxfunaddr, rxhubaddr, rxhubport;
  264. };
  265. struct musb_context_registers {
  266. u8 power;
  267. u16 intrtxe, intrrxe;
  268. u8 intrusbe;
  269. u16 frame;
  270. u8 index, testmode;
  271. u8 devctl, busctl, misc;
  272. u32 otg_interfsel;
  273. struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
  274. };
  275. /*
  276. * struct musb - Driver instance data.
  277. */
  278. struct musb {
  279. /* device lock */
  280. spinlock_t lock;
  281. const struct musb_platform_ops *ops;
  282. struct musb_context_registers context;
  283. irqreturn_t (*isr)(int, void *);
  284. struct work_struct irq_work;
  285. u16 hwvers;
  286. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  287. #define MUSB_PORT_STAT_RESUME (1 << 31)
  288. u32 port1_status;
  289. unsigned long rh_timer;
  290. enum musb_h_ep0_state ep0_stage;
  291. /* bulk traffic normally dedicates endpoint hardware, and each
  292. * direction has its own ring of host side endpoints.
  293. * we try to progress the transfer at the head of each endpoint's
  294. * queue until it completes or NAKs too much; then we try the next
  295. * endpoint.
  296. */
  297. struct musb_hw_ep *bulk_ep;
  298. struct list_head control; /* of musb_qh */
  299. struct list_head in_bulk; /* of musb_qh */
  300. struct list_head out_bulk; /* of musb_qh */
  301. struct timer_list otg_timer;
  302. struct notifier_block nb;
  303. struct dma_controller *dma_controller;
  304. struct device *controller;
  305. void __iomem *ctrl_base;
  306. void __iomem *mregs;
  307. #if defined(CONFIG_USB_MUSB_TUSB6010) || \
  308. defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
  309. dma_addr_t async;
  310. dma_addr_t sync;
  311. void __iomem *sync_va;
  312. #endif
  313. /* passed down from chip/board specific irq handlers */
  314. u8 int_usb;
  315. u16 int_rx;
  316. u16 int_tx;
  317. struct usb_phy *xceiv;
  318. int nIrq;
  319. unsigned irq_wake:1;
  320. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  321. #define control_ep endpoints
  322. #define VBUSERR_RETRY_COUNT 3
  323. u16 vbuserr_retry;
  324. u16 epmask;
  325. u8 nr_endpoints;
  326. u8 board_mode; /* enum musb_mode */
  327. int (*board_set_power)(int state);
  328. u8 min_power; /* vbus for periph, in mA/2 */
  329. bool is_host;
  330. int a_wait_bcon; /* VBUS timeout in msecs */
  331. unsigned long idle_timeout; /* Next timeout in jiffies */
  332. /* active means connected and not suspended */
  333. unsigned is_active:1;
  334. unsigned is_multipoint:1;
  335. unsigned ignore_disconnect:1; /* during bus resets */
  336. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  337. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  338. unsigned dyn_fifo:1; /* dynamic FIFO supported? */
  339. unsigned bulk_split:1;
  340. #define can_bulk_split(musb,type) \
  341. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  342. unsigned bulk_combine:1;
  343. #define can_bulk_combine(musb,type) \
  344. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  345. /* is_suspended means USB B_PERIPHERAL suspend */
  346. unsigned is_suspended:1;
  347. /* may_wakeup means remote wakeup is enabled */
  348. unsigned may_wakeup:1;
  349. /* is_self_powered is reported in device status and the
  350. * config descriptor. is_bus_powered means B_PERIPHERAL
  351. * draws some VBUS current; both can be true.
  352. */
  353. unsigned is_self_powered:1;
  354. unsigned is_bus_powered:1;
  355. unsigned set_address:1;
  356. unsigned test_mode:1;
  357. unsigned softconnect:1;
  358. u8 address;
  359. u8 test_mode_nr;
  360. u16 ackpend; /* ep0 */
  361. enum musb_g_ep0_state ep0_state;
  362. struct usb_gadget g; /* the gadget */
  363. struct usb_gadget_driver *gadget_driver; /* its driver */
  364. /*
  365. * FIXME: Remove this flag.
  366. *
  367. * This is only added to allow Blackfin to work
  368. * with current driver. For some unknown reason
  369. * Blackfin doesn't work with double buffering
  370. * and that's enabled by default.
  371. *
  372. * We added this flag to forcefully disable double
  373. * buffering until we get it working.
  374. */
  375. unsigned double_buffer_not_ok:1;
  376. struct musb_hdrc_config *config;
  377. #ifdef MUSB_CONFIG_PROC_FS
  378. struct proc_dir_entry *proc_entry;
  379. #endif
  380. };
  381. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  382. {
  383. return container_of(g, struct musb, g);
  384. }
  385. #ifdef CONFIG_BLACKFIN
  386. static inline int musb_read_fifosize(struct musb *musb,
  387. struct musb_hw_ep *hw_ep, u8 epnum)
  388. {
  389. musb->nr_endpoints++;
  390. musb->epmask |= (1 << epnum);
  391. if (epnum < 5) {
  392. hw_ep->max_packet_sz_tx = 128;
  393. hw_ep->max_packet_sz_rx = 128;
  394. } else {
  395. hw_ep->max_packet_sz_tx = 1024;
  396. hw_ep->max_packet_sz_rx = 1024;
  397. }
  398. hw_ep->is_shared_fifo = false;
  399. return 0;
  400. }
  401. static inline void musb_configure_ep0(struct musb *musb)
  402. {
  403. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  404. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  405. musb->endpoints[0].is_shared_fifo = true;
  406. }
  407. #else
  408. static inline int musb_read_fifosize(struct musb *musb,
  409. struct musb_hw_ep *hw_ep, u8 epnum)
  410. {
  411. void *mbase = musb->mregs;
  412. u8 reg = 0;
  413. /* read from core using indexed model */
  414. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  415. /* 0's returned when no more endpoints */
  416. if (!reg)
  417. return -ENODEV;
  418. musb->nr_endpoints++;
  419. musb->epmask |= (1 << epnum);
  420. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  421. /* shared TX/RX FIFO? */
  422. if ((reg & 0xf0) == 0xf0) {
  423. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  424. hw_ep->is_shared_fifo = true;
  425. return 0;
  426. } else {
  427. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  428. hw_ep->is_shared_fifo = false;
  429. }
  430. return 0;
  431. }
  432. static inline void musb_configure_ep0(struct musb *musb)
  433. {
  434. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  435. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  436. musb->endpoints[0].is_shared_fifo = true;
  437. }
  438. #endif /* CONFIG_BLACKFIN */
  439. /***************************** Glue it together *****************************/
  440. extern const char musb_driver_name[];
  441. extern void musb_start(struct musb *musb);
  442. extern void musb_stop(struct musb *musb);
  443. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  444. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  445. extern void musb_load_testpacket(struct musb *);
  446. extern irqreturn_t musb_interrupt(struct musb *);
  447. extern void musb_hnp_stop(struct musb *musb);
  448. static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
  449. {
  450. if (musb->ops->set_vbus)
  451. musb->ops->set_vbus(musb, is_on);
  452. }
  453. static inline void musb_platform_enable(struct musb *musb)
  454. {
  455. if (musb->ops->enable)
  456. musb->ops->enable(musb);
  457. }
  458. static inline void musb_platform_disable(struct musb *musb)
  459. {
  460. if (musb->ops->disable)
  461. musb->ops->disable(musb);
  462. }
  463. static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
  464. {
  465. if (!musb->ops->set_mode)
  466. return 0;
  467. return musb->ops->set_mode(musb, mode);
  468. }
  469. static inline void musb_platform_try_idle(struct musb *musb,
  470. unsigned long timeout)
  471. {
  472. if (musb->ops->try_idle)
  473. musb->ops->try_idle(musb, timeout);
  474. }
  475. static inline int musb_platform_get_vbus_status(struct musb *musb)
  476. {
  477. if (!musb->ops->vbus_status)
  478. return 0;
  479. return musb->ops->vbus_status(musb);
  480. }
  481. static inline int musb_platform_init(struct musb *musb)
  482. {
  483. if (!musb->ops->init)
  484. return -EINVAL;
  485. return musb->ops->init(musb);
  486. }
  487. static inline int musb_platform_exit(struct musb *musb)
  488. {
  489. if (!musb->ops->exit)
  490. return -EINVAL;
  491. return musb->ops->exit(musb);
  492. }
  493. #ifdef __UBOOT__
  494. struct musb *
  495. musb_init_controller(struct musb_hdrc_platform_data *plat, struct device *dev,
  496. void *ctrl);
  497. #endif
  498. #endif /* __MUSB_CORE_H__ */