cache.S 1.1 KB

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  1. /*
  2. * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
  3. * Scott McNutt <smcnutt@psyent.com>
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <config.h>
  8. .text
  9. .global flush_dcache
  10. flush_dcache:
  11. add r5, r5, r4
  12. movhi r8, %hi(CONFIG_SYS_DCACHELINE_SIZE)
  13. ori r8, r8, %lo(CONFIG_SYS_DCACHELINE_SIZE)
  14. 0: flushd 0(r4)
  15. add r4, r4, r8
  16. bltu r4, r5, 0b
  17. ret
  18. .global flush_icache
  19. flush_icache:
  20. add r5, r5, r4
  21. movhi r8, %hi(CONFIG_SYS_ICACHELINE_SIZE)
  22. ori r8, r8, %lo(CONFIG_SYS_ICACHELINE_SIZE)
  23. 1: flushi r4
  24. add r4, r4, r8
  25. bltu r4, r5, 1b
  26. ret
  27. .global flush_dcache_range
  28. flush_dcache_range:
  29. movhi r8, %hi(CONFIG_SYS_DCACHELINE_SIZE)
  30. ori r8, r8, %lo(CONFIG_SYS_DCACHELINE_SIZE)
  31. 0: flushd 0(r4)
  32. add r4, r4, r8
  33. bltu r4, r5, 0b
  34. ret
  35. .global flush_cache
  36. flush_cache:
  37. add r5, r5, r4
  38. mov r9, r4
  39. mov r10, r5
  40. movhi r8, %hi(CONFIG_SYS_DCACHELINE_SIZE)
  41. ori r8, r8, %lo(CONFIG_SYS_DCACHELINE_SIZE)
  42. 0: flushd 0(r4)
  43. add r4, r4, r8
  44. bltu r4, r5, 0b
  45. mov r4, r9
  46. mov r5, r10
  47. movhi r8, %hi(CONFIG_SYS_ICACHELINE_SIZE)
  48. ori r8, r8, %lo(CONFIG_SYS_ICACHELINE_SIZE)
  49. 1: flushi r4
  50. add r4, r4, r8
  51. bltu r4, r5, 1b
  52. sync
  53. flushp
  54. ret