tegra30-apalis.dts 6.3 KB

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  1. /dts-v1/;
  2. #include "tegra30.dtsi"
  3. / {
  4. model = "Toradex Apalis T30";
  5. compatible = "toradex,apalis_t30", "nvidia,tegra30";
  6. chosen {
  7. stdout-path = &uarta;
  8. };
  9. aliases {
  10. i2c0 = "/i2c@7000d000";
  11. i2c1 = "/i2c@7000c000";
  12. i2c2 = "/i2c@7000c500";
  13. i2c3 = "/i2c@7000c700";
  14. sdhci0 = "/sdhci@78000600";
  15. sdhci1 = "/sdhci@78000400";
  16. sdhci2 = "/sdhci@78000000";
  17. usb0 = "/usb@7d000000";
  18. usb1 = "/usb@7d004000";
  19. usb2 = "/usb@7d008000";
  20. };
  21. memory {
  22. device_type = "memory";
  23. reg = <0x80000000 0x40000000>;
  24. };
  25. pcie-controller@00003000 {
  26. status = "okay";
  27. avdd-pexa-supply = <&vdd2_reg>;
  28. vdd-pexa-supply = <&vdd2_reg>;
  29. avdd-pexb-supply = <&vdd2_reg>;
  30. vdd-pexb-supply = <&vdd2_reg>;
  31. avdd-pex-pll-supply = <&vdd2_reg>;
  32. avdd-plle-supply = <&ldo6_reg>;
  33. vddio-pex-ctl-supply = <&sys_3v3_reg>;
  34. hvdd-pex-supply = <&sys_3v3_reg>;
  35. pci@1,0 {
  36. nvidia,num-lanes = <4>;
  37. };
  38. pci@2,0 {
  39. nvidia,num-lanes = <1>;
  40. };
  41. pci@3,0 {
  42. status = "okay";
  43. nvidia,num-lanes = <1>;
  44. };
  45. };
  46. /*
  47. * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
  48. * board)
  49. */
  50. i2c@7000c000 {
  51. status = "okay";
  52. clock-frequency = <100000>;
  53. };
  54. /* GEN2_I2C: unused */
  55. /*
  56. * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
  57. * carrier board)
  58. */
  59. i2c@7000c500 {
  60. status = "okay";
  61. clock-frequency = <100000>;
  62. };
  63. /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
  64. i2c@7000c700 {
  65. status = "okay";
  66. clock-frequency = <100000>;
  67. };
  68. /*
  69. * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
  70. * touch screen controller
  71. */
  72. i2c@7000d000 {
  73. status = "okay";
  74. clock-frequency = <100000>;
  75. pmic: tps65911@2d {
  76. compatible = "ti,tps65911";
  77. reg = <0x2d>;
  78. interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
  79. #interrupt-cells = <2>;
  80. interrupt-controller;
  81. ti,system-power-controller;
  82. #gpio-cells = <2>;
  83. gpio-controller;
  84. vcc1-supply = <&sys_3v3_reg>;
  85. vcc2-supply = <&sys_3v3_reg>;
  86. vcc3-supply = <&vio_reg>;
  87. vcc4-supply = <&sys_3v3_reg>;
  88. vcc5-supply = <&sys_3v3_reg>;
  89. vcc6-supply = <&vio_reg>;
  90. vcc7-supply = <&charge_pump_5v0_reg>;
  91. vccio-supply = <&sys_3v3_reg>;
  92. regulators {
  93. #address-cells = <1>;
  94. #size-cells = <0>;
  95. /* SW1: +V1.35_VDDIO_DDR */
  96. vdd1_reg: vdd1 {
  97. regulator-name = "vddio_ddr_1v35";
  98. regulator-min-microvolt = <1350000>;
  99. regulator-max-microvolt = <1350000>;
  100. regulator-always-on;
  101. };
  102. /* SW2: +V1.05 */
  103. vdd2_reg: vdd2 {
  104. regulator-name =
  105. "vdd_pexa,vdd_pexb,vdd_sata";
  106. regulator-min-microvolt = <1050000>;
  107. regulator-max-microvolt = <1050000>;
  108. };
  109. /* SW CTRL: +V1.0_VDD_CPU */
  110. vddctrl_reg: vddctrl {
  111. regulator-name = "vdd_cpu,vdd_sys";
  112. regulator-min-microvolt = <1150000>;
  113. regulator-max-microvolt = <1150000>;
  114. regulator-always-on;
  115. };
  116. /* SWIO: +V1.8 */
  117. vio_reg: vio {
  118. regulator-name = "vdd_1v8_gen";
  119. regulator-min-microvolt = <1800000>;
  120. regulator-max-microvolt = <1800000>;
  121. regulator-always-on;
  122. };
  123. /* LDO1: unused */
  124. /*
  125. * EN_+V3.3 switching via FET:
  126. * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
  127. * see also v3_3 fixed supply
  128. */
  129. ldo2_reg: ldo2 {
  130. regulator-name = "en_3v3";
  131. regulator-min-microvolt = <3300000>;
  132. regulator-max-microvolt = <3300000>;
  133. regulator-always-on;
  134. };
  135. /* +V1.2_CSI */
  136. ldo3_reg: ldo3 {
  137. regulator-name =
  138. "avdd_dsi_csi,pwrdet_mipi";
  139. regulator-min-microvolt = <1200000>;
  140. regulator-max-microvolt = <1200000>;
  141. };
  142. /* +V1.2_VDD_RTC */
  143. ldo4_reg: ldo4 {
  144. regulator-name = "vdd_rtc";
  145. regulator-min-microvolt = <1200000>;
  146. regulator-max-microvolt = <1200000>;
  147. regulator-always-on;
  148. };
  149. /*
  150. * +V2.8_AVDD_VDAC:
  151. * only required for analog RGB
  152. */
  153. ldo5_reg: ldo5 {
  154. regulator-name = "avdd_vdac";
  155. regulator-min-microvolt = <2800000>;
  156. regulator-max-microvolt = <2800000>;
  157. regulator-always-on;
  158. };
  159. /*
  160. * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
  161. * but LDO6 can't set voltage in 50mV
  162. * granularity
  163. */
  164. ldo6_reg: ldo6 {
  165. regulator-name = "avdd_plle";
  166. regulator-min-microvolt = <1100000>;
  167. regulator-max-microvolt = <1100000>;
  168. };
  169. /* +V1.2_AVDD_PLL */
  170. ldo7_reg: ldo7 {
  171. regulator-name = "avdd_pll";
  172. regulator-min-microvolt = <1200000>;
  173. regulator-max-microvolt = <1200000>;
  174. regulator-always-on;
  175. };
  176. /* +V1.0_VDD_DDR_HS */
  177. ldo8_reg: ldo8 {
  178. regulator-name = "vdd_ddr_hs";
  179. regulator-min-microvolt = <1000000>;
  180. regulator-max-microvolt = <1000000>;
  181. regulator-always-on;
  182. };
  183. };
  184. };
  185. };
  186. /* SPI1: Apalis SPI1 */
  187. spi@7000d400 {
  188. status = "okay";
  189. spi-max-frequency = <25000000>;
  190. };
  191. /* SPI4: CAN2 */
  192. spi@7000da00 {
  193. status = "okay";
  194. spi-max-frequency = <25000000>;
  195. };
  196. /* SPI5: Apalis SPI2 */
  197. spi@7000dc00 {
  198. status = "okay";
  199. spi-max-frequency = <25000000>;
  200. };
  201. /* SPI6: CAN1 */
  202. spi@7000de00 {
  203. status = "okay";
  204. spi-max-frequency = <25000000>;
  205. };
  206. sdhci@78000000 {
  207. status = "okay";
  208. bus-width = <4>;
  209. cd-gpios = <&gpio 229 1>; /* PCC5, SD1_CD# */
  210. };
  211. sdhci@78000400 {
  212. status = "okay";
  213. bus-width = <8>;
  214. cd-gpios = <&gpio 171 1>; /* PV3, MMC1_CD# */
  215. };
  216. sdhci@78000600 {
  217. status = "okay";
  218. bus-width = <8>;
  219. non-removable;
  220. };
  221. /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
  222. usb@7d000000 {
  223. status = "okay";
  224. dr_mode = "peripheral";
  225. nvidia,vbus-gpio = <&gpio 157 0>; /* PT5, USBO1_EN */
  226. };
  227. /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
  228. usb@7d004000 {
  229. status = "okay";
  230. nvidia,vbus-gpio = <&gpio 233 0>; /* PDD1, USBH_EN */
  231. phy_type = "utmi";
  232. };
  233. /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
  234. usb@7d008000 {
  235. status = "okay";
  236. nvidia,vbus-gpio = <&gpio 233 0>; /* PDD1, USBH_EN */
  237. };
  238. regulators {
  239. compatible = "simple-bus";
  240. #address-cells = <1>;
  241. #size-cells = <0>;
  242. sys_3v3_reg: regulator@100 {
  243. compatible = "regulator-fixed";
  244. reg = <100>;
  245. regulator-name = "3v3";
  246. regulator-min-microvolt = <3300000>;
  247. regulator-max-microvolt = <3300000>;
  248. regulator-always-on;
  249. };
  250. charge_pump_5v0_reg: regulator@101 {
  251. compatible = "regulator-fixed";
  252. reg = <101>;
  253. regulator-name = "5v0";
  254. regulator-min-microvolt = <5000000>;
  255. regulator-max-microvolt = <5000000>;
  256. regulator-always-on;
  257. };
  258. };
  259. };