exynos4.dtsi 2.8 KB

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  1. /*
  2. * Samsung's Exynos4 SoC common device tree source
  3. *
  4. * Copyright (c) 2014 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * SPDX-License-Identifier: GPL-2.0+
  8. */
  9. #include "skeleton.dtsi"
  10. / {
  11. combiner: interrupt-controller@10440000 {
  12. compatible = "samsung,exynos4210-combiner";
  13. #interrupt-cells = <2>;
  14. interrupt-controller;
  15. reg = <0x10440000 0x1000>;
  16. };
  17. serial@13800000 {
  18. compatible = "samsung,exynos4210-uart";
  19. reg = <0x13800000 0x3c>;
  20. id = <0>;
  21. };
  22. serial@13810000 {
  23. compatible = "samsung,exynos4210-uart";
  24. reg = <0x13810000 0x3c>;
  25. id = <1>;
  26. };
  27. serial@13820000 {
  28. compatible = "samsung,exynos4210-uart";
  29. reg = <0x13820000 0x3c>;
  30. id = <2>;
  31. };
  32. serial@13830000 {
  33. compatible = "samsung,exynos4210-uart";
  34. reg = <0x13830000 0x3c>;
  35. id = <3>;
  36. };
  37. serial@13840000 {
  38. compatible = "samsung,exynos4210-uart";
  39. reg = <0x13840000 0x3c>;
  40. id = <4>;
  41. };
  42. i2c@13860000 {
  43. #address-cells = <1>;
  44. #size-cells = <0>;
  45. compatible = "samsung,s3c2440-i2c";
  46. interrupts = <0 0 0>;
  47. };
  48. i2c@13870000 {
  49. #address-cells = <1>;
  50. #size-cells = <0>;
  51. compatible = "samsung,s3c2440-i2c";
  52. interrupts = <1 1 0>;
  53. };
  54. i2c@13880000 {
  55. #address-cells = <1>;
  56. #size-cells = <0>;
  57. compatible = "samsung,s3c2440-i2c";
  58. interrupts = <2 2 0>;
  59. };
  60. i2c@13890000 {
  61. #address-cells = <1>;
  62. #size-cells = <0>;
  63. compatible = "samsung,s3c2440-i2c";
  64. interrupts = <3 3 0>;
  65. };
  66. i2c@138a0000 {
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. compatible = "samsung,s3c2440-i2c";
  70. interrupts = <4 4 0>;
  71. };
  72. i2c@138b0000 {
  73. #address-cells = <1>;
  74. #size-cells = <0>;
  75. compatible = "samsung,s3c2440-i2c";
  76. interrupts = <5 5 0>;
  77. };
  78. i2c@138c0000 {
  79. #address-cells = <1>;
  80. #size-cells = <0>;
  81. compatible = "samsung,s3c2440-i2c";
  82. interrupts = <6 6 0>;
  83. };
  84. i2c@138d0000 {
  85. #address-cells = <1>;
  86. #size-cells = <0>;
  87. compatible = "samsung,s3c2440-i2c";
  88. interrupts = <7 7 0>;
  89. };
  90. sdhci@12510000 {
  91. #address-cells = <1>;
  92. #size-cells = <0>;
  93. compatible = "samsung,exynos-mmc";
  94. reg = <0x12510000 0x1000>;
  95. interrupts = <0 75 0>;
  96. };
  97. sdhci@12520000 {
  98. #address-cells = <1>;
  99. #size-cells = <0>;
  100. compatible = "samsung,exynos-mmc";
  101. reg = <0x12520000 0x1000>;
  102. interrupts = <0 76 0>;
  103. };
  104. sdhci@12530000 {
  105. #address-cells = <1>;
  106. #size-cells = <0>;
  107. compatible = "samsung,exynos-mmc";
  108. reg = <0x12530000 0x1000>;
  109. interrupts = <0 77 0>;
  110. };
  111. sdhci@12540000 {
  112. #address-cells = <1>;
  113. #size-cells = <0>;
  114. compatible = "samsung,exynos-mmc";
  115. reg = <0x12540000 0x1000>;
  116. interrupts = <0 78 0>;
  117. };
  118. dwmmc@12550000 {
  119. #address-cells = <1>;
  120. #size-cells = <0>;
  121. compatible = "samsung,exynos-dwmmc";
  122. reg = <0x12550000 0x1000>;
  123. interrupts = <0 131 0>;
  124. };
  125. gpio: gpio {
  126. gpio-controller;
  127. #gpio-cells = <2>;
  128. interrupt-controller;
  129. #interrupt-cells = <2>;
  130. };
  131. };