ddr3_training_leveling.h 432 B

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  1. /*
  2. * Copyright (C) Marvell International Ltd. and its affiliates
  3. *
  4. * SPDX-License-Identifier: GPL-2.0
  5. */
  6. #ifndef _DDR3_TRAINING_LEVELING_H_
  7. #define _DDR3_TRAINING_LEVELING_H_
  8. #define MAX_DQ_READ_LEVELING_DELAY 15
  9. int ddr3_tip_print_wl_supp_result(u32 dev_num);
  10. int ddr3_tip_calc_cs_mask(u32 dev_num, u32 if_id, u32 effective_cs,
  11. u32 *cs_mask);
  12. u32 hws_ddr3_tip_max_cs_get(void);
  13. #endif /* _DDR3_TRAINING_LEVELING_H_ */