ddr3_training_hw_algo.h 379 B

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  1. /*
  2. * Copyright (C) Marvell International Ltd. and its affiliates
  3. *
  4. * SPDX-License-Identifier: GPL-2.0
  5. */
  6. #ifndef _DDR3_TRAINING_HW_ALGO_H_
  7. #define _DDR3_TRAINING_HW_ALGO_H_
  8. int ddr3_tip_vref(u32 dev_num);
  9. int ddr3_tip_write_additional_odt_setting(u32 dev_num, u32 if_id);
  10. int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap);
  11. #endif /* _DDR3_TRAINING_HW_ALGO_H_ */