mc.c 31 KB

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  1. /*
  2. * Copyright (C) 2014 Freescale Semiconductor
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <linux/bug.h>
  9. #include <asm/io.h>
  10. #include <libfdt.h>
  11. #include <fdt_support.h>
  12. #include <fsl-mc/fsl_mc.h>
  13. #include <fsl-mc/fsl_mc_sys.h>
  14. #include <fsl-mc/fsl_mc_private.h>
  15. #include <fsl-mc/fsl_dpmng.h>
  16. #include <fsl-mc/fsl_dprc.h>
  17. #include <fsl-mc/fsl_dpio.h>
  18. #include <fsl-mc/fsl_dpni.h>
  19. #include <fsl-mc/fsl_qbman_portal.h>
  20. #include <fsl-mc/ldpaa_wriop.h>
  21. #define MC_RAM_BASE_ADDR_ALIGNMENT (512UL * 1024 * 1024)
  22. #define MC_RAM_BASE_ADDR_ALIGNMENT_MASK (~(MC_RAM_BASE_ADDR_ALIGNMENT - 1))
  23. #define MC_RAM_SIZE_ALIGNMENT (256UL * 1024 * 1024)
  24. #define MC_MEM_SIZE_ENV_VAR "mcmemsize"
  25. #define MC_BOOT_TIMEOUT_ENV_VAR "mcboottimeout"
  26. DECLARE_GLOBAL_DATA_PTR;
  27. static int mc_boot_status = -1;
  28. static int mc_dpl_applied = -1;
  29. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  30. static int mc_aiop_applied = -1;
  31. #endif
  32. struct fsl_mc_io *root_mc_io = NULL;
  33. struct fsl_mc_io *dflt_mc_io = NULL; /* child container */
  34. uint16_t root_dprc_handle = 0;
  35. uint16_t dflt_dprc_handle = 0;
  36. int child_dprc_id;
  37. struct fsl_dpbp_obj *dflt_dpbp = NULL;
  38. struct fsl_dpio_obj *dflt_dpio = NULL;
  39. struct fsl_dpni_obj *dflt_dpni = NULL;
  40. #ifdef DEBUG
  41. void dump_ram_words(const char *title, void *addr)
  42. {
  43. int i;
  44. uint32_t *words = addr;
  45. printf("Dumping beginning of %s (%p):\n", title, addr);
  46. for (i = 0; i < 16; i++)
  47. printf("%#x ", words[i]);
  48. printf("\n");
  49. }
  50. void dump_mc_ccsr_regs(struct mc_ccsr_registers __iomem *mc_ccsr_regs)
  51. {
  52. printf("MC CCSR registers:\n"
  53. "reg_gcr1 %#x\n"
  54. "reg_gsr %#x\n"
  55. "reg_sicbalr %#x\n"
  56. "reg_sicbahr %#x\n"
  57. "reg_sicapr %#x\n"
  58. "reg_mcfbalr %#x\n"
  59. "reg_mcfbahr %#x\n"
  60. "reg_mcfapr %#x\n"
  61. "reg_psr %#x\n",
  62. mc_ccsr_regs->reg_gcr1,
  63. mc_ccsr_regs->reg_gsr,
  64. mc_ccsr_regs->reg_sicbalr,
  65. mc_ccsr_regs->reg_sicbahr,
  66. mc_ccsr_regs->reg_sicapr,
  67. mc_ccsr_regs->reg_mcfbalr,
  68. mc_ccsr_regs->reg_mcfbahr,
  69. mc_ccsr_regs->reg_mcfapr,
  70. mc_ccsr_regs->reg_psr);
  71. }
  72. #else
  73. #define dump_ram_words(title, addr)
  74. #define dump_mc_ccsr_regs(mc_ccsr_regs)
  75. #endif /* DEBUG */
  76. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  77. /**
  78. * Copying MC firmware or DPL image to DDR
  79. */
  80. static int mc_copy_image(const char *title,
  81. u64 image_addr, u32 image_size, u64 mc_ram_addr)
  82. {
  83. debug("%s copied to address %p\n", title, (void *)mc_ram_addr);
  84. memcpy((void *)mc_ram_addr, (void *)image_addr, image_size);
  85. flush_dcache_range(mc_ram_addr, mc_ram_addr + image_size);
  86. return 0;
  87. }
  88. /**
  89. * MC firmware FIT image parser checks if the image is in FIT
  90. * format, verifies integrity of the image and calculates
  91. * raw image address and size values.
  92. * Returns 0 on success and a negative errno on error.
  93. * task fail.
  94. **/
  95. int parse_mc_firmware_fit_image(u64 mc_fw_addr,
  96. const void **raw_image_addr,
  97. size_t *raw_image_size)
  98. {
  99. int format;
  100. void *fit_hdr;
  101. int node_offset;
  102. const void *data;
  103. size_t size;
  104. const char *uname = "firmware";
  105. fit_hdr = (void *)mc_fw_addr;
  106. /* Check if Image is in FIT format */
  107. format = genimg_get_format(fit_hdr);
  108. if (format != IMAGE_FORMAT_FIT) {
  109. printf("fsl-mc: ERR: Bad firmware image (not a FIT image)\n");
  110. return -EINVAL;
  111. }
  112. if (!fit_check_format(fit_hdr)) {
  113. printf("fsl-mc: ERR: Bad firmware image (bad FIT header)\n");
  114. return -EINVAL;
  115. }
  116. node_offset = fit_image_get_node(fit_hdr, uname);
  117. if (node_offset < 0) {
  118. printf("fsl-mc: ERR: Bad firmware image (missing subimage)\n");
  119. return -ENOENT;
  120. }
  121. /* Verify MC firmware image */
  122. if (!(fit_image_verify(fit_hdr, node_offset))) {
  123. printf("fsl-mc: ERR: Bad firmware image (bad CRC)\n");
  124. return -EINVAL;
  125. }
  126. /* Get address and size of raw image */
  127. fit_image_get_data(fit_hdr, node_offset, &data, &size);
  128. *raw_image_addr = data;
  129. *raw_image_size = size;
  130. return 0;
  131. }
  132. #endif
  133. /*
  134. * Calculates the values to be used to specify the address range
  135. * for the MC private DRAM block, in the MCFBALR/MCFBAHR registers.
  136. * It returns the highest 512MB-aligned address within the given
  137. * address range, in '*aligned_base_addr', and the number of 256 MiB
  138. * blocks in it, in 'num_256mb_blocks'.
  139. */
  140. static int calculate_mc_private_ram_params(u64 mc_private_ram_start_addr,
  141. size_t mc_ram_size,
  142. u64 *aligned_base_addr,
  143. u8 *num_256mb_blocks)
  144. {
  145. u64 addr;
  146. u16 num_blocks;
  147. if (mc_ram_size % MC_RAM_SIZE_ALIGNMENT != 0) {
  148. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  149. mc_ram_size);
  150. return -EINVAL;
  151. }
  152. num_blocks = mc_ram_size / MC_RAM_SIZE_ALIGNMENT;
  153. if (num_blocks < 1 || num_blocks > 0xff) {
  154. printf("fsl-mc: ERROR: invalid MC private RAM size (%lu)\n",
  155. mc_ram_size);
  156. return -EINVAL;
  157. }
  158. addr = (mc_private_ram_start_addr + mc_ram_size - 1) &
  159. MC_RAM_BASE_ADDR_ALIGNMENT_MASK;
  160. if (addr < mc_private_ram_start_addr) {
  161. printf("fsl-mc: ERROR: bad start address %#llx\n",
  162. mc_private_ram_start_addr);
  163. return -EFAULT;
  164. }
  165. *aligned_base_addr = addr;
  166. *num_256mb_blocks = num_blocks;
  167. return 0;
  168. }
  169. static int mc_fixup_dpc(u64 dpc_addr)
  170. {
  171. void *blob = (void *)dpc_addr;
  172. int nodeoffset;
  173. /* delete any existing ICID pools */
  174. nodeoffset = fdt_path_offset(blob, "/resources/icid_pools");
  175. if (fdt_del_node(blob, nodeoffset) < 0)
  176. printf("\nfsl-mc: WARNING: could not delete ICID pool\n");
  177. /* add a new pool */
  178. nodeoffset = fdt_path_offset(blob, "/resources");
  179. if (nodeoffset < 0) {
  180. printf("\nfsl-mc: ERROR: DPC is missing /resources\n");
  181. return -EINVAL;
  182. }
  183. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pools");
  184. nodeoffset = fdt_add_subnode(blob, nodeoffset, "icid_pool@0");
  185. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  186. "base_icid", FSL_DPAA2_STREAM_ID_START, 1);
  187. do_fixup_by_path_u32(blob, "/resources/icid_pools/icid_pool@0",
  188. "num",
  189. FSL_DPAA2_STREAM_ID_END -
  190. FSL_DPAA2_STREAM_ID_START + 1, 1);
  191. flush_dcache_range(dpc_addr, dpc_addr + fdt_totalsize(blob));
  192. return 0;
  193. }
  194. static int load_mc_dpc(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpc_addr)
  195. {
  196. u64 mc_dpc_offset;
  197. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  198. int error;
  199. void *dpc_fdt_hdr;
  200. int dpc_size;
  201. #endif
  202. #ifdef CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET
  203. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET & 0x3) != 0 ||
  204. CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET > 0xffffffff);
  205. mc_dpc_offset = CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET;
  206. #else
  207. #error "CONFIG_SYS_LS_MC_DRAM_DPC_OFFSET not defined"
  208. #endif
  209. /*
  210. * Load the MC DPC blob in the MC private DRAM block:
  211. */
  212. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  213. printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset);
  214. #else
  215. /*
  216. * Get address and size of the DPC blob stored in flash:
  217. */
  218. dpc_fdt_hdr = (void *)mc_dpc_addr;
  219. error = fdt_check_header(dpc_fdt_hdr);
  220. if (error != 0) {
  221. /*
  222. * Don't return with error here, since the MC firmware can
  223. * still boot without a DPC
  224. */
  225. printf("\nfsl-mc: WARNING: No DPC image found");
  226. return 0;
  227. }
  228. dpc_size = fdt_totalsize(dpc_fdt_hdr);
  229. if (dpc_size > CONFIG_SYS_LS_MC_DPC_MAX_LENGTH) {
  230. printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n",
  231. dpc_size);
  232. return -EINVAL;
  233. }
  234. mc_copy_image("MC DPC blob",
  235. (u64)dpc_fdt_hdr, dpc_size, mc_ram_addr + mc_dpc_offset);
  236. #endif /* not defined CONFIG_SYS_LS_MC_DPC_IN_DDR */
  237. if (mc_fixup_dpc(mc_ram_addr + mc_dpc_offset))
  238. return -EINVAL;
  239. dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset));
  240. return 0;
  241. }
  242. static int load_mc_dpl(u64 mc_ram_addr, size_t mc_ram_size, u64 mc_dpl_addr)
  243. {
  244. u64 mc_dpl_offset;
  245. #ifndef CONFIG_SYS_LS_MC_DPL_IN_DDR
  246. int error;
  247. void *dpl_fdt_hdr;
  248. int dpl_size;
  249. #endif
  250. #ifdef CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET
  251. BUILD_BUG_ON((CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET & 0x3) != 0 ||
  252. CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET > 0xffffffff);
  253. mc_dpl_offset = CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET;
  254. #else
  255. #error "CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET not defined"
  256. #endif
  257. /*
  258. * Load the MC DPL blob in the MC private DRAM block:
  259. */
  260. #ifdef CONFIG_SYS_LS_MC_DPL_IN_DDR
  261. printf("MC DPL is preloaded to %#llx\n", mc_ram_addr + mc_dpl_offset);
  262. #else
  263. /*
  264. * Get address and size of the DPL blob stored in flash:
  265. */
  266. dpl_fdt_hdr = (void *)mc_dpl_addr;
  267. error = fdt_check_header(dpl_fdt_hdr);
  268. if (error != 0) {
  269. printf("\nfsl-mc: ERROR: Bad DPL image (bad header)\n");
  270. return error;
  271. }
  272. dpl_size = fdt_totalsize(dpl_fdt_hdr);
  273. if (dpl_size > CONFIG_SYS_LS_MC_DPL_MAX_LENGTH) {
  274. printf("\nfsl-mc: ERROR: Bad DPL image (too large: %d)\n",
  275. dpl_size);
  276. return -EINVAL;
  277. }
  278. mc_copy_image("MC DPL blob",
  279. (u64)dpl_fdt_hdr, dpl_size, mc_ram_addr + mc_dpl_offset);
  280. #endif /* not defined CONFIG_SYS_LS_MC_DPL_IN_DDR */
  281. dump_ram_words("DPL", (void *)(mc_ram_addr + mc_dpl_offset));
  282. return 0;
  283. }
  284. /**
  285. * Return the MC boot timeout value in milliseconds
  286. */
  287. static unsigned long get_mc_boot_timeout_ms(void)
  288. {
  289. unsigned long timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  290. char *timeout_ms_env_var = getenv(MC_BOOT_TIMEOUT_ENV_VAR);
  291. if (timeout_ms_env_var) {
  292. timeout_ms = simple_strtoul(timeout_ms_env_var, NULL, 10);
  293. if (timeout_ms == 0) {
  294. printf("fsl-mc: WARNING: Invalid value for \'"
  295. MC_BOOT_TIMEOUT_ENV_VAR
  296. "\' environment variable: %lu\n",
  297. timeout_ms);
  298. timeout_ms = CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS;
  299. }
  300. }
  301. return timeout_ms;
  302. }
  303. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  304. __weak bool soc_has_aiop(void)
  305. {
  306. return false;
  307. }
  308. static int load_mc_aiop_img(u64 aiop_fw_addr)
  309. {
  310. u64 mc_ram_addr = mc_get_dram_addr();
  311. #ifndef CONFIG_SYS_LS_MC_DPC_IN_DDR
  312. void *aiop_img;
  313. #endif
  314. /* Check if AIOP is available */
  315. if (!soc_has_aiop())
  316. return -ENODEV;
  317. /*
  318. * Load the MC AIOP image in the MC private DRAM block:
  319. */
  320. #ifdef CONFIG_SYS_LS_MC_DPC_IN_DDR
  321. printf("MC AIOP is preloaded to %#llx\n", mc_ram_addr +
  322. CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  323. #else
  324. aiop_img = (void *)aiop_fw_addr;
  325. mc_copy_image("MC AIOP image",
  326. (u64)aiop_img, CONFIG_SYS_LS_MC_AIOP_IMG_MAX_LENGTH,
  327. mc_ram_addr + CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET);
  328. #endif
  329. mc_aiop_applied = 0;
  330. return 0;
  331. }
  332. #endif
  333. static int wait_for_mc(bool booting_mc, u32 *final_reg_gsr)
  334. {
  335. u32 reg_gsr;
  336. u32 mc_fw_boot_status;
  337. unsigned long timeout_ms = get_mc_boot_timeout_ms();
  338. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  339. dmb();
  340. assert(timeout_ms > 0);
  341. for (;;) {
  342. udelay(1000); /* throttle polling */
  343. reg_gsr = in_le32(&mc_ccsr_regs->reg_gsr);
  344. mc_fw_boot_status = (reg_gsr & GSR_FS_MASK);
  345. if (mc_fw_boot_status & 0x1)
  346. break;
  347. timeout_ms--;
  348. if (timeout_ms == 0)
  349. break;
  350. }
  351. if (timeout_ms == 0) {
  352. printf("ERROR: timeout\n");
  353. /* TODO: Get an error status from an MC CCSR register */
  354. return -ETIMEDOUT;
  355. }
  356. if (mc_fw_boot_status != 0x1) {
  357. /*
  358. * TODO: Identify critical errors from the GSR register's FS
  359. * field and for those errors, set error to -ENODEV or other
  360. * appropriate errno, so that the status property is set to
  361. * failure in the fsl,dprc device tree node.
  362. */
  363. printf("WARNING: Firmware returned an error (GSR: %#x)\n",
  364. reg_gsr);
  365. } else {
  366. printf("SUCCESS\n");
  367. }
  368. *final_reg_gsr = reg_gsr;
  369. return 0;
  370. }
  371. int mc_init(u64 mc_fw_addr, u64 mc_dpc_addr)
  372. {
  373. int error = 0;
  374. int portal_id = 0;
  375. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  376. u64 mc_ram_addr = mc_get_dram_addr();
  377. u32 reg_gsr;
  378. u32 reg_mcfbalr;
  379. #ifndef CONFIG_SYS_LS_MC_FW_IN_DDR
  380. const void *raw_image_addr;
  381. size_t raw_image_size = 0;
  382. #endif
  383. struct mc_version mc_ver_info;
  384. u64 mc_ram_aligned_base_addr;
  385. u8 mc_ram_num_256mb_blocks;
  386. size_t mc_ram_size = mc_get_dram_block_size();
  387. error = calculate_mc_private_ram_params(mc_ram_addr,
  388. mc_ram_size,
  389. &mc_ram_aligned_base_addr,
  390. &mc_ram_num_256mb_blocks);
  391. if (error != 0)
  392. goto out;
  393. /*
  394. * Management Complex cores should be held at reset out of POR.
  395. * U-Boot should be the first software to touch MC. To be safe,
  396. * we reset all cores again by setting GCR1 to 0. It doesn't do
  397. * anything if they are held at reset. After we setup the firmware
  398. * we kick off MC by deasserting the reset bit for core 0, and
  399. * deasserting the reset bits for Command Portal Managers.
  400. * The stop bits are not touched here. They are used to stop the
  401. * cores when they are active. Setting stop bits doesn't stop the
  402. * cores from fetching instructions when they are released from
  403. * reset.
  404. */
  405. out_le32(&mc_ccsr_regs->reg_gcr1, 0);
  406. dmb();
  407. #ifdef CONFIG_SYS_LS_MC_FW_IN_DDR
  408. printf("MC firmware is preloaded to %#llx\n", mc_ram_addr);
  409. #else
  410. error = parse_mc_firmware_fit_image(mc_fw_addr, &raw_image_addr,
  411. &raw_image_size);
  412. if (error != 0)
  413. goto out;
  414. /*
  415. * Load the MC FW at the beginning of the MC private DRAM block:
  416. */
  417. mc_copy_image("MC Firmware",
  418. (u64)raw_image_addr, raw_image_size, mc_ram_addr);
  419. #endif
  420. dump_ram_words("firmware", (void *)mc_ram_addr);
  421. error = load_mc_dpc(mc_ram_addr, mc_ram_size, mc_dpc_addr);
  422. if (error != 0)
  423. goto out;
  424. debug("mc_ccsr_regs %p\n", mc_ccsr_regs);
  425. dump_mc_ccsr_regs(mc_ccsr_regs);
  426. /*
  427. * Tell MC what is the address range of the DRAM block assigned to it:
  428. */
  429. reg_mcfbalr = (u32)mc_ram_aligned_base_addr |
  430. (mc_ram_num_256mb_blocks - 1);
  431. out_le32(&mc_ccsr_regs->reg_mcfbalr, reg_mcfbalr);
  432. out_le32(&mc_ccsr_regs->reg_mcfbahr,
  433. (u32)(mc_ram_aligned_base_addr >> 32));
  434. out_le32(&mc_ccsr_regs->reg_mcfapr, FSL_BYPASS_AMQ);
  435. /*
  436. * Tell the MC that we want delayed DPL deployment.
  437. */
  438. out_le32(&mc_ccsr_regs->reg_gsr, 0xDD00);
  439. printf("\nfsl-mc: Booting Management Complex ... ");
  440. /*
  441. * Deassert reset and release MC core 0 to run
  442. */
  443. out_le32(&mc_ccsr_regs->reg_gcr1, GCR1_P1_DE_RST | GCR1_M_ALL_DE_RST);
  444. error = wait_for_mc(true, &reg_gsr);
  445. if (error != 0)
  446. goto out;
  447. /*
  448. * TODO: need to obtain the portal_id for the root container from the
  449. * DPL
  450. */
  451. portal_id = 0;
  452. /*
  453. * Initialize the global default MC portal
  454. * And check that the MC firmware is responding portal commands:
  455. */
  456. root_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  457. if (!root_mc_io) {
  458. printf(" No memory: malloc() failed\n");
  459. return -ENOMEM;
  460. }
  461. root_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(portal_id);
  462. debug("Checking access to MC portal of root DPRC container (portal_id %d, portal physical addr %p)\n",
  463. portal_id, root_mc_io->mmio_regs);
  464. error = mc_get_version(root_mc_io, MC_CMD_NO_FLAGS, &mc_ver_info);
  465. if (error != 0) {
  466. printf("fsl-mc: ERROR: Firmware version check failed (error: %d)\n",
  467. error);
  468. goto out;
  469. }
  470. printf("fsl-mc: Management Complex booted (version: %d.%d.%d, boot status: %#x)\n",
  471. mc_ver_info.major, mc_ver_info.minor, mc_ver_info.revision,
  472. reg_gsr & GSR_FS_MASK);
  473. out:
  474. if (error != 0)
  475. mc_boot_status = error;
  476. else
  477. mc_boot_status = 0;
  478. return error;
  479. }
  480. int mc_apply_dpl(u64 mc_dpl_addr)
  481. {
  482. struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
  483. int error = 0;
  484. u32 reg_gsr;
  485. u64 mc_ram_addr = mc_get_dram_addr();
  486. size_t mc_ram_size = mc_get_dram_block_size();
  487. error = load_mc_dpl(mc_ram_addr, mc_ram_size, mc_dpl_addr);
  488. if (error != 0)
  489. return error;
  490. /*
  491. * Tell the MC to deploy the DPL:
  492. */
  493. out_le32(&mc_ccsr_regs->reg_gsr, 0x0);
  494. printf("fsl-mc: Deploying data path layout ... ");
  495. error = wait_for_mc(false, &reg_gsr);
  496. if (!error)
  497. mc_dpl_applied = 0;
  498. return error;
  499. }
  500. int get_mc_boot_status(void)
  501. {
  502. return mc_boot_status;
  503. }
  504. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  505. int get_aiop_apply_status(void)
  506. {
  507. return mc_aiop_applied;
  508. }
  509. #endif
  510. int get_dpl_apply_status(void)
  511. {
  512. return mc_dpl_applied;
  513. }
  514. /**
  515. * Return the MC address of private DRAM block.
  516. */
  517. u64 mc_get_dram_addr(void)
  518. {
  519. u64 mc_ram_addr;
  520. /*
  521. * The MC private DRAM block was already carved at the end of DRAM
  522. * by board_init_f() using CONFIG_SYS_MEM_TOP_HIDE:
  523. */
  524. if (gd->bd->bi_dram[1].start) {
  525. mc_ram_addr =
  526. gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size;
  527. } else {
  528. mc_ram_addr =
  529. gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
  530. }
  531. return mc_ram_addr;
  532. }
  533. /**
  534. * Return the actual size of the MC private DRAM block.
  535. */
  536. unsigned long mc_get_dram_block_size(void)
  537. {
  538. unsigned long dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  539. char *dram_block_size_env_var = getenv(MC_MEM_SIZE_ENV_VAR);
  540. if (dram_block_size_env_var) {
  541. dram_block_size = simple_strtoul(dram_block_size_env_var, NULL,
  542. 10);
  543. if (dram_block_size < CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE) {
  544. printf("fsl-mc: WARNING: Invalid value for \'"
  545. MC_MEM_SIZE_ENV_VAR
  546. "\' environment variable: %lu\n",
  547. dram_block_size);
  548. dram_block_size = CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE;
  549. }
  550. }
  551. return dram_block_size;
  552. }
  553. int fsl_mc_ldpaa_init(bd_t *bis)
  554. {
  555. int i;
  556. for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++)
  557. if ((wriop_is_enabled_dpmac(i) == 1) &&
  558. (wriop_get_phy_address(i) != -1))
  559. ldpaa_eth_init(i, wriop_get_enet_if(i));
  560. return 0;
  561. }
  562. static int dprc_version_check(struct fsl_mc_io *mc_io, uint16_t handle)
  563. {
  564. struct dprc_attributes attr;
  565. int error;
  566. memset(&attr, 0, sizeof(struct dprc_attributes));
  567. error = dprc_get_attributes(mc_io, MC_CMD_NO_FLAGS, handle, &attr);
  568. if (error == 0) {
  569. if ((attr.version.major != DPRC_VER_MAJOR) ||
  570. (attr.version.minor != DPRC_VER_MINOR)) {
  571. printf("DPRC version mismatch found %u.%u,",
  572. attr.version.major,
  573. attr.version.minor);
  574. printf("supported version is %u.%u\n",
  575. DPRC_VER_MAJOR, DPRC_VER_MINOR);
  576. }
  577. }
  578. return error;
  579. }
  580. static int dpio_init(void)
  581. {
  582. struct qbman_swp_desc p_des;
  583. struct dpio_attr attr;
  584. struct dpio_cfg dpio_cfg;
  585. int err = 0;
  586. dflt_dpio = (struct fsl_dpio_obj *)malloc(sizeof(struct fsl_dpio_obj));
  587. if (!dflt_dpio) {
  588. printf("No memory: malloc() failed\n");
  589. err = -ENOMEM;
  590. goto err_malloc;
  591. }
  592. dpio_cfg.channel_mode = DPIO_LOCAL_CHANNEL;
  593. dpio_cfg.num_priorities = 8;
  594. err = dpio_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpio_cfg,
  595. &dflt_dpio->dpio_handle);
  596. if (err < 0) {
  597. printf("dpio_create() failed: %d\n", err);
  598. err = -ENODEV;
  599. goto err_create;
  600. }
  601. memset(&attr, 0, sizeof(struct dpio_attr));
  602. err = dpio_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  603. dflt_dpio->dpio_handle, &attr);
  604. if (err < 0) {
  605. printf("dpio_get_attributes() failed: %d\n", err);
  606. goto err_get_attr;
  607. }
  608. if ((attr.version.major != DPIO_VER_MAJOR) ||
  609. (attr.version.minor != DPIO_VER_MINOR)) {
  610. printf("DPIO version mismatch found %u.%u,",
  611. attr.version.major, attr.version.minor);
  612. printf("supported version is %u.%u\n",
  613. DPIO_VER_MAJOR, DPIO_VER_MINOR);
  614. }
  615. dflt_dpio->dpio_id = attr.id;
  616. #ifdef DEBUG
  617. printf("Init: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  618. #endif
  619. err = dpio_enable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  620. if (err < 0) {
  621. printf("dpio_enable() failed %d\n", err);
  622. goto err_get_enable;
  623. }
  624. debug("ce_offset=0x%llx, ci_offset=0x%llx, portalid=%d, prios=%d\n",
  625. attr.qbman_portal_ce_offset,
  626. attr.qbman_portal_ci_offset,
  627. attr.qbman_portal_id,
  628. attr.num_priorities);
  629. p_des.cena_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  630. + attr.qbman_portal_ce_offset);
  631. p_des.cinh_bar = (void *)(SOC_QBMAN_PORTALS_BASE_ADDR
  632. + attr.qbman_portal_ci_offset);
  633. dflt_dpio->sw_portal = qbman_swp_init(&p_des);
  634. if (dflt_dpio->sw_portal == NULL) {
  635. printf("qbman_swp_init() failed\n");
  636. goto err_get_swp_init;
  637. }
  638. return 0;
  639. err_get_swp_init:
  640. dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  641. err_get_enable:
  642. err_get_attr:
  643. dpio_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  644. dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  645. err_create:
  646. free(dflt_dpio);
  647. err_malloc:
  648. return err;
  649. }
  650. static int dpio_exit(void)
  651. {
  652. int err;
  653. err = dpio_disable(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  654. if (err < 0) {
  655. printf("dpio_disable() failed: %d\n", err);
  656. goto err;
  657. }
  658. err = dpio_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpio->dpio_handle);
  659. if (err < 0) {
  660. printf("dpio_destroy() failed: %d\n", err);
  661. goto err;
  662. }
  663. #ifdef DEBUG
  664. printf("Exit: DPIO id=0x%d\n", dflt_dpio->dpio_id);
  665. #endif
  666. if (dflt_dpio)
  667. free(dflt_dpio);
  668. return 0;
  669. err:
  670. return err;
  671. }
  672. static int dprc_init(void)
  673. {
  674. int err, child_portal_id, container_id;
  675. struct dprc_cfg cfg;
  676. uint64_t mc_portal_offset;
  677. /* Open root container */
  678. err = dprc_get_container_id(root_mc_io, MC_CMD_NO_FLAGS, &container_id);
  679. if (err < 0) {
  680. printf("dprc_get_container_id(): Root failed: %d\n", err);
  681. goto err_root_container_id;
  682. }
  683. #ifdef DEBUG
  684. printf("Root container id = %d\n", container_id);
  685. #endif
  686. err = dprc_open(root_mc_io, MC_CMD_NO_FLAGS, container_id,
  687. &root_dprc_handle);
  688. if (err < 0) {
  689. printf("dprc_open(): Root Container failed: %d\n", err);
  690. goto err_root_open;
  691. }
  692. if (!root_dprc_handle) {
  693. printf("dprc_open(): Root Container Handle is not valid\n");
  694. goto err_root_open;
  695. }
  696. err = dprc_version_check(root_mc_io, root_dprc_handle);
  697. if (err < 0) {
  698. printf("dprc_version_check() failed: %d\n", err);
  699. goto err_root_open;
  700. }
  701. memset(&cfg, 0, sizeof(struct dprc_cfg));
  702. cfg.options = DPRC_CFG_OPT_TOPOLOGY_CHANGES_ALLOWED |
  703. DPRC_CFG_OPT_OBJ_CREATE_ALLOWED |
  704. DPRC_CFG_OPT_ALLOC_ALLOWED;
  705. cfg.icid = DPRC_GET_ICID_FROM_POOL;
  706. cfg.portal_id = DPRC_GET_PORTAL_ID_FROM_POOL;
  707. err = dprc_create_container(root_mc_io, MC_CMD_NO_FLAGS,
  708. root_dprc_handle,
  709. &cfg,
  710. &child_dprc_id,
  711. &mc_portal_offset);
  712. if (err < 0) {
  713. printf("dprc_create_container() failed: %d\n", err);
  714. goto err_create;
  715. }
  716. dflt_mc_io = (struct fsl_mc_io *)malloc(sizeof(struct fsl_mc_io));
  717. if (!dflt_mc_io) {
  718. err = -ENOMEM;
  719. printf(" No memory: malloc() failed\n");
  720. goto err_malloc;
  721. }
  722. child_portal_id = MC_PORTAL_OFFSET_TO_PORTAL_ID(mc_portal_offset);
  723. dflt_mc_io->mmio_regs = SOC_MC_PORTAL_ADDR(child_portal_id);
  724. #ifdef DEBUG
  725. printf("MC portal of child DPRC container: %d, physical addr %p)\n",
  726. child_dprc_id, dflt_mc_io->mmio_regs);
  727. #endif
  728. err = dprc_open(dflt_mc_io, MC_CMD_NO_FLAGS, child_dprc_id,
  729. &dflt_dprc_handle);
  730. if (err < 0) {
  731. printf("dprc_open(): Child container failed: %d\n", err);
  732. goto err_child_open;
  733. }
  734. if (!dflt_dprc_handle) {
  735. printf("dprc_open(): Child container Handle is not valid\n");
  736. goto err_child_open;
  737. }
  738. return 0;
  739. err_child_open:
  740. free(dflt_mc_io);
  741. err_malloc:
  742. dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  743. root_dprc_handle, child_dprc_id);
  744. err_create:
  745. dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  746. err_root_open:
  747. err_root_container_id:
  748. return err;
  749. }
  750. static int dprc_exit(void)
  751. {
  752. int err;
  753. err = dprc_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dprc_handle);
  754. if (err < 0) {
  755. printf("dprc_close(): Child failed: %d\n", err);
  756. goto err;
  757. }
  758. err = dprc_destroy_container(root_mc_io, MC_CMD_NO_FLAGS,
  759. root_dprc_handle, child_dprc_id);
  760. if (err < 0) {
  761. printf("dprc_destroy_container() failed: %d\n", err);
  762. goto err;
  763. }
  764. err = dprc_close(root_mc_io, MC_CMD_NO_FLAGS, root_dprc_handle);
  765. if (err < 0) {
  766. printf("dprc_close(): Root failed: %d\n", err);
  767. goto err;
  768. }
  769. if (dflt_mc_io)
  770. free(dflt_mc_io);
  771. if (root_mc_io)
  772. free(root_mc_io);
  773. return 0;
  774. err:
  775. return err;
  776. }
  777. static int dpbp_init(void)
  778. {
  779. int err;
  780. struct dpbp_attr dpbp_attr;
  781. struct dpbp_cfg dpbp_cfg;
  782. dflt_dpbp = (struct fsl_dpbp_obj *)malloc(sizeof(struct fsl_dpbp_obj));
  783. if (!dflt_dpbp) {
  784. printf("No memory: malloc() failed\n");
  785. err = -ENOMEM;
  786. goto err_malloc;
  787. }
  788. dpbp_cfg.options = 512;
  789. err = dpbp_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpbp_cfg,
  790. &dflt_dpbp->dpbp_handle);
  791. if (err < 0) {
  792. err = -ENODEV;
  793. printf("dpbp_create() failed: %d\n", err);
  794. goto err_create;
  795. }
  796. memset(&dpbp_attr, 0, sizeof(struct dpbp_attr));
  797. err = dpbp_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  798. dflt_dpbp->dpbp_handle,
  799. &dpbp_attr);
  800. if (err < 0) {
  801. printf("dpbp_get_attributes() failed: %d\n", err);
  802. goto err_get_attr;
  803. }
  804. if ((dpbp_attr.version.major != DPBP_VER_MAJOR) ||
  805. (dpbp_attr.version.minor != DPBP_VER_MINOR)) {
  806. printf("DPBP version mismatch found %u.%u,",
  807. dpbp_attr.version.major, dpbp_attr.version.minor);
  808. printf("supported version is %u.%u\n",
  809. DPBP_VER_MAJOR, DPBP_VER_MINOR);
  810. }
  811. dflt_dpbp->dpbp_attr.id = dpbp_attr.id;
  812. #ifdef DEBUG
  813. printf("Init: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  814. #endif
  815. err = dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  816. if (err < 0) {
  817. printf("dpbp_close() failed: %d\n", err);
  818. goto err_close;
  819. }
  820. return 0;
  821. err_close:
  822. free(dflt_dpbp);
  823. err_get_attr:
  824. dpbp_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  825. dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_handle);
  826. err_create:
  827. err_malloc:
  828. return err;
  829. }
  830. static int dpbp_exit(void)
  831. {
  832. int err;
  833. err = dpbp_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpbp->dpbp_attr.id,
  834. &dflt_dpbp->dpbp_handle);
  835. if (err < 0) {
  836. printf("dpbp_open() failed: %d\n", err);
  837. goto err;
  838. }
  839. err = dpbp_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  840. dflt_dpbp->dpbp_handle);
  841. if (err < 0) {
  842. printf("dpbp_destroy() failed: %d\n", err);
  843. goto err;
  844. }
  845. #ifdef DEBUG
  846. printf("Exit: DPBP id=0x%d\n", dflt_dpbp->dpbp_attr.id);
  847. #endif
  848. if (dflt_dpbp)
  849. free(dflt_dpbp);
  850. return 0;
  851. err:
  852. return err;
  853. }
  854. static int dpni_init(void)
  855. {
  856. int err;
  857. struct dpni_attr dpni_attr;
  858. uint8_t ext_cfg_buf[256] = {0};
  859. struct dpni_extended_cfg dpni_extended_cfg;
  860. struct dpni_cfg dpni_cfg;
  861. dflt_dpni = (struct fsl_dpni_obj *)malloc(sizeof(struct fsl_dpni_obj));
  862. if (!dflt_dpni) {
  863. printf("No memory: malloc() failed\n");
  864. err = -ENOMEM;
  865. goto err_malloc;
  866. }
  867. memset(&dpni_extended_cfg, 0, sizeof(dpni_extended_cfg));
  868. err = dpni_prepare_extended_cfg(&dpni_extended_cfg, &ext_cfg_buf[0]);
  869. if (err < 0) {
  870. err = -ENODEV;
  871. printf("dpni_prepare_extended_cfg() failed: %d\n", err);
  872. goto err_prepare_extended_cfg;
  873. }
  874. memset(&dpni_cfg, 0, sizeof(dpni_cfg));
  875. dpni_cfg.adv.options = DPNI_OPT_UNICAST_FILTER |
  876. DPNI_OPT_MULTICAST_FILTER;
  877. dpni_cfg.adv.ext_cfg_iova = (uint64_t)&ext_cfg_buf[0];
  878. err = dpni_create(dflt_mc_io, MC_CMD_NO_FLAGS, &dpni_cfg,
  879. &dflt_dpni->dpni_handle);
  880. if (err < 0) {
  881. err = -ENODEV;
  882. printf("dpni_create() failed: %d\n", err);
  883. goto err_create;
  884. }
  885. memset(&dpni_attr, 0, sizeof(struct dpni_attr));
  886. err = dpni_get_attributes(dflt_mc_io, MC_CMD_NO_FLAGS,
  887. dflt_dpni->dpni_handle,
  888. &dpni_attr);
  889. if (err < 0) {
  890. printf("dpni_get_attributes() failed: %d\n", err);
  891. goto err_get_attr;
  892. }
  893. if ((dpni_attr.version.major != DPNI_VER_MAJOR) ||
  894. (dpni_attr.version.minor != DPNI_VER_MINOR)) {
  895. printf("DPNI version mismatch found %u.%u,",
  896. dpni_attr.version.major, dpni_attr.version.minor);
  897. printf("supported version is %u.%u\n",
  898. DPNI_VER_MAJOR, DPNI_VER_MINOR);
  899. }
  900. dflt_dpni->dpni_id = dpni_attr.id;
  901. #ifdef DEBUG
  902. printf("Init: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  903. #endif
  904. err = dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  905. if (err < 0) {
  906. printf("dpni_close() failed: %d\n", err);
  907. goto err_close;
  908. }
  909. return 0;
  910. err_close:
  911. err_get_attr:
  912. dpni_close(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  913. dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_handle);
  914. err_create:
  915. err_prepare_extended_cfg:
  916. free(dflt_dpni);
  917. err_malloc:
  918. return err;
  919. }
  920. static int dpni_exit(void)
  921. {
  922. int err;
  923. err = dpni_open(dflt_mc_io, MC_CMD_NO_FLAGS, dflt_dpni->dpni_id,
  924. &dflt_dpni->dpni_handle);
  925. if (err < 0) {
  926. printf("dpni_open() failed: %d\n", err);
  927. goto err;
  928. }
  929. err = dpni_destroy(dflt_mc_io, MC_CMD_NO_FLAGS,
  930. dflt_dpni->dpni_handle);
  931. if (err < 0) {
  932. printf("dpni_destroy() failed: %d\n", err);
  933. goto err;
  934. }
  935. #ifdef DEBUG
  936. printf("Exit: DPNI id=0x%d\n", dflt_dpni->dpni_id);
  937. #endif
  938. if (dflt_dpni)
  939. free(dflt_dpni);
  940. return 0;
  941. err:
  942. return err;
  943. }
  944. static int mc_init_object(void)
  945. {
  946. int err = 0;
  947. err = dprc_init();
  948. if (err < 0) {
  949. printf("dprc_init() failed: %d\n", err);
  950. goto err;
  951. }
  952. err = dpbp_init();
  953. if (err < 0) {
  954. printf("dpbp_init() failed: %d\n", err);
  955. goto err;
  956. }
  957. err = dpio_init();
  958. if (err < 0) {
  959. printf("dpio_init() failed: %d\n", err);
  960. goto err;
  961. }
  962. err = dpni_init();
  963. if (err < 0) {
  964. printf("dpni_init() failed: %d\n", err);
  965. goto err;
  966. }
  967. return 0;
  968. err:
  969. return err;
  970. }
  971. int fsl_mc_ldpaa_exit(bd_t *bd)
  972. {
  973. int err = 0;
  974. /* MC is not loaded intentionally, So return success. */
  975. if (bd && get_mc_boot_status() != 0)
  976. return 0;
  977. if (bd && !get_mc_boot_status() && get_dpl_apply_status() == -1) {
  978. printf("ERROR: fsl-mc: DPL is not applied\n");
  979. err = -ENODEV;
  980. return err;
  981. }
  982. if (bd && !get_mc_boot_status() && !get_dpl_apply_status())
  983. return err;
  984. err = dpbp_exit();
  985. if (err < 0) {
  986. printf("dpbp_exit() failed: %d\n", err);
  987. goto err;
  988. }
  989. err = dpio_exit();
  990. if (err < 0) {
  991. printf("dpio_exit() failed: %d\n", err);
  992. goto err;
  993. }
  994. err = dpni_exit();
  995. if (err < 0) {
  996. printf("dpni_exit() failed: %d\n", err);
  997. goto err;
  998. }
  999. err = dprc_exit();
  1000. if (err < 0) {
  1001. printf("dprc_exit() failed: %d\n", err);
  1002. goto err;
  1003. }
  1004. return 0;
  1005. err:
  1006. return err;
  1007. }
  1008. static int do_fsl_mc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  1009. {
  1010. int err = 0;
  1011. if (argc < 3)
  1012. goto usage;
  1013. switch (argv[1][0]) {
  1014. case 's': {
  1015. char sub_cmd;
  1016. u64 mc_fw_addr, mc_dpc_addr;
  1017. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1018. u64 aiop_fw_addr;
  1019. #endif
  1020. sub_cmd = argv[2][0];
  1021. switch (sub_cmd) {
  1022. case 'm':
  1023. if (argc < 5)
  1024. goto usage;
  1025. if (get_mc_boot_status() == 0) {
  1026. printf("fsl-mc: MC is already booted");
  1027. printf("\n");
  1028. return err;
  1029. }
  1030. mc_fw_addr = simple_strtoull(argv[3], NULL, 16);
  1031. mc_dpc_addr = simple_strtoull(argv[4], NULL,
  1032. 16);
  1033. if (!mc_init(mc_fw_addr, mc_dpc_addr))
  1034. err = mc_init_object();
  1035. break;
  1036. #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
  1037. case 'a':
  1038. if (argc < 4)
  1039. goto usage;
  1040. if (get_aiop_apply_status() == 0) {
  1041. printf("fsl-mc: AIOP FW is already");
  1042. printf(" applied\n");
  1043. return err;
  1044. }
  1045. aiop_fw_addr = simple_strtoull(argv[3], NULL,
  1046. 16);
  1047. /* if SoC doesn't have AIOP, err = -ENODEV */
  1048. err = load_mc_aiop_img(aiop_fw_addr);
  1049. if (!err)
  1050. printf("fsl-mc: AIOP FW applied\n");
  1051. break;
  1052. #endif
  1053. default:
  1054. printf("Invalid option: %s\n", argv[2]);
  1055. goto usage;
  1056. break;
  1057. }
  1058. }
  1059. break;
  1060. case 'a': {
  1061. u64 mc_dpl_addr;
  1062. if (argc < 4)
  1063. goto usage;
  1064. if (get_dpl_apply_status() == 0) {
  1065. printf("fsl-mc: DPL already applied\n");
  1066. return err;
  1067. }
  1068. mc_dpl_addr = simple_strtoull(argv[3], NULL,
  1069. 16);
  1070. if (get_mc_boot_status() != 0) {
  1071. printf("fsl-mc: Deploying data path layout ..");
  1072. printf("ERROR (MC is not booted)\n");
  1073. return -ENODEV;
  1074. }
  1075. if (!fsl_mc_ldpaa_exit(NULL))
  1076. err = mc_apply_dpl(mc_dpl_addr);
  1077. break;
  1078. }
  1079. default:
  1080. printf("Invalid option: %s\n", argv[1]);
  1081. goto usage;
  1082. break;
  1083. }
  1084. return err;
  1085. usage:
  1086. return CMD_RET_USAGE;
  1087. }
  1088. U_BOOT_CMD(
  1089. fsl_mc, CONFIG_SYS_MAXARGS, 1, do_fsl_mc,
  1090. "DPAA2 command to manage Management Complex (MC)",
  1091. "start mc [FW_addr] [DPC_addr] - Start Management Complex\n"
  1092. "fsl_mc apply DPL [DPL_addr] - Apply DPL file\n"
  1093. "fsl_mc start aiop [FW_addr] - Start AIOP\n"
  1094. );