omap2430.c 15 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #ifndef __UBOOT__
  28. #include <linux/module.h>
  29. #include <linux/kernel.h>
  30. #include <linux/sched.h>
  31. #include <linux/init.h>
  32. #include <linux/list.h>
  33. #include <linux/io.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/err.h>
  38. #include <linux/usb/musb-omap.h>
  39. #else
  40. #include <common.h>
  41. #include <asm/omap_musb.h>
  42. #include <twl4030.h>
  43. #include "linux-compat.h"
  44. #endif
  45. #include "musb_core.h"
  46. #include "omap2430.h"
  47. #ifndef __UBOOT__
  48. struct omap2430_glue {
  49. struct device *dev;
  50. struct platform_device *musb;
  51. enum omap_musb_vbus_id_status status;
  52. struct work_struct omap_musb_mailbox_work;
  53. };
  54. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  55. struct omap2430_glue *_glue;
  56. static struct timer_list musb_idle_timer;
  57. static void musb_do_idle(unsigned long _musb)
  58. {
  59. struct musb *musb = (void *)_musb;
  60. unsigned long flags;
  61. u8 power;
  62. u8 devctl;
  63. spin_lock_irqsave(&musb->lock, flags);
  64. switch (musb->xceiv->state) {
  65. case OTG_STATE_A_WAIT_BCON:
  66. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  67. if (devctl & MUSB_DEVCTL_BDEVICE) {
  68. musb->xceiv->state = OTG_STATE_B_IDLE;
  69. MUSB_DEV_MODE(musb);
  70. } else {
  71. musb->xceiv->state = OTG_STATE_A_IDLE;
  72. MUSB_HST_MODE(musb);
  73. }
  74. break;
  75. case OTG_STATE_A_SUSPEND:
  76. /* finish RESUME signaling? */
  77. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  78. power = musb_readb(musb->mregs, MUSB_POWER);
  79. power &= ~MUSB_POWER_RESUME;
  80. dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
  81. musb_writeb(musb->mregs, MUSB_POWER, power);
  82. musb->is_active = 1;
  83. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  84. | MUSB_PORT_STAT_RESUME);
  85. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  86. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  87. /* NOTE: it might really be A_WAIT_BCON ... */
  88. musb->xceiv->state = OTG_STATE_A_HOST;
  89. }
  90. break;
  91. case OTG_STATE_A_HOST:
  92. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  93. if (devctl & MUSB_DEVCTL_BDEVICE)
  94. musb->xceiv->state = OTG_STATE_B_IDLE;
  95. else
  96. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  97. default:
  98. break;
  99. }
  100. spin_unlock_irqrestore(&musb->lock, flags);
  101. }
  102. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  103. {
  104. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  105. static unsigned long last_timer;
  106. if (timeout == 0)
  107. timeout = default_timeout;
  108. /* Never idle if active, or when VBUS timeout is not set as host */
  109. if (musb->is_active || ((musb->a_wait_bcon == 0)
  110. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  111. dev_dbg(musb->controller, "%s active, deleting timer\n",
  112. otg_state_string(musb->xceiv->state));
  113. del_timer(&musb_idle_timer);
  114. last_timer = jiffies;
  115. return;
  116. }
  117. if (time_after(last_timer, timeout)) {
  118. if (!timer_pending(&musb_idle_timer))
  119. last_timer = timeout;
  120. else {
  121. dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
  122. return;
  123. }
  124. }
  125. last_timer = timeout;
  126. dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
  127. otg_state_string(musb->xceiv->state),
  128. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  129. mod_timer(&musb_idle_timer, timeout);
  130. }
  131. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  132. {
  133. struct usb_otg *otg = musb->xceiv->otg;
  134. u8 devctl;
  135. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  136. int ret = 1;
  137. /* HDRC controls CPEN, but beware current surges during device
  138. * connect. They can trigger transient overcurrent conditions
  139. * that must be ignored.
  140. */
  141. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  142. if (is_on) {
  143. if (musb->xceiv->state == OTG_STATE_A_IDLE) {
  144. /* start the session */
  145. devctl |= MUSB_DEVCTL_SESSION;
  146. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  147. /*
  148. * Wait for the musb to set as A device to enable the
  149. * VBUS
  150. */
  151. while (musb_readb(musb->mregs, MUSB_DEVCTL) & 0x80) {
  152. cpu_relax();
  153. if (time_after(jiffies, timeout)) {
  154. dev_err(musb->controller,
  155. "configured as A device timeout");
  156. ret = -EINVAL;
  157. break;
  158. }
  159. }
  160. if (ret && otg->set_vbus)
  161. otg_set_vbus(otg, 1);
  162. } else {
  163. musb->is_active = 1;
  164. otg->default_a = 1;
  165. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  166. devctl |= MUSB_DEVCTL_SESSION;
  167. MUSB_HST_MODE(musb);
  168. }
  169. } else {
  170. musb->is_active = 0;
  171. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  172. * jumping right to B_IDLE...
  173. */
  174. otg->default_a = 0;
  175. musb->xceiv->state = OTG_STATE_B_IDLE;
  176. devctl &= ~MUSB_DEVCTL_SESSION;
  177. MUSB_DEV_MODE(musb);
  178. }
  179. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  180. dev_dbg(musb->controller, "VBUS %s, devctl %02x "
  181. /* otg %3x conf %08x prcm %08x */ "\n",
  182. otg_state_string(musb->xceiv->state),
  183. musb_readb(musb->mregs, MUSB_DEVCTL));
  184. }
  185. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  186. {
  187. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  188. devctl |= MUSB_DEVCTL_SESSION;
  189. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  190. return 0;
  191. }
  192. #endif
  193. static inline void omap2430_low_level_exit(struct musb *musb)
  194. {
  195. u32 l;
  196. /* in any role */
  197. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  198. l |= ENABLEFORCE; /* enable MSTANDBY */
  199. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  200. }
  201. static inline void omap2430_low_level_init(struct musb *musb)
  202. {
  203. u32 l;
  204. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  205. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  206. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  207. }
  208. #ifndef __UBOOT__
  209. void omap_musb_mailbox(enum omap_musb_vbus_id_status status)
  210. {
  211. struct omap2430_glue *glue = _glue;
  212. struct musb *musb = glue_to_musb(glue);
  213. glue->status = status;
  214. if (!musb) {
  215. dev_err(glue->dev, "musb core is not yet ready\n");
  216. return;
  217. }
  218. schedule_work(&glue->omap_musb_mailbox_work);
  219. }
  220. EXPORT_SYMBOL_GPL(omap_musb_mailbox);
  221. static void omap_musb_set_mailbox(struct omap2430_glue *glue)
  222. {
  223. struct musb *musb = glue_to_musb(glue);
  224. struct device *dev = musb->controller;
  225. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  226. struct omap_musb_board_data *data = pdata->board_data;
  227. struct usb_otg *otg = musb->xceiv->otg;
  228. switch (glue->status) {
  229. case OMAP_MUSB_ID_GROUND:
  230. dev_dbg(dev, "ID GND\n");
  231. otg->default_a = true;
  232. musb->xceiv->state = OTG_STATE_A_IDLE;
  233. musb->xceiv->last_event = USB_EVENT_ID;
  234. if (!is_otg_enabled(musb) || musb->gadget_driver) {
  235. pm_runtime_get_sync(dev);
  236. usb_phy_init(musb->xceiv);
  237. omap2430_musb_set_vbus(musb, 1);
  238. }
  239. break;
  240. case OMAP_MUSB_VBUS_VALID:
  241. dev_dbg(dev, "VBUS Connect\n");
  242. otg->default_a = false;
  243. musb->xceiv->state = OTG_STATE_B_IDLE;
  244. musb->xceiv->last_event = USB_EVENT_VBUS;
  245. if (musb->gadget_driver)
  246. pm_runtime_get_sync(dev);
  247. usb_phy_init(musb->xceiv);
  248. break;
  249. case OMAP_MUSB_ID_FLOAT:
  250. case OMAP_MUSB_VBUS_OFF:
  251. dev_dbg(dev, "VBUS Disconnect\n");
  252. musb->xceiv->last_event = USB_EVENT_NONE;
  253. if (is_otg_enabled(musb) || is_peripheral_enabled(musb))
  254. if (musb->gadget_driver) {
  255. pm_runtime_mark_last_busy(dev);
  256. pm_runtime_put_autosuspend(dev);
  257. }
  258. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  259. if (musb->xceiv->otg->set_vbus)
  260. otg_set_vbus(musb->xceiv->otg, 0);
  261. }
  262. usb_phy_shutdown(musb->xceiv);
  263. break;
  264. default:
  265. dev_dbg(dev, "ID float\n");
  266. }
  267. }
  268. static void omap_musb_mailbox_work(struct work_struct *mailbox_work)
  269. {
  270. struct omap2430_glue *glue = container_of(mailbox_work,
  271. struct omap2430_glue, omap_musb_mailbox_work);
  272. omap_musb_set_mailbox(glue);
  273. }
  274. #endif
  275. static int omap2430_musb_init(struct musb *musb)
  276. {
  277. u32 l;
  278. int status = 0;
  279. #ifndef __UBOOT__
  280. struct device *dev = musb->controller;
  281. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  282. struct musb_hdrc_platform_data *plat = dev->platform_data;
  283. struct omap_musb_board_data *data = plat->board_data;
  284. #else
  285. struct omap_musb_board_data *data =
  286. (struct omap_musb_board_data *)musb->controller;
  287. #endif
  288. #ifndef __UBOOT__
  289. /* We require some kind of external transceiver, hooked
  290. * up through ULPI. TWL4030-family PMICs include one,
  291. * which needs a driver, drivers aren't always needed.
  292. */
  293. musb->xceiv = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
  294. if (IS_ERR_OR_NULL(musb->xceiv)) {
  295. pr_err("HS USB OTG: no transceiver configured\n");
  296. return -ENODEV;
  297. }
  298. status = pm_runtime_get_sync(dev);
  299. if (status < 0) {
  300. dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
  301. goto err1;
  302. }
  303. #endif
  304. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  305. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  306. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  307. l &= ~ULPI_12PIN; /* Disable ULPI */
  308. l |= UTMI_8BIT; /* Enable UTMI */
  309. } else {
  310. l |= ULPI_12PIN;
  311. }
  312. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  313. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  314. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  315. musb_readl(musb->mregs, OTG_REVISION),
  316. musb_readl(musb->mregs, OTG_SYSCONFIG),
  317. musb_readl(musb->mregs, OTG_SYSSTATUS),
  318. musb_readl(musb->mregs, OTG_INTERFSEL),
  319. musb_readl(musb->mregs, OTG_SIMENABLE));
  320. #ifndef __UBOOT__
  321. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  322. if (glue->status != OMAP_MUSB_UNKNOWN)
  323. omap_musb_set_mailbox(glue);
  324. pm_runtime_put_noidle(musb->controller);
  325. #endif
  326. return 0;
  327. err1:
  328. return status;
  329. }
  330. static void omap2430_musb_enable(struct musb *musb)
  331. {
  332. #ifndef __UBOOT__
  333. u8 devctl;
  334. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  335. struct device *dev = musb->controller;
  336. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  337. struct musb_hdrc_platform_data *pdata = dev->platform_data;
  338. struct omap_musb_board_data *data = pdata->board_data;
  339. switch (glue->status) {
  340. case OMAP_MUSB_ID_GROUND:
  341. usb_phy_init(musb->xceiv);
  342. if (data->interface_type != MUSB_INTERFACE_UTMI)
  343. break;
  344. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  345. /* start the session */
  346. devctl |= MUSB_DEVCTL_SESSION;
  347. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  348. while (musb_readb(musb->mregs, MUSB_DEVCTL) &
  349. MUSB_DEVCTL_BDEVICE) {
  350. cpu_relax();
  351. if (time_after(jiffies, timeout)) {
  352. dev_err(dev, "configured as A device timeout");
  353. break;
  354. }
  355. }
  356. break;
  357. case OMAP_MUSB_VBUS_VALID:
  358. usb_phy_init(musb->xceiv);
  359. break;
  360. default:
  361. break;
  362. }
  363. #else
  364. #ifdef CONFIG_TWL4030_USB
  365. if (twl4030_usb_ulpi_init()) {
  366. serial_printf("ERROR: %s Could not initialize PHY\n",
  367. __PRETTY_FUNCTION__);
  368. }
  369. #endif
  370. #endif
  371. }
  372. static void omap2430_musb_disable(struct musb *musb)
  373. {
  374. #ifndef __UBOOT__
  375. struct device *dev = musb->controller;
  376. struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
  377. if (glue->status != OMAP_MUSB_UNKNOWN)
  378. usb_phy_shutdown(musb->xceiv);
  379. #endif
  380. }
  381. static int omap2430_musb_exit(struct musb *musb)
  382. {
  383. del_timer_sync(&musb_idle_timer);
  384. omap2430_low_level_exit(musb);
  385. return 0;
  386. }
  387. #ifndef __UBOOT__
  388. static const struct musb_platform_ops omap2430_ops = {
  389. #else
  390. const struct musb_platform_ops omap2430_ops = {
  391. #endif
  392. .init = omap2430_musb_init,
  393. .exit = omap2430_musb_exit,
  394. #ifndef __UBOOT__
  395. .set_mode = omap2430_musb_set_mode,
  396. .try_idle = omap2430_musb_try_idle,
  397. .set_vbus = omap2430_musb_set_vbus,
  398. #endif
  399. .enable = omap2430_musb_enable,
  400. .disable = omap2430_musb_disable,
  401. };
  402. #ifndef __UBOOT__
  403. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  404. static int __devinit omap2430_probe(struct platform_device *pdev)
  405. {
  406. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  407. struct platform_device *musb;
  408. struct omap2430_glue *glue;
  409. int ret = -ENOMEM;
  410. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  411. if (!glue) {
  412. dev_err(&pdev->dev, "failed to allocate glue context\n");
  413. goto err0;
  414. }
  415. musb = platform_device_alloc("musb-hdrc", -1);
  416. if (!musb) {
  417. dev_err(&pdev->dev, "failed to allocate musb device\n");
  418. goto err0;
  419. }
  420. musb->dev.parent = &pdev->dev;
  421. musb->dev.dma_mask = &omap2430_dmamask;
  422. musb->dev.coherent_dma_mask = omap2430_dmamask;
  423. glue->dev = &pdev->dev;
  424. glue->musb = musb;
  425. glue->status = OMAP_MUSB_UNKNOWN;
  426. pdata->platform_ops = &omap2430_ops;
  427. platform_set_drvdata(pdev, glue);
  428. /*
  429. * REVISIT if we ever have two instances of the wrapper, we will be
  430. * in big trouble
  431. */
  432. _glue = glue;
  433. INIT_WORK(&glue->omap_musb_mailbox_work, omap_musb_mailbox_work);
  434. ret = platform_device_add_resources(musb, pdev->resource,
  435. pdev->num_resources);
  436. if (ret) {
  437. dev_err(&pdev->dev, "failed to add resources\n");
  438. goto err1;
  439. }
  440. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  441. if (ret) {
  442. dev_err(&pdev->dev, "failed to add platform_data\n");
  443. goto err1;
  444. }
  445. pm_runtime_enable(&pdev->dev);
  446. ret = platform_device_add(musb);
  447. if (ret) {
  448. dev_err(&pdev->dev, "failed to register musb device\n");
  449. goto err1;
  450. }
  451. return 0;
  452. err1:
  453. platform_device_put(musb);
  454. err0:
  455. return ret;
  456. }
  457. static int __devexit omap2430_remove(struct platform_device *pdev)
  458. {
  459. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  460. cancel_work_sync(&glue->omap_musb_mailbox_work);
  461. platform_device_del(glue->musb);
  462. platform_device_put(glue->musb);
  463. return 0;
  464. }
  465. #ifdef CONFIG_PM
  466. static int omap2430_runtime_suspend(struct device *dev)
  467. {
  468. struct omap2430_glue *glue = dev_get_drvdata(dev);
  469. struct musb *musb = glue_to_musb(glue);
  470. if (musb) {
  471. musb->context.otg_interfsel = musb_readl(musb->mregs,
  472. OTG_INTERFSEL);
  473. omap2430_low_level_exit(musb);
  474. usb_phy_set_suspend(musb->xceiv, 1);
  475. }
  476. return 0;
  477. }
  478. static int omap2430_runtime_resume(struct device *dev)
  479. {
  480. struct omap2430_glue *glue = dev_get_drvdata(dev);
  481. struct musb *musb = glue_to_musb(glue);
  482. if (musb) {
  483. omap2430_low_level_init(musb);
  484. musb_writel(musb->mregs, OTG_INTERFSEL,
  485. musb->context.otg_interfsel);
  486. usb_phy_set_suspend(musb->xceiv, 0);
  487. }
  488. return 0;
  489. }
  490. static struct dev_pm_ops omap2430_pm_ops = {
  491. .runtime_suspend = omap2430_runtime_suspend,
  492. .runtime_resume = omap2430_runtime_resume,
  493. };
  494. #define DEV_PM_OPS (&omap2430_pm_ops)
  495. #else
  496. #define DEV_PM_OPS NULL
  497. #endif
  498. static struct platform_driver omap2430_driver = {
  499. .probe = omap2430_probe,
  500. .remove = __devexit_p(omap2430_remove),
  501. .driver = {
  502. .name = "musb-omap2430",
  503. .pm = DEV_PM_OPS,
  504. },
  505. };
  506. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  507. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  508. MODULE_LICENSE("GPL v2");
  509. static int __init omap2430_init(void)
  510. {
  511. return platform_driver_register(&omap2430_driver);
  512. }
  513. subsys_initcall(omap2430_init);
  514. static void __exit omap2430_exit(void)
  515. {
  516. platform_driver_unregister(&omap2430_driver);
  517. }
  518. module_exit(omap2430_exit);
  519. #endif