u-boot/arch/sandbox/dts/sandbox.dts

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <0>;

	chosen {
		stdout-path = "/serial";
	};

	/* Needs to be available prior to relocation */
	uart0: serial {
		compatible = "sandbox,serial";
		sandbox,text-colour = "cyan";
	};

	triangle {
		compatible = "demo-shape";
		colour = "cyan";
		sides = <3>;
		character = <83>;
	};
	square {
		compatible = "demo-shape";
		colour = "blue";
		sides = <4>;
	};
	hexagon {
		compatible = "demo-simple";
		colour = "white";
		sides = <6>;
	};

	host@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "sandbox,host-emulation";
		cros-ec@0 {
			reg = <0>;
			compatible = "google,cros-ec";

			/*
			 * This describes the flash memory within the EC. Note
			 * that the STM32L flash erases to 0, not 0xff.
			 */
			#address-cells = <1>;
			#size-cells = <1>;
			flash@8000000 {
				reg = <0x08000000 0x20000>;
				erase-value = <0>;
				#address-cells = <1>;
				#size-cells = <1>;

				/* Information for sandbox */
				ro {
					reg = <0 0xf000>;
				};
				wp-ro {
					reg = <0xf000 0x1000>;
				};
				rw {
					reg = <0x10000 0x10000>;
				};
			};
		};
	};

	lcd {
		compatible = "sandbox,lcd-sdl";
		xres = <800>;
		yres = <600>;
	};

	cros-ec-keyb {
		compatible = "google,cros-ec-keyb";
		keypad,num-rows = <8>;
		keypad,num-columns = <13>;
		google,ghost-filter;
		/*
		 * Keymap entries take the form of 0xRRCCKKKK where
		 * RR=Row CC=Column KKKK=Key Code
		 * The values below are for a US keyboard layout and
		 * are taken from the Linux driver. Note that the
		 * 102ND key is not used for US keyboards.
		 */
		linux,keymap = <
			/* CAPSLCK F1         B          F10     */
			0x0001003a 0x0002003b 0x00030030 0x00040044
			/* N       =          R_ALT      ESC     */
			0x00060031 0x0008000d 0x000a0064 0x01010001
			/* F4      G          F7         H       */
			0x0102003e 0x01030022 0x01040041 0x01060023
			/* '       F9         BKSPACE    L_CTRL  */
			0x01080028 0x01090043 0x010b000e 0x0200001d
			/* TAB     F3         T          F6      */
			0x0201000f 0x0202003d 0x02030014 0x02040040
			/* ]       Y          102ND      [       */
			0x0205001b 0x02060015 0x02070056 0x0208001a
			/* F8      GRAVE      F2         5       */
			0x02090042 0x03010029 0x0302003c 0x03030006
			/* F5      6          -          \       */
			0x0304003f 0x03060007 0x0308000c 0x030b002b
			/* R_CTRL  A          D          F       */
			0x04000061 0x0401001e 0x04020020 0x04030021
			/* S       K          J          ;       */
			0x0404001f 0x04050025 0x04060024 0x04080027
			/* L       ENTER      Z          C       */
			0x04090026 0x040b001c 0x0501002c 0x0502002e
			/* V       X          ,          M       */
			0x0503002f 0x0504002d 0x05050033 0x05060032
			/* L_SHIFT /          .          SPACE   */
			0x0507002a 0x05080035 0x05090034 0x050B0039
			/* 1       3          4          2       */
			0x06010002 0x06020004 0x06030005 0x06040003
			/* 8       7          0          9       */
			0x06050009 0x06060008 0x0608000b 0x0609000a
			/* L_ALT   DOWN       RIGHT      Q       */
			0x060a0038 0x060b006c 0x060c006a 0x07010010
			/* E       R          W          I       */
			0x07020012 0x07030013 0x07040011 0x07050017
			/* U       R_SHIFT    P          O       */
			0x07060016 0x07070036 0x07080019 0x07090018
			/* UP      LEFT    */
			0x070b0067 0x070c0069>;
	};

	gpio_a: gpios {
		gpio-controller;
		compatible = "sandbox,gpio";
		#gpio-cells = <1>;
		gpio-bank-name = "a";
		num-gpios = <20>;
	};

	i2c@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;
		compatible = "sandbox,i2c";
		clock-frequency = <400000>;
		eeprom@2c {
			reg = <0x2c>;
			compatible = "i2c-eeprom";
			emul {
				compatible = "sandbox,i2c-eeprom";
				sandbox,filename = "i2c.bin";
				sandbox,size = <128>;
			};
		};
	};

	spi@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;
		compatible = "sandbox,spi";
		cs-gpios = <0>, <&gpio_a 0>;
		flash@0 {
			reg = <0>;
			compatible = "spansion,m25p16", "sandbox,spi-flash";
			spi-max-frequency = <40000000>;
			sandbox,filename = "spi.bin";
		};
	};

	cros-ec@0 {
		compatible = "google,cros-ec";
		#address-cells = <1>;
		#size-cells = <1>;
		firmware_storage_spi: flash@0 {
			reg = <0 0x400000>;
		};
	};

};