sf_probe.c 13 KB

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  1. /*
  2. * SPI flash probing
  3. *
  4. * Copyright (C) 2008 Atmel Corporation
  5. * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
  6. * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
  7. *
  8. * SPDX-License-Identifier: GPL-2.0+
  9. */
  10. #include <common.h>
  11. #include <dm.h>
  12. #include <errno.h>
  13. #include <fdtdec.h>
  14. #include <malloc.h>
  15. #include <mapmem.h>
  16. #include <spi.h>
  17. #include <spi_flash.h>
  18. #include <asm/io.h>
  19. #include "sf_internal.h"
  20. DECLARE_GLOBAL_DATA_PTR;
  21. /* Read commands array */
  22. static u8 spi_read_cmds_array[] = {
  23. CMD_READ_ARRAY_SLOW,
  24. CMD_READ_ARRAY_FAST,
  25. CMD_READ_DUAL_OUTPUT_FAST,
  26. CMD_READ_DUAL_IO_FAST,
  27. CMD_READ_QUAD_OUTPUT_FAST,
  28. CMD_READ_QUAD_IO_FAST,
  29. };
  30. #ifdef CONFIG_SPI_FLASH_MACRONIX
  31. static int spi_flash_set_qeb_mxic(struct spi_flash *flash)
  32. {
  33. u8 qeb_status;
  34. int ret;
  35. ret = spi_flash_cmd_read_status(flash, &qeb_status);
  36. if (ret < 0)
  37. return ret;
  38. if (qeb_status & STATUS_QEB_MXIC) {
  39. debug("SF: mxic: QEB is already set\n");
  40. } else {
  41. ret = spi_flash_cmd_write_status(flash, STATUS_QEB_MXIC);
  42. if (ret < 0)
  43. return ret;
  44. }
  45. return ret;
  46. }
  47. #endif
  48. #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  49. static int spi_flash_set_qeb_winspan(struct spi_flash *flash)
  50. {
  51. u8 qeb_status;
  52. int ret;
  53. ret = spi_flash_cmd_read_config(flash, &qeb_status);
  54. if (ret < 0)
  55. return ret;
  56. if (qeb_status & STATUS_QEB_WINSPAN) {
  57. debug("SF: winspan: QEB is already set\n");
  58. } else {
  59. ret = spi_flash_cmd_write_config(flash, STATUS_QEB_WINSPAN);
  60. if (ret < 0)
  61. return ret;
  62. }
  63. return ret;
  64. }
  65. #endif
  66. static int spi_flash_set_qeb(struct spi_flash *flash, u8 idcode0)
  67. {
  68. switch (idcode0) {
  69. #ifdef CONFIG_SPI_FLASH_MACRONIX
  70. case SPI_FLASH_CFI_MFR_MACRONIX:
  71. return spi_flash_set_qeb_mxic(flash);
  72. #endif
  73. #if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
  74. case SPI_FLASH_CFI_MFR_SPANSION:
  75. case SPI_FLASH_CFI_MFR_WINBOND:
  76. return spi_flash_set_qeb_winspan(flash);
  77. #endif
  78. #ifdef CONFIG_SPI_FLASH_STMICRO
  79. case SPI_FLASH_CFI_MFR_STMICRO:
  80. debug("SF: QEB is volatile for %02x flash\n", idcode0);
  81. return 0;
  82. #endif
  83. default:
  84. printf("SF: Need set QEB func for %02x flash\n", idcode0);
  85. return -1;
  86. }
  87. }
  88. #ifdef CONFIG_SPI_FLASH_BAR
  89. static int spi_flash_read_bank(struct spi_flash *flash, u8 idcode0)
  90. {
  91. u8 curr_bank = 0;
  92. int ret;
  93. if (flash->size <= SPI_FLASH_16MB_BOUN)
  94. goto bank_end;
  95. switch (idcode0) {
  96. case SPI_FLASH_CFI_MFR_SPANSION:
  97. flash->bank_read_cmd = CMD_BANKADDR_BRRD;
  98. flash->bank_write_cmd = CMD_BANKADDR_BRWR;
  99. default:
  100. flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
  101. flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
  102. }
  103. ret = spi_flash_read_common(flash, &flash->bank_read_cmd, 1,
  104. &curr_bank, 1);
  105. if (ret) {
  106. debug("SF: fail to read bank addr register\n");
  107. return ret;
  108. }
  109. bank_end:
  110. flash->bank_curr = curr_bank;
  111. return 0;
  112. }
  113. #endif
  114. #if CONFIG_IS_ENABLED(OF_CONTROL)
  115. int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
  116. {
  117. fdt_addr_t addr;
  118. fdt_size_t size;
  119. int node;
  120. /* If there is no node, do nothing */
  121. node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
  122. if (node < 0)
  123. return 0;
  124. addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
  125. if (addr == FDT_ADDR_T_NONE) {
  126. debug("%s: Cannot decode address\n", __func__);
  127. return 0;
  128. }
  129. if (flash->size != size) {
  130. debug("%s: Memory map must cover entire device\n", __func__);
  131. return -1;
  132. }
  133. flash->memory_map = map_sysmem(addr, size);
  134. return 0;
  135. }
  136. #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
  137. static int spi_flash_scan(struct spi_slave *spi, u8 *idcode,
  138. struct spi_flash *flash)
  139. {
  140. const struct spi_flash_params *params;
  141. u8 cmd;
  142. u16 jedec = idcode[1] << 8 | idcode[2];
  143. u16 ext_jedec = idcode[3] << 8 | idcode[4];
  144. int ret;
  145. /* Validate params from spi_flash_params table */
  146. params = spi_flash_params_table;
  147. for (; params->name != NULL; params++) {
  148. if ((params->jedec >> 16) == idcode[0]) {
  149. if ((params->jedec & 0xFFFF) == jedec) {
  150. if (params->ext_jedec == 0)
  151. break;
  152. else if (params->ext_jedec == ext_jedec)
  153. break;
  154. }
  155. }
  156. }
  157. if (!params->name) {
  158. printf("SF: Unsupported flash IDs: ");
  159. printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
  160. idcode[0], jedec, ext_jedec);
  161. return -EPROTONOSUPPORT;
  162. }
  163. /* Flash powers up read-only, so clear BP# bits */
  164. #if defined(CONFIG_SPI_FLASH_ATMEL) || \
  165. defined(CONFIG_SPI_FLASH_MACRONIX) || \
  166. defined(CONFIG_SPI_FLASH_SST)
  167. spi_flash_cmd_write_status(flash, 0);
  168. #endif
  169. /* Assign spi data */
  170. flash->spi = spi;
  171. flash->name = params->name;
  172. flash->memory_map = spi->memory_map;
  173. flash->dual_flash = flash->spi->option;
  174. /* Assign spi flash flags */
  175. if (params->flags & SST_WR)
  176. flash->flags |= SNOR_F_SST_WR;
  177. /* Assign spi_flash ops */
  178. #ifndef CONFIG_DM_SPI_FLASH
  179. flash->write = spi_flash_cmd_write_ops;
  180. #if defined(CONFIG_SPI_FLASH_SST)
  181. if (flash->flags & SNOR_F_SST_WR) {
  182. if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
  183. flash->write = sst_write_bp;
  184. else
  185. flash->write = sst_write_wp;
  186. }
  187. #endif
  188. flash->erase = spi_flash_cmd_erase_ops;
  189. flash->read = spi_flash_cmd_read_ops;
  190. #endif
  191. /* lock hooks are flash specific - assign them based on idcode0 */
  192. switch (idcode[0]) {
  193. #if defined(CONFIG_SPI_FLASH_STMICRO) || defined(CONFIG_SPI_FLASH_SST)
  194. case SPI_FLASH_CFI_MFR_STMICRO:
  195. case SPI_FLASH_CFI_MFR_SST:
  196. flash->flash_lock = stm_lock;
  197. flash->flash_unlock = stm_unlock;
  198. flash->flash_is_locked = stm_is_locked;
  199. #endif
  200. break;
  201. default:
  202. debug("SF: Lock ops not supported for %02x flash\n", idcode[0]);
  203. }
  204. /* Compute the flash size */
  205. flash->shift = (flash->dual_flash & SF_DUAL_PARALLEL_FLASH) ? 1 : 0;
  206. /*
  207. * The Spansion S25FL032P and S25FL064P have 256b pages, yet use the
  208. * 0x4d00 Extended JEDEC code. The rest of the Spansion flashes with
  209. * the 0x4d00 Extended JEDEC code have 512b pages. All of the others
  210. * have 256b pages.
  211. */
  212. if (ext_jedec == 0x4d00) {
  213. if ((jedec == 0x0215) || (jedec == 0x216))
  214. flash->page_size = 256;
  215. else
  216. flash->page_size = 512;
  217. } else {
  218. flash->page_size = 256;
  219. }
  220. flash->page_size <<= flash->shift;
  221. flash->sector_size = params->sector_size << flash->shift;
  222. flash->size = flash->sector_size * params->nr_sectors << flash->shift;
  223. #ifdef CONFIG_SF_DUAL_FLASH
  224. if (flash->dual_flash & SF_DUAL_STACKED_FLASH)
  225. flash->size <<= 1;
  226. #endif
  227. /* Compute erase sector and command */
  228. if (params->flags & SECT_4K) {
  229. flash->erase_cmd = CMD_ERASE_4K;
  230. flash->erase_size = 4096 << flash->shift;
  231. } else if (params->flags & SECT_32K) {
  232. flash->erase_cmd = CMD_ERASE_32K;
  233. flash->erase_size = 32768 << flash->shift;
  234. } else {
  235. flash->erase_cmd = CMD_ERASE_64K;
  236. flash->erase_size = flash->sector_size;
  237. }
  238. /* Now erase size becomes valid sector size */
  239. flash->sector_size = flash->erase_size;
  240. /* Look for the fastest read cmd */
  241. cmd = fls(params->e_rd_cmd & flash->spi->op_mode_rx);
  242. if (cmd) {
  243. cmd = spi_read_cmds_array[cmd - 1];
  244. flash->read_cmd = cmd;
  245. } else {
  246. /* Go for default supported read cmd */
  247. flash->read_cmd = CMD_READ_ARRAY_FAST;
  248. }
  249. /* Not require to look for fastest only two write cmds yet */
  250. if (params->flags & WR_QPP && flash->spi->op_mode_tx & SPI_OPM_TX_QPP)
  251. flash->write_cmd = CMD_QUAD_PAGE_PROGRAM;
  252. else
  253. /* Go for default supported write cmd */
  254. flash->write_cmd = CMD_PAGE_PROGRAM;
  255. /* Set the quad enable bit - only for quad commands */
  256. if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
  257. (flash->read_cmd == CMD_READ_QUAD_IO_FAST) ||
  258. (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
  259. ret = spi_flash_set_qeb(flash, idcode[0]);
  260. if (ret) {
  261. debug("SF: Fail to set QEB for %02x\n", idcode[0]);
  262. return -EINVAL;
  263. }
  264. }
  265. /* Read dummy_byte: dummy byte is determined based on the
  266. * dummy cycles of a particular command.
  267. * Fast commands - dummy_byte = dummy_cycles/8
  268. * I/O commands- dummy_byte = (dummy_cycles * no.of lines)/8
  269. * For I/O commands except cmd[0] everything goes on no.of lines
  270. * based on particular command but incase of fast commands except
  271. * data all go on single line irrespective of command.
  272. */
  273. switch (flash->read_cmd) {
  274. case CMD_READ_QUAD_IO_FAST:
  275. flash->dummy_byte = 2;
  276. break;
  277. case CMD_READ_ARRAY_SLOW:
  278. flash->dummy_byte = 0;
  279. break;
  280. default:
  281. flash->dummy_byte = 1;
  282. }
  283. #ifdef CONFIG_SPI_FLASH_STMICRO
  284. if (params->flags & E_FSR)
  285. flash->flags |= SNOR_F_USE_FSR;
  286. #endif
  287. /* Configure the BAR - discover bank cmds and read current bank */
  288. #ifdef CONFIG_SPI_FLASH_BAR
  289. ret = spi_flash_read_bank(flash, idcode[0]);
  290. if (ret < 0)
  291. return ret;
  292. #endif
  293. #if CONFIG_IS_ENABLED(OF_CONTROL)
  294. ret = spi_flash_decode_fdt(gd->fdt_blob, flash);
  295. if (ret) {
  296. debug("SF: FDT decode error\n");
  297. return -EINVAL;
  298. }
  299. #endif
  300. #ifndef CONFIG_SPL_BUILD
  301. printf("SF: Detected %s with page size ", flash->name);
  302. print_size(flash->page_size, ", erase size ");
  303. print_size(flash->erase_size, ", total ");
  304. print_size(flash->size, "");
  305. if (flash->memory_map)
  306. printf(", mapped at %p", flash->memory_map);
  307. puts("\n");
  308. #endif
  309. #ifndef CONFIG_SPI_FLASH_BAR
  310. if (((flash->dual_flash == SF_SINGLE_FLASH) &&
  311. (flash->size > SPI_FLASH_16MB_BOUN)) ||
  312. ((flash->dual_flash > SF_SINGLE_FLASH) &&
  313. (flash->size > SPI_FLASH_16MB_BOUN << 1))) {
  314. puts("SF: Warning - Only lower 16MiB accessible,");
  315. puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
  316. }
  317. #endif
  318. return ret;
  319. }
  320. /**
  321. * spi_flash_probe_slave() - Probe for a SPI flash device on a bus
  322. *
  323. * @spi: Bus to probe
  324. * @flashp: Pointer to place to put flash info, which may be NULL if the
  325. * space should be allocated
  326. */
  327. int spi_flash_probe_slave(struct spi_slave *spi, struct spi_flash *flash)
  328. {
  329. u8 idcode[5];
  330. int ret;
  331. /* Setup spi_slave */
  332. if (!spi) {
  333. printf("SF: Failed to set up slave\n");
  334. return -ENODEV;
  335. }
  336. /* Claim spi bus */
  337. ret = spi_claim_bus(spi);
  338. if (ret) {
  339. debug("SF: Failed to claim SPI bus: %d\n", ret);
  340. return ret;
  341. }
  342. /* Read the ID codes */
  343. ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
  344. if (ret) {
  345. printf("SF: Failed to get idcodes\n");
  346. goto err_read_id;
  347. }
  348. #ifdef DEBUG
  349. printf("SF: Got idcodes\n");
  350. print_buffer(0, idcode, 1, sizeof(idcode), 0);
  351. #endif
  352. ret = spi_flash_scan(spi, idcode, flash);
  353. if (ret) {
  354. ret = -EINVAL;
  355. goto err_read_id;
  356. }
  357. #ifdef CONFIG_SPI_FLASH_MTD
  358. ret = spi_flash_mtd_register(flash);
  359. #endif
  360. err_read_id:
  361. spi_release_bus(spi);
  362. return ret;
  363. }
  364. #ifndef CONFIG_DM_SPI_FLASH
  365. struct spi_flash *spi_flash_probe_tail(struct spi_slave *bus)
  366. {
  367. struct spi_flash *flash;
  368. /* Allocate space if needed (not used by sf-uclass */
  369. flash = calloc(1, sizeof(*flash));
  370. if (!flash) {
  371. debug("SF: Failed to allocate spi_flash\n");
  372. return NULL;
  373. }
  374. if (spi_flash_probe_slave(bus, flash)) {
  375. spi_free_slave(bus);
  376. free(flash);
  377. return NULL;
  378. }
  379. return flash;
  380. }
  381. struct spi_flash *spi_flash_probe(unsigned int busnum, unsigned int cs,
  382. unsigned int max_hz, unsigned int spi_mode)
  383. {
  384. struct spi_slave *bus;
  385. bus = spi_setup_slave(busnum, cs, max_hz, spi_mode);
  386. if (!bus)
  387. return NULL;
  388. return spi_flash_probe_tail(bus);
  389. }
  390. #ifdef CONFIG_OF_SPI_FLASH
  391. struct spi_flash *spi_flash_probe_fdt(const void *blob, int slave_node,
  392. int spi_node)
  393. {
  394. struct spi_slave *bus;
  395. bus = spi_setup_slave_fdt(blob, slave_node, spi_node);
  396. if (!bus)
  397. return NULL;
  398. return spi_flash_probe_tail(bus);
  399. }
  400. #endif
  401. void spi_flash_free(struct spi_flash *flash)
  402. {
  403. #ifdef CONFIG_SPI_FLASH_MTD
  404. spi_flash_mtd_unregister();
  405. #endif
  406. spi_free_slave(flash->spi);
  407. free(flash);
  408. }
  409. #else /* defined CONFIG_DM_SPI_FLASH */
  410. static int spi_flash_std_read(struct udevice *dev, u32 offset, size_t len,
  411. void *buf)
  412. {
  413. struct spi_flash *flash = dev_get_uclass_priv(dev);
  414. return spi_flash_cmd_read_ops(flash, offset, len, buf);
  415. }
  416. int spi_flash_std_write(struct udevice *dev, u32 offset, size_t len,
  417. const void *buf)
  418. {
  419. struct spi_flash *flash = dev_get_uclass_priv(dev);
  420. #if defined(CONFIG_SPI_FLASH_SST)
  421. if (flash->flags & SNOR_F_SST_WR) {
  422. if (flash->spi->op_mode_tx & SPI_OPM_TX_BP)
  423. return sst_write_bp(flash, offset, len, buf);
  424. else
  425. return sst_write_wp(flash, offset, len, buf);
  426. }
  427. #endif
  428. return spi_flash_cmd_write_ops(flash, offset, len, buf);
  429. }
  430. int spi_flash_std_erase(struct udevice *dev, u32 offset, size_t len)
  431. {
  432. struct spi_flash *flash = dev_get_uclass_priv(dev);
  433. return spi_flash_cmd_erase_ops(flash, offset, len);
  434. }
  435. int spi_flash_std_probe(struct udevice *dev)
  436. {
  437. struct spi_slave *slave = dev_get_parent_priv(dev);
  438. struct dm_spi_slave_platdata *plat = dev_get_parent_platdata(dev);
  439. struct spi_flash *flash;
  440. flash = dev_get_uclass_priv(dev);
  441. flash->dev = dev;
  442. debug("%s: slave=%p, cs=%d\n", __func__, slave, plat->cs);
  443. return spi_flash_probe_slave(slave, flash);
  444. }
  445. static const struct dm_spi_flash_ops spi_flash_std_ops = {
  446. .read = spi_flash_std_read,
  447. .write = spi_flash_std_write,
  448. .erase = spi_flash_std_erase,
  449. };
  450. static const struct udevice_id spi_flash_std_ids[] = {
  451. { .compatible = "spi-flash" },
  452. { }
  453. };
  454. U_BOOT_DRIVER(spi_flash_std) = {
  455. .name = "spi_flash_std",
  456. .id = UCLASS_SPI_FLASH,
  457. .of_match = spi_flash_std_ids,
  458. .probe = spi_flash_std_probe,
  459. .priv_auto_alloc_size = sizeof(struct spi_flash),
  460. .ops = &spi_flash_std_ops,
  461. };
  462. #endif /* CONFIG_DM_SPI_FLASH */