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asm
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arch-exynos
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power.h

power.h 30 KB
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  1. /*
    2. 

  2.  * Copyright (C) 2011 Samsung Electronics
    3. 

  3.  * Heungjun Kim <riverful.kim@samsung.com>
    4. 

  4.  *
    5. 

  5.  * See file CREDITS for list of people who contributed to this
    6. 

  6.  * project.
    7. 

  7.  *
    8. 

  8.  * This program is free software; you can redistribute it and/or
    9. 

  9.  * modify it under the terms of the GNU General Public License as
    10. 

  10.  * published by the Free Software Foundation; either version 2 of
    11. 

  11.  * the License, or (at your option) any later version.
    12. 

  12.  *
    13. 

  13.  * This program is distributed in the hope that it will be useful,
    14. 

  14.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    15. 

  15.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    16. 

  16.  * GNU General Public License for more details.
    17. 

  17.  *
    18. 

  18.  * You should have received a copy of the GNU General Public License
    19. 

  19.  * along with this program; if not, write to the Free Software
    20. 

  20.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
    21. 

  21.  * MA 02111-1307 USA
    22. 

  22.  */
    23. 

  23. 

  24. #ifndef __ASM_ARM_ARCH_POWER_H_
    25. 

  25. #define __ASM_ARM_ARCH_POWER_H_
    26. 

  26. 

  27. #ifndef __ASSEMBLY__
    28. 

  28. struct exynos4_power {
    29. 

  29. 	unsigned int	om_stat;
    30. 

  30. 	unsigned char	res1[0x8];
    31. 

  31. 	unsigned int	rtc_clko_sel;
    32. 

  32. 	unsigned int	gnss_rtc_out_ctrl;
    33. 

  33. 	unsigned char	res2[0x1ec];
    34. 

  34. 	unsigned int	system_power_down_ctrl;
    35. 

  35. 	unsigned char	res3[0x1];
    36. 

  36. 	unsigned int	system_power_down_option;
    37. 

  37. 	unsigned char	res4[0x1f4];
    38. 

  38. 	unsigned int	swreset;
    39. 

  39. 	unsigned int	rst_stat;
    40. 

  40. 	unsigned char	res5[0x1f8];
    41. 

  41. 	unsigned int	wakeup_stat;
    42. 

  42. 	unsigned int	eint_wakeup_mask;
    43. 

  43. 	unsigned int	wakeup_mask;
    44. 

  44. 	unsigned char	res6[0xf4];
    45. 

  45. 	unsigned int	hdmi_phy_control;
    46. 

  46. 	unsigned int	usbdevice_phy_control;
    47. 

  47. 	unsigned int	usbhost_phy_control;
    48. 

  48. 	unsigned int	dac_phy_control;
    49. 

  49. 	unsigned int	mipi_phy0_control;
    50. 

  50. 	unsigned int	mipi_phy1_control;
    51. 

  51. 	unsigned int	adc_phy_control;
    52. 

  52. 	unsigned int	pcie_phy_control;
    53. 

  53. 	unsigned int	sata_phy_control;
    54. 

  54. 	unsigned char	res7[0xdc];
    55. 

  55. 	unsigned int	inform0;
    56. 

  56. 	unsigned int	inform1;
    57. 

  57. 	unsigned int	inform2;
    58. 

  58. 	unsigned int	inform3;
    59. 

  59. 	unsigned int	inform4;
    60. 

  60. 	unsigned int	inform5;
    61. 

  61. 	unsigned int	inform6;
    62. 

  62. 	unsigned int	inform7;
    63. 

  63. 	unsigned char	res8[0x1e0];
    64. 

  64. 	unsigned int	pmu_debug;
    65. 

  65. 	unsigned char	res9[0x5fc];
    66. 

  66. 	unsigned int	arm_core0_sys_pwr_reg;
    67. 

  67. 	unsigned char	res10[0xc];
    68. 

  68. 	unsigned int	arm_core1_sys_pwr_reg;
    69. 

  69. 	unsigned char	res11[0x6c];
    70. 

  70. 	unsigned int	arm_common_sys_pwr_reg;
    71. 

  71. 	unsigned char	res12[0x3c];
    72. 

  72. 	unsigned int	arm_cpu_l2_0_sys_pwr_reg;
    73. 

  73. 	unsigned int	arm_cpu_l2_1_sys_pwr_reg;
    74. 

  74. 	unsigned char	res13[0x38];
    75. 

  75. 	unsigned int	cmu_aclkstop_sys_pwr_reg;
    76. 

  76. 	unsigned int	cmu_sclkstop_sys_pwr_reg;
    77. 

  77. 	unsigned char	res14[0x4];
    78. 

  78. 	unsigned int	cmu_reset_sys_pwr_reg;
    79. 

  79. 	unsigned char	res15[0x10];
    80. 

  80. 	unsigned int	apll_sysclk_sys_pwr_reg;
    81. 

  81. 	unsigned int	mpll_sysclk_sys_pwr_reg;
    82. 

  82. 	unsigned int	vpll_sysclk_sys_pwr_reg;
    83. 

  83. 	unsigned int	epll_sysclk_sys_pwr_reg;
    84. 

  84. 	unsigned char	res16[0x8];
    85. 

  85. 	unsigned int	cmu_clkstop_gps_alive_sys_pwr_reg;
    86. 

  86. 	unsigned int	cmu_reset_gps_alive_sys_pwr_reg;
    87. 

  87. 	unsigned int	cmu_clkstop_cam_sys_pwr_reg;
    88. 

  88. 	unsigned int	cmu_clkstop_tv_sys_pwr_reg;
    89. 

  89. 	unsigned int	cmu_clkstop_mfc_sys_pwr_reg;
    90. 

  90. 	unsigned int	cmu_clkstop_g3d_sys_pwr_reg;
    91. 

  91. 	unsigned int	cmu_clkstop_lcd0_sys_pwr_reg;
    92. 

  92. 	unsigned int	cmu_clkstop_lcd1_sys_pwr_reg;
    93. 

  93. 	unsigned int	cmu_clkstop_maudio_sys_pwr_reg;
    94. 

  94. 	unsigned int	cmu_clkstop_gps_sys_pwr_reg;
    95. 

  95. 	unsigned int	cmu_reset_cam_sys_pwr_reg;
    96. 

  96. 	unsigned int	cmu_reset_tv_sys_pwr_reg;
    97. 

  97. 	unsigned int	cmu_reset_mfc_sys_pwr_reg;
    98. 

  98. 	unsigned int	cmu_reset_g3d_sys_pwr_reg;
    99. 

  99. 	unsigned int	cmu_reset_lcd0_sys_pwr_reg;
    100. 

  100. 	unsigned int	cmu_reset_lcd1_sys_pwr_reg;
    101. 

  101. 	unsigned int	cmu_reset_maudio_sys_pwr_reg;
    102. 

  102. 	unsigned int	cmu_reset_gps_sys_pwr_reg;
    103. 

  103. 	unsigned int	top_bus_sys_pwr_reg;
    104. 

  104. 	unsigned int	top_retention_sys_pwr_reg;
    105. 

  105. 	unsigned int	top_pwr_sys_pwr_reg;
    106. 

  106. 	unsigned char	res17[0x1c];
    107. 

  107. 	unsigned int	logic_reset_sys_pwr_reg;
    108. 

  108. 	unsigned char	res18[0x14];
    109. 

  109. 	unsigned int	onenandxl_mem_sys_pwr_reg;
    110. 

  110. 	unsigned int	modemif_mem_sys_pwr_reg;
    111. 

  111. 	unsigned char	res19[0x4];
    112. 

  112. 	unsigned int	usbdevice_mem_sys_pwr_reg;
    113. 

  113. 	unsigned int	sdmmc_mem_sys_pwr_reg;
    114. 

  114. 	unsigned int	cssys_mem_sys_pwr_reg;
    115. 

  115. 	unsigned int	secss_mem_sys_pwr_reg;
    116. 

  116. 	unsigned char	res20[0x4];
    117. 

  117. 	unsigned int	pcie_mem_sys_pwr_reg;
    118. 

  118. 	unsigned int	sata_mem_sys_pwr_reg;
    119. 

  119. 	unsigned char	res21[0x18];
    120. 

  120. 	unsigned int	pad_retention_dram_sys_pwr_reg;
    121. 

  121. 	unsigned int	pad_retention_maudio_sys_pwr_reg;
    122. 

  122. 	unsigned char	res22[0x18];
    123. 

  123. 	unsigned int	pad_retention_gpio_sys_pwr_reg;
    124. 

  124. 	unsigned int	pad_retention_uart_sys_pwr_reg;
    125. 

  125. 	unsigned int	pad_retention_mmca_sys_pwr_reg;
    126. 

  126. 	unsigned int	pad_retention_mmcb_sys_pwr_reg;
    127. 

  127. 	unsigned int	pad_retention_ebia_sys_pwr_reg;
    128. 

  128. 	unsigned int	pad_retention_ebib_sys_pwr_reg;
    129. 

  129. 	unsigned char	res23[0x8];
    130. 

  130. 	unsigned int	pad_isolation_sys_pwr_reg;
    131. 

  131. 	unsigned char	res24[0x1c];
    132. 

  132. 	unsigned int	pad_alv_sel_sys_pwr_reg;
    133. 

  133. 	unsigned char	res25[0x1c];
    134. 

  134. 	unsigned int	xusbxti_sys_pwr_reg;
    135. 

  135. 	unsigned int	xxti_sys_pwr_reg;
    136. 

  136. 	unsigned char	res26[0x38];
    137. 

  137. 	unsigned int	ext_regulator_sys_pwr_reg;
    138. 

  138. 	unsigned char	res27[0x3c];
    139. 

  139. 	unsigned int	gpio_mode_sys_pwr_reg;
    140. 

  140. 	unsigned char	res28[0x3c];
    141. 

  141. 	unsigned int	gpio_mode_maudio_sys_pwr_reg;
    142. 

  142. 	unsigned char	res29[0x3c];
    143. 

  143. 	unsigned int	cam_sys_pwr_reg;
    144. 

  144. 	unsigned int	tv_sys_pwr_reg;
    145. 

  145. 	unsigned int	mfc_sys_pwr_reg;
    146. 

  146. 	unsigned int	g3d_sys_pwr_reg;
    147. 

  147. 	unsigned int	lcd0_sys_pwr_reg;
    148. 

  148. 	unsigned int	lcd1_sys_pwr_reg;
    149. 

  149. 	unsigned int	maudio_sys_pwr_reg;
    150. 

  150. 	unsigned int	gps_sys_pwr_reg;
    151. 

  151. 	unsigned int	gps_alive_sys_pwr_reg;
    152. 

  152. 	unsigned char	res30[0xc5c];
    153. 

  153. 	unsigned int	arm_core0_configuration;
    154. 

  154. 	unsigned int	arm_core0_status;
    155. 

  155. 	unsigned int	arm_core0_option;
    156. 

  156. 	unsigned char	res31[0x74];
    157. 

  157. 	unsigned int	arm_core1_configuration;
    158. 

  158. 	unsigned int	arm_core1_status;
    159. 

  159. 	unsigned int	arm_core1_option;
    160. 

  160. 	unsigned char	res32[0x37c];
    161. 

  161. 	unsigned int	arm_common_option;
    162. 

  162. 	unsigned char	res33[0x1f4];
    163. 

  163. 	unsigned int	arm_cpu_l2_0_configuration;
    164. 

  164. 	unsigned int	arm_cpu_l2_0_status;
    165. 

  165. 	unsigned char	res34[0x18];
    166. 

  166. 	unsigned int	arm_cpu_l2_1_configuration;
    167. 

  167. 	unsigned int	arm_cpu_l2_1_status;
    168. 

  168. 	unsigned char	res35[0xa00];
    169. 

  169. 	unsigned int	pad_retention_maudio_option;
    170. 

  170. 	unsigned char	res36[0xdc];
    171. 

  171. 	unsigned int	pad_retention_gpio_option;
    172. 

  172. 	unsigned char	res37[0x1c];
    173. 

  173. 	unsigned int	pad_retention_uart_option;
    174. 

  174. 	unsigned char	res38[0x1c];
    175. 

  175. 	unsigned int	pad_retention_mmca_option;
    176. 

  176. 	unsigned char	res39[0x1c];
    177. 

  177. 	unsigned int	pad_retention_mmcb_option;
    178. 

  178. 	unsigned char	res40[0x1c];
    179. 

  179. 	unsigned int	pad_retention_ebia_option;
    180. 

  180. 	unsigned char	res41[0x1c];
    181. 

  181. 	unsigned int	pad_retention_ebib_option;
    182. 

  182. 	unsigned char	res42[0x160];
    183. 

  183. 	unsigned int	ps_hold_control;
    184. 

  184. 	unsigned char	res43[0xf0];
    185. 

  185. 	unsigned int	xusbxti_configuration;
    186. 

  186. 	unsigned int	xusbxti_status;
    187. 

  187. 	unsigned char	res44[0x14];
    188. 

  188. 	unsigned int	xusbxti_duration;
    189. 

  189. 	unsigned int	xxti_configuration;
    190. 

  190. 	unsigned int	xxti_status;
    191. 

  191. 	unsigned char	res45[0x14];
    192. 

  192. 	unsigned int	xxti_duration;
    193. 

  193. 	unsigned char	res46[0x1dc];
    194. 

  194. 	unsigned int	ext_regulator_duration;
    195. 

  195. 	unsigned char	res47[0x5e0];
    196. 

  196. 	unsigned int	cam_configuration;
    197. 

  197. 	unsigned int	cam_status;
    198. 

  198. 	unsigned int	cam_option;
    199. 

  199. 	unsigned char	res48[0x14];
    200. 

  200. 	unsigned int	tv_configuration;
    201. 

  201. 	unsigned int	tv_status;
    202. 

  202. 	unsigned int	tv_option;
    203. 

  203. 	unsigned char	res49[0x14];
    204. 

  204. 	unsigned int	mfc_configuration;
    205. 

  205. 	unsigned int	mfc_status;
    206. 

  206. 	unsigned int	mfc_option;
    207. 

  207. 	unsigned char	res50[0x14];
    208. 

  208. 	unsigned int	g3d_configuration;
    209. 

  209. 	unsigned int	g3d_status;
    210. 

  210. 	unsigned int	g3d_option;
    211. 

  211. 	unsigned char	res51[0x14];
    212. 

  212. 	unsigned int	lcd0_configuration;
    213. 

  213. 	unsigned int	lcd0_status;
    214. 

  214. 	unsigned int	lcd0_option;
    215. 

  215. 	unsigned char	res52[0x14];
    216. 

  216. 	unsigned int	lcd1_configuration;
    217. 

  217. 	unsigned int	lcd1_status;
    218. 

  218. 	unsigned int	lcd1_option;
    219. 

  219. 	unsigned char	res53[0x34];
    220. 

  220. 	unsigned int	gps_configuration;
    221. 

  221. 	unsigned int	gps_status;
    222. 

  222. 	unsigned int	gps_option;
    223. 

  223. 	unsigned char	res54[0x14];
    224. 

  224. 	unsigned int	gps_alive_configuration;
    225. 

  225. 	unsigned int	gps_alive_status;
    226. 

  226. 	unsigned int	gps_alive_option;
    227. 

  227. };
    228. 

  228. 

  229. struct exynos5_power {
    230. 

  230. 	unsigned int	om_stat;
    231. 

  231. 	unsigned char	res1[0x18];
    232. 

  232. 	unsigned int	rtc_clko_sel;
    233. 

  233. 	unsigned int	gnss_rtc_out_ctrl;
    234. 

  234. 	unsigned char	res2[0x1dc];
    235. 

  235. 	unsigned int	central_seq_configuration;
    236. 

  236. 	unsigned int	central_seq_status;
    237. 

  237. 	unsigned int	central_seq_option;
    238. 

  238. 	unsigned char	res3[0x14];
    239. 

  239. 	unsigned int	seq_transition0;
    240. 

  240. 	unsigned int	seq_transition1;
    241. 

  241. 	unsigned int	seq_transition2;
    242. 

  242. 	unsigned int	seq_transition3;
    243. 

  243. 	unsigned int	seq_transition4;
    244. 

  244. 	unsigned int	seq_transition5;
    245. 

  245. 	unsigned int	seq_transition6;
    246. 

  246. 	unsigned int	seq_transition7;
    247. 

  247. 	unsigned int	central_seq_dmc_configuration;
    248. 

  248. 	unsigned int	central_seq_dmc_status;
    249. 

  249. 	unsigned int	central_seq_dmc_option;
    250. 

  250. 	unsigned char	res4[0x14];
    251. 

  251. 	unsigned int	seq_dmc_transition0;
    252. 

  252. 	unsigned int	seq_dmc_transition1;
    253. 

  253. 	unsigned int	seq_dmc_transition2;
    254. 

  254. 	unsigned int	seq_dmc_transition3;
    255. 

  255. 	unsigned int	seq_dmc_transition4;
    256. 

  256. 	unsigned int	seq_dmc_transition5;
    257. 

  257. 	unsigned int	seq_dmc_transition6;
    258. 

  258. 	unsigned int	seq_dmc_transition7;
    259. 

  259. 	unsigned char	res5[0x180];
    260. 

  260. 	unsigned int	swreset;
    261. 

  261. 	unsigned int	rst_stat;
    262. 

  262. 	unsigned int	automatic_wdt_reset_disable;
    263. 

  263. 	unsigned int	mask_wdt_reset_request;
    264. 

  264. 	unsigned int	mask_wreset_request;
    265. 

  265. 	unsigned char	res6[0xec];
    266. 

  266. 	unsigned int	reset_sequencer_configuration;
    267. 

  267. 	unsigned int	reset_sequencer_status;
    268. 

  268. 	unsigned int	reset_sequencer_option;
    269. 

  269. 	unsigned char	res7[0xf4];
    270. 

  270. 	unsigned int	wakeup_stat;
    271. 

  271. 	unsigned int	eint_wakeup_mask;
    272. 

  272. 	unsigned int	wakeup_mask;
    273. 

  273. 	unsigned int	wakeup_interrupt;
    274. 

  274. 	unsigned char	res8[0x10];
    275. 

  275. 	unsigned int	wakeup_stat_dmc;
    276. 

  276. 	unsigned int	eint_wakeup_mask_dmc;
    277. 

  277. 	unsigned int	wakeup_mask_dmc;
    278. 

  278. 	unsigned int	wakeup_interrupt_dmc;
    279. 

  279. 	unsigned char	res9[0xd0];
    280. 

  280. 	unsigned int	hdmi_phy_control;
    281. 

  281. 	unsigned int	usbdrd_phy_control;
    282. 

  282. 	unsigned int	usbhost_phy_control;
    283. 

  283. 	unsigned int	efnand_phy_control;
    284. 

  284. 	unsigned int	mipi_phy0_control;
    285. 

  285. 	unsigned int	mipi_phy1_control;
    286. 

  286. 	unsigned int	adc_phy_control;
    287. 

  287. 	unsigned int	mtcadc_phy_control;
    288. 

  288. 	unsigned int	dptx_phy_control;
    289. 

  289. 	unsigned int	sata_phy_control;
    290. 

  290. 	unsigned char	res10[0xd8];
    291. 

  291. 	unsigned int	inform0;
    292. 

  292. 	unsigned int	inform1;
    293. 

  293. 	unsigned int	inform2;
    294. 

  294. 	unsigned int	inform3;
    295. 

  295. 	unsigned int	sysip_dat0;
    296. 

  296. 	unsigned int	sysip_dat1;
    297. 

  297. 	unsigned int	sysip_dat2;
    298. 

  298. 	unsigned int	sysip_dat3;
    299. 

  299. 	unsigned char	res11[0xe0];
    300. 

  300. 	unsigned int	pmu_spare0;
    301. 

  301. 	unsigned int	pmu_spare1;
    302. 

  302. 	unsigned int	pmu_spare2;
    303. 

  303. 	unsigned int	pmu_spare3;
    304. 

  304. 	unsigned char	res12[0x70];
    305. 

  305. 	unsigned int	irom_data_reg0;
    306. 

  306. 	unsigned int	irom_data_reg1;
    307. 

  307. 	unsigned int	irom_data_reg2;
    308. 

  308. 	unsigned int	irom_data_reg3;
    309. 

  309. 	unsigned char	res13[0x70];
    310. 

  310. 	unsigned int	pmu_debug;
    311. 

  311. 	unsigned char	res14[0x5fc];
    312. 

  312. 	unsigned int	arm_core0_sys_pwr_reg;
    313. 

  313. 	unsigned int	dis_irq_arm_core0_local_sys_pwr_reg;
    314. 

  314. 	unsigned int	dis_irq_arm_core0_central_sys_pwr_reg;
    315. 

  315. 	unsigned char	res15[0x4];
    316. 

  316. 	unsigned int	arm_core1_sys_pwr_reg;
    317. 

  317. 	unsigned int	dis_irq_arm_core1_local_sys_pwr_reg;
    318. 

  318. 	unsigned int	dis_irq_arm_core1_central_sys_pwr_reg;
    319. 

  319. 	unsigned char	res16[0x24];
    320. 

  320. 	unsigned int	fsys_arm_sys_pwr_reg;
    321. 

  321. 	unsigned int	dis_irq_fsys_arm_local_sys_pwr_reg;
    322. 

  322. 	unsigned int	dis_irq_fsys_arm_central_sys_pwr_reg;
    323. 

  323. 	unsigned char	res17[0x4];
    324. 

  324. 	unsigned int	isp_arm_sys_pwr_reg;
    325. 

  325. 	unsigned int	dis_irq_isp_arm_local_sys_pwr_reg;
    326. 

  326. 	unsigned int	dis_irq_isp_arm_central_sys_pwr_reg;
    327. 

  327. 	unsigned char	res18[0x24];
    328. 

  328. 	unsigned int	arm_common_sys_pwr_reg;
    329. 

  329. 	unsigned char	res19[0x3c];
    330. 

  330. 	unsigned int	arm_l2_sys_pwr_reg;
    331. 

  331. 	unsigned char	res20[0x3c];
    332. 

  332. 	unsigned int	cmu_aclkstop_sys_pwr_reg;
    333. 

  333. 	unsigned int	cmu_sclkstop_sys_pwr_reg;
    334. 

  334. 	unsigned char	res21[0x4];
    335. 

  335. 	unsigned int	cmu_reset_sys_pwr_reg;
    336. 

  336. 	unsigned char	res22[0x10];
    337. 

  337. 	unsigned int	cmu_aclkstop_dmc_sys_pwr_reg;
    338. 

  338. 	unsigned int	cmu_sclkstop_dmc_sys_pwr_reg;
    339. 

  339. 	unsigned char	res23[0x4];
    340. 

  340. 	unsigned int	cmu_reset_dmc_sys_pwr_reg;
    341. 

  341. 	unsigned char	res24[0x8];
    342. 

  342. 	unsigned int	ddrphy_dlllock_sys_pwr_reg;
    343. 

  343. 	unsigned char	res25[0x4];
    344. 

  344. 	unsigned int	apll_sysclk_sys_pwr_reg;
    345. 

  345. 	unsigned int	mpll_sysclk_sys_pwr_reg;
    346. 

  346. 	unsigned int	vpll_sysclk_sys_pwr_reg;
    347. 

  347. 	unsigned int	epll_sysclk_sys_pwr_reg;
    348. 

  348. 	unsigned int	bpll_sysclk_sys_pwr_reg;
    349. 

  349. 	unsigned int	cpll_sysclk_sys_pwr_reg;
    350. 

  350. 	unsigned int	gpll_sysclk_sys_pwr_reg;
    351. 

  351. 	unsigned char	res26[0x8];
    352. 

  352. 	unsigned int	mplluser_sysclk_sys_pwr_reg;
    353. 

  353. 	unsigned char	res27[0x8];
    354. 

  354. 	unsigned int	bplluser_sysclk_sys_pwr_reg;
    355. 

  355. 	unsigned char	res28[0xc];
    356. 

  356. 	unsigned int	top_bus_sys_pwr_reg;
    357. 

  357. 	unsigned int	top_retention_sys_pwr_reg;
    358. 

  358. 	unsigned int	top_pwr_sys_pwr_reg;
    359. 

  359. 	unsigned char	res29[0x4];
    360. 

  360. 	unsigned int	top_bus_dmc_sys_pwr_reg;
    361. 

  361. 	unsigned int	top_retention_dmc_sys_pwr_reg;
    362. 

  362. 	unsigned int	top_pwr_dmc_sys_pwr_reg;
    363. 

  363. 	unsigned char	res30[0x4];
    364. 

  364. 	unsigned int	logic_reset_sys_pwr_reg;
    365. 

  365. 	unsigned int	oscclk_gate_sys_pwr_reg;
    366. 

  366. 	unsigned char	res31[0x8];
    367. 

  367. 	unsigned int	logic_reset_dmc_sys_pwr_reg;
    368. 

  368. 	unsigned int	oscclk_gate_dmc_sys_pwr_reg;
    369. 

  369. 	unsigned char	res32[0x8];
    370. 

  370. 	unsigned int	usbotg_mem_sys_pwr_reg;
    371. 

  371. 	unsigned char	res33[0x4];
    372. 

  372. 	unsigned int	g2d_mem_sys_pwr_reg;
    373. 

  373. 	unsigned int	usbdrd_mem_sys_pwr_reg;
    374. 

  374. 	unsigned int	efnand_mem_sys_pwr_reg;
    375. 

  375. 	unsigned int	cssys_mem_sys_pwr_reg;
    376. 

  376. 	unsigned int	secss_mem_sys_pwr_reg;
    377. 

  377. 	unsigned int	rotator_mem_sys_pwr_reg;
    378. 

  378. 	unsigned int	intram_mem_sys_pwr_reg;
    379. 

  379. 	unsigned int	introm_mem_sys_pwr_reg;
    380. 

  380. 	unsigned int	jpeg_mem_sys_pwr_reg;
    381. 

  381. 	unsigned int	hsi_mem_sys_pwr_reg;
    382. 

  382. 	unsigned char	res34[0x4];
    383. 

  383. 	unsigned int	mcuiop_mem_sys_pwr_reg;
    384. 

  384. 	unsigned char	res35[0x4];
    385. 

  385. 	unsigned int	sata_mem_sys_pwr_reg;
    386. 

  386. 	unsigned int	pad_retention_dram_sys_pwr_reg;
    387. 

  387. 	unsigned int	pad_retention_mau_sys_pwr_reg;
    388. 

  388. 	unsigned int	pad_retention_jtag_sys_pwr_reg;
    389. 

  389. 	unsigned char	res36[0xc];
    390. 

  390. 	unsigned int	pad_retention_mmc2_sys_pwr_reg;
    391. 

  391. 	unsigned int	pad_retention_mmc3_sys_pwr_reg;
    392. 

  392. 	unsigned int	pad_retention_gpio_sys_pwr_reg;
    393. 

  393. 	unsigned int	pad_retention_uart_sys_pwr_reg;
    394. 

  394. 	unsigned int	pad_retention_mmc0_sys_pwr_reg;
    395. 

  395. 	unsigned int	pad_retention_mmc1_sys_pwr_reg;
    396. 

  396. 	unsigned int	pad_retention_ebia_sys_pwr_reg;
    397. 

  397. 	unsigned int	pad_retention_ebib_sys_pwr_reg;
    398. 

  398. 	unsigned int	pad_retention_spi_sys_pwr_reg;
    399. 

  399. 	unsigned int	pad_retention_gpio_dmc_sys_pwr_reg;
    400. 

  400. 	unsigned int	pad_isolation_sys_pwr_reg;
    401. 

  401. 	unsigned char	res37[0xc];
    402. 

  402. 	unsigned int	pad_isolation_dmc_sys_pwr_reg;
    403. 

  403. 	unsigned char	res38[0xc];
    404. 

  404. 	unsigned int	pad_alv_sel_sys_pwr_reg;
    405. 

  405. 	unsigned char	res39[0x20];
    406. 

  406. 	unsigned int	xxti_sys_pwr_reg;
    407. 

  407. 	unsigned char	res40[0x38];
    408. 

  408. 	unsigned int	ext_regulator_sys_pwr_reg;
    409. 

  409. 	unsigned char	res41[0x3c];
    410. 

  410. 	unsigned int	gpio_mode_sys_pwr_reg;
    411. 

  411. 	unsigned char	res42[0x1c];
    412. 

  412. 	unsigned int	gpio_mode_dmc_sys_pwr_reg;
    413. 

  413. 	unsigned char	res43[0x1c];
    414. 

  414. 	unsigned int	gpio_mode_mau_sys_pwr_reg;
    415. 

  415. 	unsigned int	top_asb_reset_sys_pwr_reg;
    416. 

  416. 	unsigned int	top_asb_isolation_sys_pwr_reg;
    417. 

  417. 	unsigned char	res44[0xb4];
    418. 

  418. 	unsigned int	gscl_sys_pwr_reg;
    419. 

  419. 	unsigned int	isp_sys_pwr_reg;
    420. 

  420. 	unsigned int	mfc_sys_pwr_reg;
    421. 

  421. 	unsigned int	g3d_sys_pwr_reg;
    422. 

  422. 	unsigned char	res45[0x4];
    423. 

  423. 	unsigned int	disp1_sys_pwr_reg;
    424. 

  424. 	unsigned int	mau_sys_pwr_reg;
    425. 

  425. 	unsigned char	res46[0x64];
    426. 

  426. 	unsigned int	cmu_clkstop_gscl_sys_pwr_reg;
    427. 

  427. 	unsigned int	cmu_clkstop_isp_sys_pwr_reg;
    428. 

  428. 	unsigned int	cmu_clkstop_mfc_sys_pwr_reg;
    429. 

  429. 	unsigned int	cmu_clkstop_g3d_sys_pwr_reg;
    430. 

  430. 	unsigned char	res47[0x4];
    431. 

  431. 	unsigned int	cmu_clkstop_disp1_sys_pwr_reg;
    432. 

  432. 	unsigned int	cmu_clkstop_mau_sys_pwr_reg;
    433. 

  433. 	unsigned char	res48[0x24];
    434. 

  434. 	unsigned int	cmu_sysclk_gscl_sys_pwr_reg;
    435. 

  435. 	unsigned int	cmu_sysclk_isp_sys_pwr_reg;
    436. 

  436. 	unsigned int	cmu_sysclk_mfc_sys_pwr_reg;
    437. 

  437. 	unsigned int	cmu_sysclk_g3d_sys_pwr_reg;
    438. 

  438. 	unsigned char	res49[0x4];
    439. 

  439. 	unsigned int	cmu_sysclk_disp1_sys_pwr_reg;
    440. 

  440. 	unsigned int	cmu_sysclk_mau_sys_pwr_reg;
    441. 

  441. 	unsigned char	res50[0xa4];
    442. 

  442. 	unsigned int	cmu_reset_gscl_sys_pwr_reg;
    443. 

  443. 	unsigned int	cmu_reset_isp_sys_pwr_reg;
    444. 

  444. 	unsigned int	cmu_reset_mfc_sys_pwr_reg;
    445. 

  445. 	unsigned int	cmu_reset_g3d_sys_pwr_reg;
    446. 

  446. 	unsigned char	res51[0x4];
    447. 

  447. 	unsigned int	cmu_reset_disp1_sys_pwr_reg;
    448. 

  448. 	unsigned int	cmu_reset_mau_sys_pwr_reg;
    449. 

  449. 	unsigned char	res52[0xa64];
    450. 

  450. 	unsigned int	arm_core0_configuration;
    451. 

  451. 	unsigned int	arm_core0_status;
    452. 

  452. 	unsigned int	arm_core0_option;
    453. 

  453. 	unsigned char	res53[0x14];
    454. 

  454. 	unsigned int	dis_irq_arm_core0_local_configuration;
    455. 

  455. 	unsigned int	dis_irq_arm_core0_local_status;
    456. 

  456. 	unsigned int	dis_irq_arm_core0_local_option;
    457. 

  457. 	unsigned char	res54[0x14];
    458. 

  458. 	unsigned int	dis_irq_arm_core0_central_configuration;
    459. 

  459. 	unsigned int	dis_irq_arm_core0_central_status;
    460. 

  460. 	unsigned int	dis_irq_arm_core0_central_option;
    461. 

  461. 	unsigned char	res55[0x34];
    462. 

  462. 	unsigned int	arm_core1_configuration;
    463. 

  463. 	unsigned int	arm_core1_status;
    464. 

  464. 	unsigned int	arm_core1_option;
    465. 

  465. 	unsigned char	res56[0x14];
    466. 

  466. 	unsigned int	dis_irq_arm_core1_local_configuration;
    467. 

  467. 	unsigned int	dis_irq_arm_core1_local_status;
    468. 

  468. 	unsigned int	dis_irq_arm_core1_local_option;
    469. 

  469. 	unsigned char	res57[0x14];
    470. 

  470. 	unsigned int	dis_irq_arm_core1_central_configuration;
    471. 

  471. 	unsigned int	dis_irq_arm_core1_central_status;
    472. 

  472. 	unsigned int	dis_irq_arm_core1_central_option;
    473. 

  473. 	unsigned char	res58[0x134];
    474. 

  474. 	unsigned int	fsys_arm_configuration;
    475. 

  475. 	unsigned int	fsys_arm_status;
    476. 

  476. 	unsigned int	fsys_arm_option;
    477. 

  477. 	unsigned char	res59[0x14];
    478. 

  478. 	unsigned int	dis_irq_fsys_arm_local_configuration;
    479. 

  479. 	unsigned int	dis_irq_fsys_arm_local_status;
    480. 

  480. 	unsigned int	dis_irq_fsys_arm_local_option;
    481. 

  481. 	unsigned char	res60[0x14];
    482. 

  482. 	unsigned int	dis_irq_fsys_arm_central_configuration;
    483. 

  483. 	unsigned int	dis_irq_fsys_arm_central_status;
    484. 

  484. 	unsigned int	dis_irq_fsys_arm_central_option;
    485. 

  485. 	unsigned char	res61[0x34];
    486. 

  486. 	unsigned int	isp_arm_configuration;
    487. 

  487. 	unsigned int	isp_arm_status;
    488. 

  488. 	unsigned int	isp_arm_option;
    489. 

  489. 	unsigned char	res62[0x14];
    490. 

  490. 	unsigned int	dis_irq_isp_arm_local_configuration;
    491. 

  491. 	unsigned int	dis_irq_isp_arm_local_status;
    492. 

  492. 	unsigned int	dis_irq_isp_arm_local_option;
    493. 

  493. 	unsigned char	res63[0x14];
    494. 

  494. 	unsigned int	dis_irq_isp_arm_central_configuration;
    495. 

  495. 	unsigned int	dis_irq_isp_arm_central_status;
    496. 

  496. 	unsigned int	dis_irq_isp_arm_central_option;
    497. 

  497. 	unsigned char	res64[0x134];
    498. 

  498. 	unsigned int	arm_common_configuration;
    499. 

  499. 	unsigned int	arm_common_status;
    500. 

  500. 	unsigned int	arm_common_option;
    501. 

  501. 	unsigned char	res65[0x1f4];
    502. 

  502. 	unsigned int	arm_l2_configuration;
    503. 

  503. 	unsigned int	arm_l2_status;
    504. 

  504. 	unsigned int	arm_l2_option;
    505. 

  505. 	unsigned char	res66[0x1f4];
    506. 

  506. 	unsigned int	cmu_aclkstop_configuration;
    507. 

  507. 	unsigned int	cmu_aclkstop_status;
    508. 

  508. 	unsigned int	cmu_aclkstop_option;
    509. 

  509. 	unsigned char	res67[0x14];
    510. 

  510. 	unsigned int	cmu_sclkstop_configuration;
    511. 

  511. 	unsigned int	cmu_sclkstop_status;
    512. 

  512. 	unsigned int	cmu_sclkstop_option;
    513. 

  513. 	unsigned char	res68[0x34];
    514. 

  514. 	unsigned int	cmu_reset_configuration;
    515. 

  515. 	unsigned int	cmu_reset_status;
    516. 

  516. 	unsigned int	cmu_reset_option;
    517. 

  517. 	unsigned char	res69[0x94];
    518. 

  518. 	unsigned int	cmu_aclkstop_dmc_configuration;
    519. 

  519. 	unsigned int	cmu_aclkstop_dmc_status;
    520. 

  520. 	unsigned int	cmu_aclkstop_dmc_option;
    521. 

  521. 	unsigned char	res70[0x14];
    522. 

  522. 	unsigned int	cmu_sclkstop_dmc_configuration;
    523. 

  523. 	unsigned int	cmu_sclkstop_dmc_status;
    524. 

  524. 	unsigned int	cmu_sclkstop_dmc_option;
    525. 

  525. 	unsigned char	res71[0x34];
    526. 

  526. 	unsigned int	cmu_reset_dmc_configuration;
    527. 

  527. 	unsigned int	cmu_reset_dmc_status;
    528. 

  528. 	unsigned int	cmu_reset_dmc_option;
    529. 

  529. 	unsigned char	res72[0x54];
    530. 

  530. 	unsigned int	ddrphy_dlllock_configuration;
    531. 

  531. 	unsigned int	ddrphy_dlllock_status;
    532. 

  532. 	unsigned int	ddrphy_dlllock_option;
    533. 

  533. 	unsigned char	res73[0x34];
    534. 

  534. 	unsigned int	apll_sysclk_configuration;
    535. 

  535. 	unsigned int	apll_sysclk_status;
    536. 

  536. 	unsigned int	apll_sysclk_option;
    537. 

  537. 	unsigned char	res74[0x18];
    538. 

  538. 	unsigned int	mpll_sysclk_status;
    539. 

  539. 	unsigned int	mpll_sysclk_option;
    540. 

  540. 	unsigned char	res75[0x14];
    541. 

  541. 	unsigned int	vpll_sysclk_configuration;
    542. 

  542. 	unsigned int	vpll_sysclk_status;
    543. 

  543. 	unsigned int	vpll_sysclk_option;
    544. 

  544. 	unsigned char	res76[0x14];
    545. 

  545. 	unsigned int	epll_sysclk_configuration;
    546. 

  546. 	unsigned int	epll_sysclk_status;
    547. 

  547. 	unsigned int	epll_sysclk_option;
    548. 

  548. 	unsigned char	res77[0x14];
    549. 

  549. 	unsigned int	bpll_sysclk_configuration;
    550. 

  550. 	unsigned int	bpll_sysclk_status;
    551. 

  551. 	unsigned int	bpll_sysclk_option;
    552. 

  552. 	unsigned char	res78[0x14];
    553. 

  553. 	unsigned int	cpll_sysclk_configuration;
    554. 

  554. 	unsigned int	cpll_sysclk_status;
    555. 

  555. 	unsigned int	cpll_sysclk_option;
    556. 

  556. 	unsigned char	res79[0x14];
    557. 

  557. 	unsigned int	gpll_sysclk_configuration;
    558. 

  558. 	unsigned int	gpll_sysclk_status;
    559. 

  559. 	unsigned int	gpll_sysclk_option;
    560. 

  560. 	unsigned char	res80[0x54];
    561. 

  561. 	unsigned int	mplluser_sysclk_configuration;
    562. 

  562. 	unsigned int	mplluser_sysclk_status;
    563. 

  563. 	unsigned int	mplluser_sysclk_option;
    564. 

  564. 	unsigned char	res81[0x54];
    565. 

  565. 	unsigned int	bplluser_sysclk_configuration;
    566. 

  566. 	unsigned int	bplluser_sysclk_status;
    567. 

  567. 	unsigned int	bplluser_sysclk_option;
    568. 

  568. 	unsigned char	res82[0x74];
    569. 

  569. 	unsigned int	top_bus_configuration;
    570. 

  570. 	unsigned int	top_bus_status;
    571. 

  571. 	unsigned int	top_bus_option;
    572. 

  572. 	unsigned char	res83[0x14];
    573. 

  573. 	unsigned int	top_retention_configuration;
    574. 

  574. 	unsigned int	top_retention_status;
    575. 

  575. 	unsigned int	top_retention_option;
    576. 

  576. 	unsigned char	res84[0x14];
    577. 

  577. 	unsigned int	top_pwr_configuration;
    578. 

  578. 	unsigned int	top_pwr_status;
    579. 

  579. 	unsigned int	top_pwr_option;
    580. 

  580. 	unsigned char	res85[0x34];
    581. 

  581. 	unsigned int	top_bus_dmc_configuration;
    582. 

  582. 	unsigned int	top_bus_dmc_status;
    583. 

  583. 	unsigned int	top_bus_dmc_option;
    584. 

  584. 	unsigned char	res86[0x14];
    585. 

  585. 	unsigned int	top_retention_dmc_configuration;
    586. 

  586. 	unsigned int	top_retention_dmc_status;
    587. 

  587. 	unsigned int	top_retention_dmc_option;
    588. 

  588. 	unsigned char	res87[0x14];
    589. 

  589. 	unsigned int	top_pwr_dmc_configuration;
    590. 

  590. 	unsigned int	top_pwr_dmc_status;
    591. 

  591. 	unsigned int	top_pwr_dmc_option;
    592. 

  592. 	unsigned char	res88[0x34];
    593. 

  593. 	unsigned int	logic_reset_configuration;
    594. 

  594. 	unsigned int	logic_reset_status;
    595. 

  595. 	unsigned int	logic_reset_option;
    596. 

  596. 	unsigned char	res89[0x14];
    597. 

  597. 	unsigned int	oscclk_gate_configuration;
    598. 

  598. 	unsigned int	oscclk_gate_status;
    599. 

  599. 	unsigned int	oscclk_gate_option;
    600. 

  600. 	unsigned char	res90[0x54];
    601. 

  601. 	unsigned int	logic_reset_dmc_configuration;
    602. 

  602. 	unsigned int	logic_reset_dmc_status;
    603. 

  603. 	unsigned int	logic_reset_dmc_option;
    604. 

  604. 	unsigned char	res91[0x14];
    605. 

  605. 	unsigned int	oscclk_gate_dmc_configuration;
    606. 

  606. 	unsigned int	oscclk_gate_dmc_status;
    607. 

  607. 	unsigned int	oscclk_gate_dmc_option;
    608. 

  608. 	unsigned char	res92[0x54];
    609. 

  609. 	unsigned int	usbotg_mem_configuration;
    610. 

  610. 	unsigned int	usbotg_mem_status;
    611. 

  611. 	unsigned int	usbotg_mem_option;
    612. 

  612. 	unsigned char	res93[0x34];
    613. 

  613. 	unsigned int	g2d_mem_configuration;
    614. 

  614. 	unsigned int	g2d_mem_status;
    615. 

  615. 	unsigned int	g2d_mem_option;
    616. 

  616. 	unsigned char	res94[0x14];
    617. 

  617. 	unsigned int	usbdrd_mem_configuration;
    618. 

  618. 	unsigned int	usbdrd_mem_status;
    619. 

  619. 	unsigned int	usbdrd_mem_option;
    620. 

  620. 	unsigned char	res95[0x14];
    621. 

  621. 	unsigned int	efnand_mem_configuration;
    622. 

  622. 	unsigned int	efnand_mem_status;
    623. 

  623. 	unsigned int	efnand_mem_option;
    624. 

  624. 	unsigned char	res96[0x14];
    625. 

  625. 	unsigned int	cssys_mem_configuration;
    626. 

  626. 	unsigned int	cssys_mem_status;
    627. 

  627. 	unsigned int	cssys_mem_option;
    628. 

  628. 	unsigned char	res97[0x14];
    629. 

  629. 	unsigned int	secss_mem_configuration;
    630. 

  630. 	unsigned int	secss_mem_status;
    631. 

  631. 	unsigned int	secss_mem_option;
    632. 

  632. 	unsigned char	res98[0x14];
    633. 

  633. 	unsigned int	rotator_mem_configuration;
    634. 

  634. 	unsigned int	rotator_mem_status;
    635. 

  635. 	unsigned int	rotator_mem_option;
    636. 

  636. 	unsigned char	res99[0x14];
    637. 

  637. 	unsigned int	intram_mem_configuration;
    638. 

  638. 	unsigned int	intram_mem_status;
    639. 

  639. 	unsigned int	intram_mem_option;
    640. 

  640. 	unsigned char	res100[0x14];
    641. 

  641. 	unsigned int	introm_mem_configuration;
    642. 

  642. 	unsigned int	introm_mem_status;
    643. 

  643. 	unsigned int	introm_mem_option;
    644. 

  644. 	unsigned char	res101[0x14];
    645. 

  645. 	unsigned int	jpeg_mem_configuration;
    646. 

  646. 	unsigned int	jpeg_mem_status;
    647. 

  647. 	unsigned int	jpeg_mem_option;
    648. 

  648. 	unsigned char	res102[0x14];
    649. 

  649. 	unsigned int	hsi_mem_configuration;
    650. 

  650. 	unsigned int	hsi_mem_status;
    651. 

  651. 	unsigned int	hsi_mem_option;
    652. 

  652. 	unsigned char	res103[0x34];
    653. 

  653. 	unsigned int	mcuiop_mem_configuration;
    654. 

  654. 	unsigned int	mcuiop_mem_status;
    655. 

  655. 	unsigned int	mcuiop_mem_option;
    656. 

  656. 	unsigned char	res104[0x14];
    657. 

  657. 	unsigned int	sata_mem_configuration;
    658. 

  658. 	unsigned int	sata_mem_status;
    659. 

  659. 	unsigned int	sata_mem_option;
    660. 

  660. 	unsigned char	res105[0x34];
    661. 

  661. 	unsigned int	pad_retention_dram_configuration;
    662. 

  662. 	unsigned int	pad_retention_dram_status;
    663. 

  663. 	unsigned int	pad_retention_dram_option;
    664. 

  664. 	unsigned char	res106[0x14];
    665. 

  665. 	unsigned int	pad_retention_mau_configuration;
    666. 

  666. 	unsigned int	pad_retention_mau_status;
    667. 

  667. 	unsigned int	pad_retention_mau_option;
    668. 

  668. 	unsigned char	res107[0x14];
    669. 

  669. 	unsigned int	pad_retention_jtag_configuration;
    670. 

  670. 	unsigned int	pad_retention_jtag_status;
    671. 

  671. 	unsigned int	pad_retention_jtag_option;
    672. 

  672. 	unsigned char	res108[0x74];
    673. 

  673. 	unsigned int	pad_retention_mmc2_configuration;
    674. 

  674. 	unsigned int	pad_retention_mmc2_status;
    675. 

  675. 	unsigned int	pad_retention_mmc2_option;
    676. 

  676. 	unsigned char	res109[0x14];
    677. 

  677. 	unsigned int	pad_retention_mmc3_configuration;
    678. 

  678. 	unsigned int	pad_retention_mmc3_status;
    679. 

  679. 	unsigned int	pad_retention_mmc3_option;
    680. 

  680. 	unsigned char	res110[0x14];
    681. 

  681. 	unsigned int	pad_retention_gpio_configuration;
    682. 

  682. 	unsigned int	pad_retention_gpio_status;
    683. 

  683. 	unsigned int	pad_retention_gpio_option;
    684. 

  684. 	unsigned char	res111[0x14];
    685. 

  685. 	unsigned int	pad_retention_uart_configuration;
    686. 

  686. 	unsigned int	pad_retention_uart_status;
    687. 

  687. 	unsigned int	pad_retention_uart_option;
    688. 

  688. 	unsigned char	res112[0x14];
    689. 

  689. 	unsigned int	pad_retention_mmc0_configuration;
    690. 

  690. 	unsigned int	pad_retention_mmc0_status;
    691. 

  691. 	unsigned int	pad_retention_mmc0_option;
    692. 

  692. 	unsigned char	res113[0x14];
    693. 

  693. 	unsigned int	pad_retention_mmc1_configuration;
    694. 

  694. 	unsigned int	pad_retention_mmc1_status;
    695. 

  695. 	unsigned int	pad_retention_mmc1_option;
    696. 

  696. 	unsigned char	res114[0x14];
    697. 

  697. 	unsigned int	pad_retention_ebia_configuration;
    698. 

  698. 	unsigned int	pad_retention_ebia_status;
    699. 

  699. 	unsigned int	pad_retention_ebia_option;
    700. 

  700. 	unsigned char	res115[0x14];
    701. 

  701. 	unsigned int	pad_retention_ebib_configuration;
    702. 

  702. 	unsigned int	pad_retention_ebib_status;
    703. 

  703. 	unsigned int	pad_retention_ebib_option;
    704. 

  704. 	unsigned char	res116[0x14];
    705. 

  705. 	unsigned int	pad_retention_spi_configuration;
    706. 

  706. 	unsigned int	pad_retention_spi_status;
    707. 

  707. 	unsigned int	pad_retention_spi_option;
    708. 

  708. 	unsigned char	res117[0x14];
    709. 

  709. 	unsigned int	pad_retention_gpio_dmc_configuration;
    710. 

  710. 	unsigned int	pad_retention_gpio_dmc_status;
    711. 

  711. 	unsigned int	pad_retention_gpio_dmc_option;
    712. 

  712. 	unsigned char	res118[0x14];
    713. 

  713. 	unsigned int	pad_isolation_configuration;
    714. 

  714. 	unsigned int	pad_isolation_status;
    715. 

  715. 	unsigned int	pad_isolation_option;
    716. 

  716. 	unsigned char	res119[0x74];
    717. 

  717. 	unsigned int	pad_isolation_dmc_configuration;
    718. 

  718. 	unsigned int	pad_isolation_dmc_status;
    719. 

  719. 	unsigned int	pad_isolation_dmc_option;
    720. 

  720. 	unsigned char	res120[0x74];
    721. 

  721. 	unsigned int	pad_alv_sel_configuration;
    722. 

  722. 	unsigned int	pad_alv_sel_status;
    723. 

  723. 	unsigned int	pad_alv_sel_option0;
    724. 

  724. 	unsigned int	ps_hold_control;
    725. 

  725. 	unsigned char	res130[0x110];
    726. 

  726. 	unsigned int	xxti_configuration;
    727. 

  727. 	unsigned int	xxti_status;
    728. 

  728. 	unsigned int	xxti_option;
    729. 

  729. 	unsigned char	res131[0x10];
    730. 

  730. 	unsigned int	xxti_duration3;
    731. 

  731. 	unsigned char	res132[0x1c0];
    732. 

  732. 	unsigned int	ext_regulator_configuration;
    733. 

  733. 	unsigned int	ext_regulator_status;
    734. 

  734. 	unsigned int	ext_regulator_option;
    735. 

  735. 	unsigned char	res133[0x10];
    736. 

  736. 	unsigned int	ext_regulator_duration3;
    737. 

  737. 	unsigned char	res134[0x1e0];
    738. 

  738. 	unsigned int	gpio_mode_configuration;
    739. 

  739. 	unsigned int	gpio_mode_status;
    740. 

  740. 	unsigned int	gpio_mode_option;
    741. 

  741. 	unsigned char	res135[0xf4];
    742. 

  742. 	unsigned int	gpio_mode_dmc_configuration;
    743. 

  743. 	unsigned int	gpio_mode_dmc_status;
    744. 

  744. 	unsigned int	gpio_mode_dmc_option;
    745. 

  745. 	unsigned char	res136[0xd4];
    746. 

  746. 	unsigned int	gpio_mode_mau_configuration;
    747. 

  747. 	unsigned int	gpio_mode_mau_status;
    748. 

  748. 	unsigned int	gpio_mode_mau_option;
    749. 

  749. 	unsigned char	res137[0x14];
    750. 

  750. 	unsigned int	top_asb_reset_configuration;
    751. 

  751. 	unsigned int	top_asb_reset_status;
    752. 

  752. 	unsigned int	top_asb_reset_option;
    753. 

  753. 	unsigned char	res138[0x14];
    754. 

  754. 	unsigned int	top_asb_isolation_configuration;
    755. 

  755. 	unsigned int	top_asb_isolation_status;
    756. 

  756. 	unsigned int	top_asb_isolation_option;
    757. 

  757. 	unsigned char	res139[0x5d4];
    758. 

  758. 	unsigned int	gscl_configuration;
    759. 

  759. 	unsigned int	gscl_status;
    760. 

  760. 	unsigned int	gscl_option;
    761. 

  761. 	unsigned char	res140[0x14];
    762. 

  762. 	unsigned int	isp_configuration;
    763. 

  763. 	unsigned int	isp_status;
    764. 

  764. 	unsigned int	isp_option;
    765. 

  765. 	unsigned char	res141[0x14];
    766. 

  766. 	unsigned int	mfc_configuration;
    767. 

  767. 	unsigned int	mfc_status;
    768. 

  768. 	unsigned int	mfc_option;
    769. 

  769. 	unsigned char	res142[0x14];
    770. 

  770. 	unsigned int	g3d_configuration;
    771. 

  771. 	unsigned int	g3d_status;
    772. 

  772. 	unsigned int	g3d_option;
    773. 

  773. 	unsigned char	res143[0x34];
    774. 

  774. 	unsigned int	disp1_configuration;
    775. 

  775. 	unsigned int	disp1_status;
    776. 

  776. 	unsigned int	disp1_option;
    777. 

  777. 	unsigned char	res144[0x14];
    778. 

  778. 	unsigned int	mau_configuration;
    779. 

  779. 	unsigned int	mau_status;
    780. 

  780. 	unsigned int	mau_option;
    781. 

  781. 	unsigned char	res145[0x334];
    782. 

  782. 	unsigned int	cmu_clkstop_gscl_configuration;
    783. 

  783. 	unsigned int	cmu_clkstop_gscl_status;
    784. 

  784. 	unsigned int	cmu_clkstop_gscl_option;
    785. 

  785. 	unsigned char	res146[0x14];
    786. 

  786. 	unsigned int	cmu_clkstop_isp_configuration;
    787. 

  787. 	unsigned int	cmu_clkstop_isp_status;
    788. 

  788. 	unsigned int	cmu_clkstop_isp_option;
    789. 

  789. 	unsigned char	res147[0x14];
    790. 

  790. 	unsigned int	cmu_clkstop_mfc_configuration;
    791. 

  791. 	unsigned int	cmu_clkstop_mfc_status;
    792. 

  792. 	unsigned int	cmu_clkstop_mfc_option;
    793. 

  793. 	unsigned char	res148[0x14];
    794. 

  794. 	unsigned int	cmu_clkstop_g3d_configuration;
    795. 

  795. 	unsigned int	cmu_clkstop_g3d_status;
    796. 

  796. 	unsigned int	cmu_clkstop_g3d_option;
    797. 

  797. 	unsigned char	res149[0x34];
    798. 

  798. 	unsigned int	cmu_clkstop_disp1_configuration;
    799. 

  799. 	unsigned int	cmu_clkstop_disp1_status;
    800. 

  800. 	unsigned int	cmu_clkstop_disp1_option;
    801. 

  801. 	unsigned char	res150[0x14];
    802. 

  802. 	unsigned int	cmu_clkstop_mau_configuration;
    803. 

  803. 	unsigned int	cmu_clkstop_mau_status;
    804. 

  804. 	unsigned int	cmu_clkstop_mau_option;
    805. 

  805. 	unsigned char	res151[0x134];
    806. 

  806. 	unsigned int	cmu_sysclk_gscl_configuration;
    807. 

  807. 	unsigned int	cmu_sysclk_gscl_status;
    808. 

  808. 	unsigned int	cmu_sysclk_gscl_option;
    809. 

  809. 	unsigned char	res152[0x18];
    810. 

  810. 	unsigned int	cmu_sysclk_isp_status;
    811. 

  811. 	unsigned int	cmu_sysclk_isp_option;
    812. 

  812. 	unsigned char	res153[0x18];
    813. 

  813. 	unsigned int	cmu_sysclk_mfc_status;
    814. 

  814. 	unsigned int	cmu_sysclk_mfc_option;
    815. 

  815. 	unsigned char	res154[0x18];
    816. 

  816. 	unsigned int	cmu_sysclk_g3d_status;
    817. 

  817. 	unsigned int	cmu_sysclk_g3d_option;
    818. 

  818. 	unsigned char	res155[0x38];
    819. 

  819. 	unsigned int	cmu_sysclk_disp1_status;
    820. 

  820. 	unsigned int	cmu_sysclk_disp1_option;
    821. 

  821. 	unsigned char	res156[0x18];
    822. 

  822. 	unsigned int	cmu_sysclk_mau_status;
    823. 

  823. 	unsigned int	cmu_sysclk_mau_option;
    824. 

  824. 	unsigned char	res157[0x534];
    825. 

  825. 	unsigned int	cmu_reset_gscl_configuration;
    826. 

  826. 	unsigned int	cmu_reset_gscl_status;
    827. 

  827. 	unsigned int	cmu_reset_gscl_option;
    828. 

  828. 	unsigned char	res158[0x14];
    829. 

  829. 	unsigned int	cmu_reset_isp_configuration;
    830. 

  830. 	unsigned int	cmu_reset_isp_status;
    831. 

  831. 	unsigned int	cmu_reset_isp_option;
    832. 

  832. 	unsigned char	res159[0x14];
    833. 

  833. 	unsigned int	cmu_reset_mfc_configuration;
    834. 

  834. 	unsigned int	cmu_reset_mfc_status;
    835. 

  835. 	unsigned int	cmu_reset_mfc_option;
    836. 

  836. 	unsigned char	res160[0x14];
    837. 

  837. 	unsigned int	cmu_reset_g3d_configuration;
    838. 

  838. 	unsigned int	cmu_reset_g3d_status;
    839. 

  839. 	unsigned int	cmu_reset_g3d_option;
    840. 

  840. 	unsigned char	res161[0x34];
    841. 

  841. 	unsigned int	cmu_reset_disp1_configuration;
    842. 

  842. 	unsigned int	cmu_reset_disp1_status;
    843. 

  843. 	unsigned int	cmu_reset_disp1_option;
    844. 

  844. 	unsigned char	res162[0x14];
    845. 

  845. 	unsigned int	cmu_reset_mau_configuration;
    846. 

  846. 	unsigned int	cmu_reset_mau_status;
    847. 

  847. 	unsigned int	cmu_reset_mau_option;
    848. 

  848. 	unsigned char	res163[0x24];
    849. 

  849. };
    850. 

  850. #endif	/* __ASSEMBLY__ */
    851. 

  851. 

  852. void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable);
    853. 

  853. 

  854. #define EXYNOS_MIPI_PHY_ENABLE		(1 << 0)
    855. 

  855. #define EXYNOS_MIPI_PHY_SRESETN		(1 << 1)
    856. 

  856. #define EXYNOS_MIPI_PHY_MRESETN		(1 << 2)
    857. 

  857. 

  858. void set_usbhost_phy_ctrl(unsigned int enable);
    859. 

  859. 

  860. /* Enables hardware tripping to power off the system when TMU fails */
    861. 

  861. void set_hw_thermal_trip(void);
    862. 

  862. 

  863. #define POWER_USB_HOST_PHY_CTRL_EN		(1 << 0)
    864. 

  864. #define POWER_USB_HOST_PHY_CTRL_DISABLE		(0 << 0)
    865. 

  865. 

  866. void set_dp_phy_ctrl(unsigned int enable);
    867. 

  867. 

  868. #define EXYNOS_DP_PHY_ENABLE		(1 << 0)
    869. 

  869. 

  870. #define EXYNOS_PS_HOLD_CONTROL_DATA_HIGH	(1 << 8)
    871. 

  871. #define POWER_ENABLE_HW_TRIP			(1UL << 31)
    872. 

  872. 

  873. /*
    874. 

  874.  * Set ps_hold data driving value high
    875. 

  875.  * This enables the machine to stay powered on
    876. 

  876.  * after the initial power-on condition goes away
    877. 

  877.  * (e.g. power button).
    878. 

  878.  */
    879. 

  879. void set_ps_hold_ctrl(void);
    880. 

  880. 

  881. /* PMU_DEBUG bits [12:8] = 0x1000 selects XXTI clock source */
    882. 

  882. #define PMU_DEBUG_XXTI                          0x1000
    883. 

  883. /* Mask bit[12:8] for xxti clock selection */
    884. 

  884. #define PMU_DEBUG_CLKOUT_SEL_MASK               0x1f00
    885. 

  885. 

  886. /*
    887. 

  887.  * Pmu debug is used for xclkout, enable xclkout with
    888. 

  888.  * source as XXTI
    889. 

  889.  */
    890. 

  890. void set_xclkout(void);
    891. 

  891. #endif
    892.