slicetimer.c 2.0 KB

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  1. /*
  2. * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc.
  3. * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
  4. *
  5. * SPDX-License-Identifier: GPL-2.0+
  6. */
  7. #include <common.h>
  8. #include <asm/timer.h>
  9. #include <asm/immap.h>
  10. #include <asm/io.h>
  11. DECLARE_GLOBAL_DATA_PTR;
  12. static ulong timestamp;
  13. #if defined(CONFIG_SLTTMR)
  14. #ifndef CONFIG_SYS_UDELAY_BASE
  15. # error "uDelay base not defined!"
  16. #endif
  17. #if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK)
  18. # error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
  19. #endif
  20. extern void dtimer_intr_setup(void);
  21. void __udelay(unsigned long usec)
  22. {
  23. slt_t *timerp = (slt_t *) (CONFIG_SYS_UDELAY_BASE);
  24. u32 now, freq;
  25. /* 1 us period */
  26. freq = CONFIG_SYS_TIMER_PRESCALER;
  27. /* Disable */
  28. out_be32(&timerp->cr, 0);
  29. out_be32(&timerp->tcnt, usec * freq);
  30. out_be32(&timerp->cr, SLT_CR_TEN);
  31. now = in_be32(&timerp->cnt);
  32. while (now != 0)
  33. now = in_be32(&timerp->cnt);
  34. setbits_be32(&timerp->sr, SLT_SR_ST);
  35. out_be32(&timerp->cr, 0);
  36. }
  37. void dtimer_interrupt(void *not_used)
  38. {
  39. slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
  40. /* check for timer interrupt asserted */
  41. if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) {
  42. setbits_be32(&timerp->sr, SLT_SR_ST);
  43. timestamp++;
  44. return;
  45. }
  46. }
  47. int timer_init(void)
  48. {
  49. slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
  50. timestamp = 0;
  51. /* disable timer */
  52. out_be32(&timerp->cr, 0);
  53. out_be32(&timerp->tcnt, 0);
  54. /* clear status */
  55. out_be32(&timerp->sr, SLT_SR_BE | SLT_SR_ST);
  56. /* initialize and enable timer interrupt */
  57. irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0);
  58. /* Interrupt every ms */
  59. out_be32(&timerp->tcnt, 1000 * CONFIG_SYS_TIMER_PRESCALER);
  60. dtimer_intr_setup();
  61. /* set a period of 1us, set timer mode to restart and
  62. enable timer and interrupt */
  63. out_be32(&timerp->cr, SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN);
  64. return 0;
  65. }
  66. ulong get_timer(ulong base)
  67. {
  68. return (timestamp - base);
  69. }
  70. #endif /* CONFIG_SLTTMR */