mvmfp.c 2.6 KB

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  1. /*
  2. * (C) Copyright 2010
  3. * Marvell Semiconductor <www.marvell.com>
  4. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>,
  5. *
  6. * See file CREDITS for list of people who contributed to this
  7. * project.
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. */
  24. #include <common.h>
  25. #include <asm/io.h>
  26. #include <mvmfp.h>
  27. #include <asm/arch/mfp.h>
  28. #ifdef CONFIG_ARMADA100
  29. #include <asm/arch/armada100.h>
  30. #elif defined(CONFIG_PANTHEON)
  31. #include <asm/arch/pantheon.h>
  32. #else
  33. #error Unsupported SoC...
  34. #endif
  35. /*
  36. * mfp_config
  37. *
  38. * On most of Marvell SoCs (ex. ARMADA100) there is Multi-Funtion-Pin
  39. * configuration registers to configure each GPIO/Function pin on the
  40. * SoC.
  41. *
  42. * This function reads the array of values for
  43. * MFPR_X registers and programms them into respective
  44. * Multi-Function Pin registers.
  45. * It supports - Alternate Function Selection programming.
  46. *
  47. * Whereas,
  48. * The Configureation value is constructed using MFP()
  49. * array consists of 32bit values as defined in MFP(xx,xx..) macro
  50. */
  51. void mfp_config(u32 *mfp_cfgs)
  52. {
  53. u32 *p_mfpr = NULL;
  54. u32 cfg_val, val;
  55. do {
  56. cfg_val = *mfp_cfgs++;
  57. /* exit if End of configuration table detected */
  58. if (cfg_val == MFP_EOC)
  59. break;
  60. p_mfpr = (u32 *)(MV_MFPR_BASE
  61. + MFP_REG_GET_OFFSET(cfg_val));
  62. /* Write a mfg register as per configuration */
  63. val = 0;
  64. if (cfg_val & MFP_AF_FLAG)
  65. /* Abstract and program Afternate-Func Selection */
  66. val |= cfg_val & MFP_AF_MASK;
  67. if (cfg_val & MFP_EDGE_FLAG)
  68. /* Abstract and program Edge configuration */
  69. val |= cfg_val & MFP_LPM_EDGE_MASK;
  70. if (cfg_val & MFP_DRIVE_FLAG)
  71. /* Abstract and program Drive configuration */
  72. val |= cfg_val & MFP_DRIVE_MASK;
  73. if (cfg_val & MFP_PULL_FLAG)
  74. /* Abstract and program Pullup/down configuration */
  75. val |= cfg_val & MFP_PULL_MASK;
  76. writel(val, p_mfpr);
  77. } while (1);
  78. /*
  79. * perform a read-back of any MFPR register to make sure the
  80. * previous writings are finished
  81. */
  82. readl(p_mfpr);
  83. }