phy.c 19 KB

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  1. /*
  2. * Generic PHY Management code
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. *
  6. * Copyright 2011 Freescale Semiconductor, Inc.
  7. * author Andy Fleming
  8. *
  9. * Based loosely off of Linux's PHY Lib
  10. */
  11. #include <config.h>
  12. #include <common.h>
  13. #include <malloc.h>
  14. #include <net.h>
  15. #include <command.h>
  16. #include <miiphy.h>
  17. #include <phy.h>
  18. #include <errno.h>
  19. #include <linux/err.h>
  20. #include <linux/compiler.h>
  21. /* Generic PHY support and helper functions */
  22. /**
  23. * genphy_config_advert - sanitize and advertise auto-negotation parameters
  24. * @phydev: target phy_device struct
  25. *
  26. * Description: Writes MII_ADVERTISE with the appropriate values,
  27. * after sanitizing the values to make sure we only advertise
  28. * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
  29. * hasn't changed, and > 0 if it has changed.
  30. */
  31. static int genphy_config_advert(struct phy_device *phydev)
  32. {
  33. u32 advertise;
  34. int oldadv, adv;
  35. int err, changed = 0;
  36. /* Only allow advertising what
  37. * this PHY supports */
  38. phydev->advertising &= phydev->supported;
  39. advertise = phydev->advertising;
  40. /* Setup standard advertisement */
  41. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  42. if (adv < 0)
  43. return adv;
  44. adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
  45. ADVERTISE_PAUSE_ASYM);
  46. if (advertise & ADVERTISED_10baseT_Half)
  47. adv |= ADVERTISE_10HALF;
  48. if (advertise & ADVERTISED_10baseT_Full)
  49. adv |= ADVERTISE_10FULL;
  50. if (advertise & ADVERTISED_100baseT_Half)
  51. adv |= ADVERTISE_100HALF;
  52. if (advertise & ADVERTISED_100baseT_Full)
  53. adv |= ADVERTISE_100FULL;
  54. if (advertise & ADVERTISED_Pause)
  55. adv |= ADVERTISE_PAUSE_CAP;
  56. if (advertise & ADVERTISED_Asym_Pause)
  57. adv |= ADVERTISE_PAUSE_ASYM;
  58. if (advertise & ADVERTISED_1000baseX_Half)
  59. adv |= ADVERTISE_1000XHALF;
  60. if (advertise & ADVERTISED_1000baseX_Full)
  61. adv |= ADVERTISE_1000XFULL;
  62. if (adv != oldadv) {
  63. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
  64. if (err < 0)
  65. return err;
  66. changed = 1;
  67. }
  68. /* Configure gigabit if it's supported */
  69. if (phydev->supported & (SUPPORTED_1000baseT_Half |
  70. SUPPORTED_1000baseT_Full)) {
  71. oldadv = adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
  72. if (adv < 0)
  73. return adv;
  74. adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
  75. if (advertise & SUPPORTED_1000baseT_Half)
  76. adv |= ADVERTISE_1000HALF;
  77. if (advertise & SUPPORTED_1000baseT_Full)
  78. adv |= ADVERTISE_1000FULL;
  79. if (adv != oldadv) {
  80. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000,
  81. adv);
  82. if (err < 0)
  83. return err;
  84. changed = 1;
  85. }
  86. }
  87. return changed;
  88. }
  89. /**
  90. * genphy_setup_forced - configures/forces speed/duplex from @phydev
  91. * @phydev: target phy_device struct
  92. *
  93. * Description: Configures MII_BMCR to force speed/duplex
  94. * to the values in phydev. Assumes that the values are valid.
  95. */
  96. static int genphy_setup_forced(struct phy_device *phydev)
  97. {
  98. int err;
  99. int ctl = 0;
  100. phydev->pause = phydev->asym_pause = 0;
  101. if (SPEED_1000 == phydev->speed)
  102. ctl |= BMCR_SPEED1000;
  103. else if (SPEED_100 == phydev->speed)
  104. ctl |= BMCR_SPEED100;
  105. if (DUPLEX_FULL == phydev->duplex)
  106. ctl |= BMCR_FULLDPLX;
  107. err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  108. return err;
  109. }
  110. /**
  111. * genphy_restart_aneg - Enable and Restart Autonegotiation
  112. * @phydev: target phy_device struct
  113. */
  114. int genphy_restart_aneg(struct phy_device *phydev)
  115. {
  116. int ctl;
  117. ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  118. if (ctl < 0)
  119. return ctl;
  120. ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
  121. /* Don't isolate the PHY if we're negotiating */
  122. ctl &= ~(BMCR_ISOLATE);
  123. ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
  124. return ctl;
  125. }
  126. /**
  127. * genphy_config_aneg - restart auto-negotiation or write BMCR
  128. * @phydev: target phy_device struct
  129. *
  130. * Description: If auto-negotiation is enabled, we configure the
  131. * advertising, and then restart auto-negotiation. If it is not
  132. * enabled, then we write the BMCR.
  133. */
  134. int genphy_config_aneg(struct phy_device *phydev)
  135. {
  136. int result;
  137. if (AUTONEG_ENABLE != phydev->autoneg)
  138. return genphy_setup_forced(phydev);
  139. result = genphy_config_advert(phydev);
  140. if (result < 0) /* error */
  141. return result;
  142. if (result == 0) {
  143. /* Advertisment hasn't changed, but maybe aneg was never on to
  144. * begin with? Or maybe phy was isolated? */
  145. int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  146. if (ctl < 0)
  147. return ctl;
  148. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  149. result = 1; /* do restart aneg */
  150. }
  151. /* Only restart aneg if we are advertising something different
  152. * than we were before. */
  153. if (result > 0)
  154. result = genphy_restart_aneg(phydev);
  155. return result;
  156. }
  157. /**
  158. * genphy_update_link - update link status in @phydev
  159. * @phydev: target phy_device struct
  160. *
  161. * Description: Update the value in phydev->link to reflect the
  162. * current link value. In order to do this, we need to read
  163. * the status register twice, keeping the second value.
  164. */
  165. int genphy_update_link(struct phy_device *phydev)
  166. {
  167. unsigned int mii_reg;
  168. /*
  169. * Wait if the link is up, and autonegotiation is in progress
  170. * (ie - we're capable and it's not done)
  171. */
  172. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  173. /*
  174. * If we already saw the link up, and it hasn't gone down, then
  175. * we don't need to wait for autoneg again
  176. */
  177. if (phydev->link && mii_reg & BMSR_LSTATUS)
  178. return 0;
  179. if ((mii_reg & BMSR_ANEGCAPABLE) && !(mii_reg & BMSR_ANEGCOMPLETE)) {
  180. int i = 0;
  181. printf("%s Waiting for PHY auto negotiation to complete",
  182. phydev->dev->name);
  183. while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
  184. /*
  185. * Timeout reached ?
  186. */
  187. if (i > PHY_ANEG_TIMEOUT) {
  188. printf(" TIMEOUT !\n");
  189. phydev->link = 0;
  190. return 0;
  191. }
  192. if (ctrlc()) {
  193. puts("user interrupt!\n");
  194. phydev->link = 0;
  195. return -EINTR;
  196. }
  197. if ((i++ % 500) == 0)
  198. printf(".");
  199. udelay(1000); /* 1 ms */
  200. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  201. }
  202. printf(" done\n");
  203. phydev->link = 1;
  204. } else {
  205. /* Read the link a second time to clear the latched state */
  206. mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  207. if (mii_reg & BMSR_LSTATUS)
  208. phydev->link = 1;
  209. else
  210. phydev->link = 0;
  211. }
  212. return 0;
  213. }
  214. /*
  215. * Generic function which updates the speed and duplex. If
  216. * autonegotiation is enabled, it uses the AND of the link
  217. * partner's advertised capabilities and our advertised
  218. * capabilities. If autonegotiation is disabled, we use the
  219. * appropriate bits in the control register.
  220. *
  221. * Stolen from Linux's mii.c and phy_device.c
  222. */
  223. int genphy_parse_link(struct phy_device *phydev)
  224. {
  225. int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  226. /* We're using autonegotiation */
  227. if (phydev->supported & SUPPORTED_Autoneg) {
  228. u32 lpa = 0;
  229. int gblpa = 0;
  230. u32 estatus = 0;
  231. /* Check for gigabit capability */
  232. if (phydev->supported & (SUPPORTED_1000baseT_Full |
  233. SUPPORTED_1000baseT_Half)) {
  234. /* We want a list of states supported by
  235. * both PHYs in the link
  236. */
  237. gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
  238. if (gblpa < 0) {
  239. debug("Could not read MII_STAT1000. Ignoring gigabit capability\n");
  240. gblpa = 0;
  241. }
  242. gblpa &= phy_read(phydev,
  243. MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
  244. }
  245. /* Set the baseline so we only have to set them
  246. * if they're different
  247. */
  248. phydev->speed = SPEED_10;
  249. phydev->duplex = DUPLEX_HALF;
  250. /* Check the gigabit fields */
  251. if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
  252. phydev->speed = SPEED_1000;
  253. if (gblpa & PHY_1000BTSR_1000FD)
  254. phydev->duplex = DUPLEX_FULL;
  255. /* We're done! */
  256. return 0;
  257. }
  258. lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
  259. lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
  260. if (lpa & (LPA_100FULL | LPA_100HALF)) {
  261. phydev->speed = SPEED_100;
  262. if (lpa & LPA_100FULL)
  263. phydev->duplex = DUPLEX_FULL;
  264. } else if (lpa & LPA_10FULL)
  265. phydev->duplex = DUPLEX_FULL;
  266. /*
  267. * Extended status may indicate that the PHY supports
  268. * 1000BASE-T/X even though the 1000BASE-T registers
  269. * are missing. In this case we can't tell whether the
  270. * peer also supports it, so we only check extended
  271. * status if the 1000BASE-T registers are actually
  272. * missing.
  273. */
  274. if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
  275. estatus = phy_read(phydev, MDIO_DEVAD_NONE,
  276. MII_ESTATUS);
  277. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
  278. ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
  279. phydev->speed = SPEED_1000;
  280. if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
  281. phydev->duplex = DUPLEX_FULL;
  282. }
  283. } else {
  284. u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
  285. phydev->speed = SPEED_10;
  286. phydev->duplex = DUPLEX_HALF;
  287. if (bmcr & BMCR_FULLDPLX)
  288. phydev->duplex = DUPLEX_FULL;
  289. if (bmcr & BMCR_SPEED1000)
  290. phydev->speed = SPEED_1000;
  291. else if (bmcr & BMCR_SPEED100)
  292. phydev->speed = SPEED_100;
  293. }
  294. return 0;
  295. }
  296. int genphy_config(struct phy_device *phydev)
  297. {
  298. int val;
  299. u32 features;
  300. /* For now, I'll claim that the generic driver supports
  301. * all possible port types */
  302. features = (SUPPORTED_TP | SUPPORTED_MII
  303. | SUPPORTED_AUI | SUPPORTED_FIBRE |
  304. SUPPORTED_BNC);
  305. /* Do we support autonegotiation? */
  306. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
  307. if (val < 0)
  308. return val;
  309. if (val & BMSR_ANEGCAPABLE)
  310. features |= SUPPORTED_Autoneg;
  311. if (val & BMSR_100FULL)
  312. features |= SUPPORTED_100baseT_Full;
  313. if (val & BMSR_100HALF)
  314. features |= SUPPORTED_100baseT_Half;
  315. if (val & BMSR_10FULL)
  316. features |= SUPPORTED_10baseT_Full;
  317. if (val & BMSR_10HALF)
  318. features |= SUPPORTED_10baseT_Half;
  319. if (val & BMSR_ESTATEN) {
  320. val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
  321. if (val < 0)
  322. return val;
  323. if (val & ESTATUS_1000_TFULL)
  324. features |= SUPPORTED_1000baseT_Full;
  325. if (val & ESTATUS_1000_THALF)
  326. features |= SUPPORTED_1000baseT_Half;
  327. if (val & ESTATUS_1000_XFULL)
  328. features |= SUPPORTED_1000baseX_Full;
  329. if (val & ESTATUS_1000_XHALF)
  330. features |= SUPPORTED_1000baseX_Half;
  331. }
  332. phydev->supported = features;
  333. phydev->advertising = features;
  334. genphy_config_aneg(phydev);
  335. return 0;
  336. }
  337. int genphy_startup(struct phy_device *phydev)
  338. {
  339. genphy_update_link(phydev);
  340. genphy_parse_link(phydev);
  341. return 0;
  342. }
  343. int genphy_shutdown(struct phy_device *phydev)
  344. {
  345. return 0;
  346. }
  347. static struct phy_driver genphy_driver = {
  348. .uid = 0xffffffff,
  349. .mask = 0xffffffff,
  350. .name = "Generic PHY",
  351. .features = 0,
  352. .config = genphy_config,
  353. .startup = genphy_startup,
  354. .shutdown = genphy_shutdown,
  355. };
  356. static LIST_HEAD(phy_drivers);
  357. int phy_init(void)
  358. {
  359. #ifdef CONFIG_PHY_ATHEROS
  360. phy_atheros_init();
  361. #endif
  362. #ifdef CONFIG_PHY_BROADCOM
  363. phy_broadcom_init();
  364. #endif
  365. #ifdef CONFIG_PHY_DAVICOM
  366. phy_davicom_init();
  367. #endif
  368. #ifdef CONFIG_PHY_ET1011C
  369. phy_et1011c_init();
  370. #endif
  371. #ifdef CONFIG_PHY_LXT
  372. phy_lxt_init();
  373. #endif
  374. #ifdef CONFIG_PHY_MARVELL
  375. phy_marvell_init();
  376. #endif
  377. #ifdef CONFIG_PHY_MICREL
  378. phy_micrel_init();
  379. #endif
  380. #ifdef CONFIG_PHY_NATSEMI
  381. phy_natsemi_init();
  382. #endif
  383. #ifdef CONFIG_PHY_REALTEK
  384. phy_realtek_init();
  385. #endif
  386. #ifdef CONFIG_PHY_SMSC
  387. phy_smsc_init();
  388. #endif
  389. #ifdef CONFIG_PHY_TERANETICS
  390. phy_teranetics_init();
  391. #endif
  392. #ifdef CONFIG_PHY_VITESSE
  393. phy_vitesse_init();
  394. #endif
  395. return 0;
  396. }
  397. int phy_register(struct phy_driver *drv)
  398. {
  399. INIT_LIST_HEAD(&drv->list);
  400. list_add_tail(&drv->list, &phy_drivers);
  401. return 0;
  402. }
  403. static int phy_probe(struct phy_device *phydev)
  404. {
  405. int err = 0;
  406. phydev->advertising = phydev->supported = phydev->drv->features;
  407. phydev->mmds = phydev->drv->mmds;
  408. if (phydev->drv->probe)
  409. err = phydev->drv->probe(phydev);
  410. return err;
  411. }
  412. static struct phy_driver *generic_for_interface(phy_interface_t interface)
  413. {
  414. #ifdef CONFIG_PHYLIB_10G
  415. if (is_10g_interface(interface))
  416. return &gen10g_driver;
  417. #endif
  418. return &genphy_driver;
  419. }
  420. static struct phy_driver *get_phy_driver(struct phy_device *phydev,
  421. phy_interface_t interface)
  422. {
  423. struct list_head *entry;
  424. int phy_id = phydev->phy_id;
  425. struct phy_driver *drv = NULL;
  426. list_for_each(entry, &phy_drivers) {
  427. drv = list_entry(entry, struct phy_driver, list);
  428. if ((drv->uid & drv->mask) == (phy_id & drv->mask))
  429. return drv;
  430. }
  431. /* If we made it here, there's no driver for this PHY */
  432. return generic_for_interface(interface);
  433. }
  434. static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
  435. int phy_id,
  436. phy_interface_t interface)
  437. {
  438. struct phy_device *dev;
  439. /* We allocate the device, and initialize the
  440. * default values */
  441. dev = malloc(sizeof(*dev));
  442. if (!dev) {
  443. printf("Failed to allocate PHY device for %s:%d\n",
  444. bus->name, addr);
  445. return NULL;
  446. }
  447. memset(dev, 0, sizeof(*dev));
  448. dev->duplex = -1;
  449. dev->link = 1;
  450. dev->interface = interface;
  451. dev->autoneg = AUTONEG_ENABLE;
  452. dev->addr = addr;
  453. dev->phy_id = phy_id;
  454. dev->bus = bus;
  455. dev->drv = get_phy_driver(dev, interface);
  456. phy_probe(dev);
  457. bus->phymap[addr] = dev;
  458. return dev;
  459. }
  460. /**
  461. * get_phy_id - reads the specified addr for its ID.
  462. * @bus: the target MII bus
  463. * @addr: PHY address on the MII bus
  464. * @phy_id: where to store the ID retrieved.
  465. *
  466. * Description: Reads the ID registers of the PHY at @addr on the
  467. * @bus, stores it in @phy_id and returns zero on success.
  468. */
  469. int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
  470. {
  471. int phy_reg;
  472. /* Grab the bits from PHYIR1, and put them
  473. * in the upper half */
  474. phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
  475. if (phy_reg < 0)
  476. return -EIO;
  477. *phy_id = (phy_reg & 0xffff) << 16;
  478. /* Grab the bits from PHYIR2, and put them in the lower half */
  479. phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
  480. if (phy_reg < 0)
  481. return -EIO;
  482. *phy_id |= (phy_reg & 0xffff);
  483. return 0;
  484. }
  485. static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
  486. unsigned phy_mask, int devad, phy_interface_t interface)
  487. {
  488. u32 phy_id = 0xffffffff;
  489. while (phy_mask) {
  490. int addr = ffs(phy_mask) - 1;
  491. int r = get_phy_id(bus, addr, devad, &phy_id);
  492. /* If the PHY ID is mostly f's, we didn't find anything */
  493. if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff)
  494. return phy_device_create(bus, addr, phy_id, interface);
  495. phy_mask &= ~(1 << addr);
  496. }
  497. return NULL;
  498. }
  499. static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
  500. unsigned phy_mask, phy_interface_t interface)
  501. {
  502. /* If we have one, return the existing device, with new interface */
  503. while (phy_mask) {
  504. int addr = ffs(phy_mask) - 1;
  505. if (bus->phymap[addr]) {
  506. bus->phymap[addr]->interface = interface;
  507. return bus->phymap[addr];
  508. }
  509. phy_mask &= ~(1 << addr);
  510. }
  511. return NULL;
  512. }
  513. static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
  514. unsigned phy_mask, phy_interface_t interface)
  515. {
  516. int i;
  517. struct phy_device *phydev;
  518. phydev = search_for_existing_phy(bus, phy_mask, interface);
  519. if (phydev)
  520. return phydev;
  521. /* Try Standard (ie Clause 22) access */
  522. /* Otherwise we have to try Clause 45 */
  523. for (i = 0; i < 5; i++) {
  524. phydev = create_phy_by_mask(bus, phy_mask,
  525. i ? i : MDIO_DEVAD_NONE, interface);
  526. if (IS_ERR(phydev))
  527. return NULL;
  528. if (phydev)
  529. return phydev;
  530. }
  531. printf("Phy not found\n");
  532. return phy_device_create(bus, ffs(phy_mask) - 1, 0xffffffff, interface);
  533. }
  534. /**
  535. * get_phy_device - reads the specified PHY device and returns its @phy_device struct
  536. * @bus: the target MII bus
  537. * @addr: PHY address on the MII bus
  538. *
  539. * Description: Reads the ID registers of the PHY at @addr on the
  540. * @bus, then allocates and returns the phy_device to represent it.
  541. */
  542. static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
  543. phy_interface_t interface)
  544. {
  545. return get_phy_device_by_mask(bus, 1 << addr, interface);
  546. }
  547. int phy_reset(struct phy_device *phydev)
  548. {
  549. int reg;
  550. int timeout = 500;
  551. int devad = MDIO_DEVAD_NONE;
  552. #ifdef CONFIG_PHYLIB_10G
  553. /* If it's 10G, we need to issue reset through one of the MMDs */
  554. if (is_10g_interface(phydev->interface)) {
  555. if (!phydev->mmds)
  556. gen10g_discover_mmds(phydev);
  557. devad = ffs(phydev->mmds) - 1;
  558. }
  559. #endif
  560. reg = phy_read(phydev, devad, MII_BMCR);
  561. if (reg < 0) {
  562. debug("PHY status read failed\n");
  563. return -1;
  564. }
  565. reg |= BMCR_RESET;
  566. if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
  567. debug("PHY reset failed\n");
  568. return -1;
  569. }
  570. #ifdef CONFIG_PHY_RESET_DELAY
  571. udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  572. #endif
  573. /*
  574. * Poll the control register for the reset bit to go to 0 (it is
  575. * auto-clearing). This should happen within 0.5 seconds per the
  576. * IEEE spec.
  577. */
  578. while ((reg & BMCR_RESET) && timeout--) {
  579. reg = phy_read(phydev, devad, MII_BMCR);
  580. if (reg < 0) {
  581. debug("PHY status read failed\n");
  582. return -1;
  583. }
  584. udelay(1000);
  585. }
  586. if (reg & BMCR_RESET) {
  587. puts("PHY reset timed out\n");
  588. return -1;
  589. }
  590. return 0;
  591. }
  592. int miiphy_reset(const char *devname, unsigned char addr)
  593. {
  594. struct mii_dev *bus = miiphy_get_dev_by_name(devname);
  595. struct phy_device *phydev;
  596. /*
  597. * miiphy_reset was only used on standard PHYs, so we'll fake it here.
  598. * If later code tries to connect with the right interface, this will
  599. * be corrected by get_phy_device in phy_connect()
  600. */
  601. phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
  602. return phy_reset(phydev);
  603. }
  604. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  605. phy_interface_t interface)
  606. {
  607. /* Reset the bus */
  608. if (bus->reset)
  609. bus->reset(bus);
  610. /* Wait 15ms to make sure the PHY has come out of hard reset */
  611. udelay(15000);
  612. return get_phy_device_by_mask(bus, phy_mask, interface);
  613. }
  614. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
  615. {
  616. /* Soft Reset the PHY */
  617. phy_reset(phydev);
  618. if (phydev->dev) {
  619. printf("%s:%d is connected to %s. Reconnecting to %s\n",
  620. phydev->bus->name, phydev->addr,
  621. phydev->dev->name, dev->name);
  622. }
  623. phydev->dev = dev;
  624. debug("%s connected to %s\n", dev->name, phydev->drv->name);
  625. }
  626. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  627. struct eth_device *dev, phy_interface_t interface)
  628. {
  629. struct phy_device *phydev;
  630. phydev = phy_find_by_mask(bus, 1 << addr, interface);
  631. if (phydev)
  632. phy_connect_dev(phydev, dev);
  633. else
  634. printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
  635. return phydev;
  636. }
  637. /*
  638. * Start the PHY. Returns 0 on success, or a negative error code.
  639. */
  640. int phy_startup(struct phy_device *phydev)
  641. {
  642. if (phydev->drv->startup)
  643. return phydev->drv->startup(phydev);
  644. return 0;
  645. }
  646. static int __board_phy_config(struct phy_device *phydev)
  647. {
  648. if (phydev->drv->config)
  649. return phydev->drv->config(phydev);
  650. return 0;
  651. }
  652. int board_phy_config(struct phy_device *phydev)
  653. __attribute__((weak, alias("__board_phy_config")));
  654. int phy_config(struct phy_device *phydev)
  655. {
  656. /* Invoke an optional board-specific helper */
  657. board_phy_config(phydev);
  658. return 0;
  659. }
  660. int phy_shutdown(struct phy_device *phydev)
  661. {
  662. if (phydev->drv->shutdown)
  663. phydev->drv->shutdown(phydev);
  664. return 0;
  665. }