Kconfig 2.5 KB

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  1. #
  2. # Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
  3. #
  4. # SPDX-License-Identifier: GPL-2.0+
  5. #
  6. config INTEL_QUARK
  7. bool
  8. select HAVE_RMU
  9. select ARCH_MISC_INIT
  10. if INTEL_QUARK
  11. config HAVE_RMU
  12. bool "Add a Remote Management Unit (RMU) binary"
  13. help
  14. Select this option to add a Remote Management Unit (RMU) binary
  15. to the resulting U-Boot image. It is a data block (up to 64K) of
  16. machine-specific code which must be put in the flash for the RMU
  17. within the Quark SoC processor to access when powered up before
  18. system BIOS is executed.
  19. config RMU_FILE
  20. string "Remote Management Unit (RMU) binary filename"
  21. depends on HAVE_RMU
  22. default "rmu.bin"
  23. help
  24. The filename of the file to use as Remote Management Unit (RMU)
  25. binary in the board directory.
  26. config RMU_ADDR
  27. hex "Remote Management Unit (RMU) binary location"
  28. depends on HAVE_RMU
  29. default 0xfff00000
  30. help
  31. The location of the RMU binary is determined by a strap. It must be
  32. put in flash at a location matching the strap-determined base address.
  33. The default base address of 0xfff00000 indicates that the binary must
  34. be located at offset 0 from the beginning of a 1MB flash device.
  35. config HAVE_CMC
  36. bool
  37. default HAVE_RMU
  38. config CMC_FILE
  39. string
  40. depends on HAVE_CMC
  41. default RMU_FILE
  42. config CMC_ADDR
  43. hex
  44. depends on HAVE_CMC
  45. default RMU_ADDR
  46. config ESRAM_BASE
  47. hex
  48. default 0x80000000
  49. help
  50. Embedded SRAM (eSRAM) memory-mapped base address.
  51. config PCIE_ECAM_BASE
  52. hex
  53. default 0xe0000000
  54. config RCBA_BASE
  55. hex
  56. default 0xfed1c000
  57. help
  58. Root Complex register block memory-mapped base address.
  59. config ACPI_PM1_BASE
  60. hex
  61. default 0x1000
  62. help
  63. ACPI Power Managment 1 (PM1) i/o-mapped base address.
  64. This device is defined in ACPI specification, with 16 bytes in size.
  65. config ACPI_PBLK_BASE
  66. hex
  67. default 0x1010
  68. help
  69. ACPI Processor Block (PBLK) i/o-mapped base address.
  70. This device is defined in ACPI specification, with 16 bytes in size.
  71. config SPI_DMA_BASE
  72. hex
  73. default 0x1020
  74. help
  75. SPI DMA i/o-mapped base address.
  76. config GPIO_BASE
  77. hex
  78. default 0x1080
  79. help
  80. GPIO i/o-mapped base address.
  81. config ACPI_GPE0_BASE
  82. hex
  83. default 0x1100
  84. help
  85. ACPI General Purpose Event 0 (GPE0) i/o-mapped base address.
  86. This device is defined in ACPI specification, with 64 bytes in size.
  87. config WDT_BASE
  88. hex
  89. default 0x1140
  90. help
  91. Watchdog timer i/o-mapped base address.
  92. config SYS_CAR_ADDR
  93. hex
  94. default ESRAM_BASE
  95. config SYS_CAR_SIZE
  96. hex
  97. default 0x8000
  98. help
  99. Space in bytes in eSRAM used as Cache-As-ARM (CAR).
  100. Note this size must not exceed eSRAM's total size.
  101. endif