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  1. /*
  2. * armboot - Startup Code for ARM926EJS CPU-core
  3. *
  4. * Copyright (c) 2003 Texas Instruments
  5. *
  6. * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
  7. *
  8. * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
  9. * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
  10. * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
  11. * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
  12. * Copyright (c) 2003 Kshitij <kshitij@ti.com>
  13. *
  14. * See file CREDITS for list of people who contributed to this
  15. * project.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation; either version 2 of
  20. * the License, or (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30. * MA 02111-1307 USA
  31. */
  32. #include <asm-offsets.h>
  33. #include <config.h>
  34. #include <version.h>
  35. /*
  36. *************************************************************************
  37. *
  38. * Jump vector table
  39. *
  40. *************************************************************************
  41. */
  42. .globl _start
  43. _start:
  44. b reset
  45. ldr pc, _undefined_instruction
  46. ldr pc, _software_interrupt
  47. ldr pc, _prefetch_abort
  48. ldr pc, _data_abort
  49. ldr pc, _not_used
  50. ldr pc, _irq
  51. ldr pc, _fiq
  52. _undefined_instruction:
  53. .word undefined_instruction
  54. _software_interrupt:
  55. .word software_interrupt
  56. _prefetch_abort:
  57. .word prefetch_abort
  58. _data_abort:
  59. .word data_abort
  60. _not_used:
  61. .word not_used
  62. _irq:
  63. .word irq
  64. _fiq:
  65. .word fiq
  66. .balignl 16,0xdeadbeef
  67. /*
  68. *************************************************************************
  69. *
  70. * Startup Code (reset vector)
  71. *
  72. * do important init only if we don't start from memory!
  73. * setup memory and board specific bits prior to relocation.
  74. * relocate armboot to ram
  75. * setup stack
  76. *
  77. *************************************************************************
  78. */
  79. .globl _TEXT_BASE
  80. _TEXT_BASE:
  81. .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
  82. /*
  83. * These are defined in the board-specific linker script.
  84. * Subtracting _start from them lets the linker put their
  85. * relative position in the executable instead of leaving
  86. * them null.
  87. */
  88. .globl _bss_start_ofs
  89. _bss_start_ofs:
  90. .word __bss_start - _start
  91. .globl _bss_end_ofs
  92. _bss_end_ofs:
  93. .word _end - _start
  94. #ifdef CONFIG_USE_IRQ
  95. /* IRQ stack memory (calculated at run-time) */
  96. .globl IRQ_STACK_START
  97. IRQ_STACK_START:
  98. .word 0x0badc0de
  99. /* IRQ stack memory (calculated at run-time) */
  100. .globl FIQ_STACK_START
  101. FIQ_STACK_START:
  102. .word 0x0badc0de
  103. #endif
  104. /* IRQ stack memory (calculated at run-time) + 8 bytes */
  105. .globl IRQ_STACK_START_IN
  106. IRQ_STACK_START_IN:
  107. .word 0x0badc0de
  108. /*
  109. * the actual reset code
  110. */
  111. reset:
  112. /*
  113. * set the cpu to SVC32 mode
  114. */
  115. mrs r0,cpsr
  116. bic r0,r0,#0x1f
  117. orr r0,r0,#0xd3
  118. msr cpsr,r0
  119. /*
  120. * we do sys-critical inits only at reboot,
  121. * not when booting from ram!
  122. */
  123. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  124. bl cpu_init_crit
  125. #endif
  126. /* Set stackpointer in internal RAM to call board_init_f */
  127. call_board_init_f:
  128. ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
  129. ldr r0,=0x00000000
  130. bl board_init_f
  131. /*------------------------------------------------------------------------------*/
  132. /*
  133. * void relocate_code (addr_sp, gd, addr_moni)
  134. *
  135. * This "function" does not return, instead it continues in RAM
  136. * after relocating the monitor code.
  137. *
  138. */
  139. .globl relocate_code
  140. relocate_code:
  141. mov r4, r0 /* save addr_sp */
  142. mov r5, r1 /* save addr of gd */
  143. mov r6, r2 /* save addr of destination */
  144. mov r7, r2 /* save addr of destination */
  145. /* Set up the stack */
  146. stack_setup:
  147. mov sp, r4
  148. adr r0, _start
  149. ldr r2, _TEXT_BASE
  150. ldr r3, _bss_start_ofs
  151. add r2, r0, r3 /* r2 <- source end address */
  152. cmp r0, r6
  153. beq clear_bss
  154. copy_loop:
  155. ldmia r0!, {r9-r10} /* copy from source address [r0] */
  156. stmia r6!, {r9-r10} /* copy to target address [r1] */
  157. cmp r0, r2 /* until source end address [r2] */
  158. blo copy_loop
  159. #ifndef CONFIG_PRELOADER
  160. /*
  161. * fix .rel.dyn relocations
  162. */
  163. ldr r0, _TEXT_BASE /* r0 <- Text base */
  164. sub r9, r7, r0 /* r9 <- relocation offset */
  165. ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
  166. add r10, r10, r0 /* r10 <- sym table in FLASH */
  167. ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
  168. add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
  169. ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
  170. add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
  171. fixloop:
  172. ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
  173. add r0, r0, r9 /* r0 <- location to fix up in RAM */
  174. ldr r1, [r2, #4]
  175. and r8, r1, #0xff
  176. cmp r8, #23 /* relative fixup? */
  177. beq fixrel
  178. cmp r8, #2 /* absolute fixup? */
  179. beq fixabs
  180. /* ignore unknown type of fixup */
  181. b fixnext
  182. fixabs:
  183. /* absolute fix: set location to (offset) symbol value */
  184. mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
  185. add r1, r10, r1 /* r1 <- address of symbol in table */
  186. ldr r1, [r1, #4] /* r1 <- symbol value */
  187. add r1, r9 /* r1 <- relocated sym addr */
  188. b fixnext
  189. fixrel:
  190. /* relative fix: increase location by offset */
  191. ldr r1, [r0]
  192. add r1, r1, r9
  193. fixnext:
  194. str r1, [r0]
  195. add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
  196. cmp r2, r3
  197. blo fixloop
  198. #endif
  199. clear_bss:
  200. #ifndef CONFIG_PRELOADER
  201. ldr r0, _bss_start_ofs
  202. ldr r1, _bss_end_ofs
  203. ldr r3, _TEXT_BASE /* Text base */
  204. mov r4, r7 /* reloc addr */
  205. add r0, r0, r4
  206. add r1, r1, r4
  207. mov r2, #0x00000000 /* clear */
  208. clbss_l:str r2, [r0] /* clear loop... */
  209. add r0, r0, #4
  210. cmp r0, r1
  211. bne clbss_l
  212. bl coloured_LED_init
  213. bl red_LED_on
  214. #endif
  215. /*
  216. * We are done. Do not return, instead branch to second part of board
  217. * initialization, now running from RAM.
  218. */
  219. #ifdef CONFIG_NAND_SPL
  220. ldr r0, _nand_boot_ofs
  221. mov pc, r0
  222. _nand_boot_ofs:
  223. .word nand_boot
  224. #else
  225. ldr r0, _board_init_r_ofs
  226. adr r1, _start
  227. add lr, r0, r1
  228. add lr, lr, r9
  229. /* setup parameters for board_init_r */
  230. mov r0, r5 /* gd_t */
  231. mov r1, r7 /* dest_addr */
  232. /* jump to it ... */
  233. mov pc, lr
  234. _board_init_r_ofs:
  235. .word board_init_r - _start
  236. #endif
  237. _rel_dyn_start_ofs:
  238. .word __rel_dyn_start - _start
  239. _rel_dyn_end_ofs:
  240. .word __rel_dyn_end - _start
  241. _dynsym_start_ofs:
  242. .word __dynsym_start - _start
  243. /*
  244. *************************************************************************
  245. *
  246. * CPU_init_critical registers
  247. *
  248. * setup important registers
  249. * setup memory timing
  250. *
  251. *************************************************************************
  252. */
  253. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  254. cpu_init_crit:
  255. /* arm_int_generic assumes the ARM boot monitor, or user software,
  256. * has initialized the platform
  257. */
  258. mov pc, lr /* back to my caller */
  259. #endif
  260. /*
  261. *************************************************************************
  262. *
  263. * Interrupt handling
  264. *
  265. *************************************************************************
  266. */
  267. @
  268. @ IRQ stack frame.
  269. @
  270. #define S_FRAME_SIZE 72
  271. #define S_OLD_R0 68
  272. #define S_PSR 64
  273. #define S_PC 60
  274. #define S_LR 56
  275. #define S_SP 52
  276. #define S_IP 48
  277. #define S_FP 44
  278. #define S_R10 40
  279. #define S_R9 36
  280. #define S_R8 32
  281. #define S_R7 28
  282. #define S_R6 24
  283. #define S_R5 20
  284. #define S_R4 16
  285. #define S_R3 12
  286. #define S_R2 8
  287. #define S_R1 4
  288. #define S_R0 0
  289. #define MODE_SVC 0x13
  290. #define I_BIT 0x80
  291. /*
  292. * use bad_save_user_regs for abort/prefetch/undef/swi ...
  293. * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
  294. */
  295. .macro bad_save_user_regs
  296. @ carve out a frame on current user stack
  297. sub sp, sp, #S_FRAME_SIZE
  298. stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
  299. ldr r2, IRQ_STACK_START_IN
  300. @ get values for "aborted" pc and cpsr (into parm regs)
  301. ldmia r2, {r2 - r3}
  302. add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
  303. add r5, sp, #S_SP
  304. mov r1, lr
  305. stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
  306. mov r0, sp @ save current stack into r0 (param register)
  307. .endm
  308. .macro irq_save_user_regs
  309. sub sp, sp, #S_FRAME_SIZE
  310. stmia sp, {r0 - r12} @ Calling r0-r12
  311. @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
  312. add r8, sp, #S_PC
  313. stmdb r8, {sp, lr}^ @ Calling SP, LR
  314. str lr, [r8, #0] @ Save calling PC
  315. mrs r6, spsr
  316. str r6, [r8, #4] @ Save CPSR
  317. str r0, [r8, #8] @ Save OLD_R0
  318. mov r0, sp
  319. .endm
  320. .macro irq_restore_user_regs
  321. ldmia sp, {r0 - lr}^ @ Calling r0 - lr
  322. mov r0, r0
  323. ldr lr, [sp, #S_PC] @ Get PC
  324. add sp, sp, #S_FRAME_SIZE
  325. subs pc, lr, #4 @ return & move spsr_svc into cpsr
  326. .endm
  327. .macro get_bad_stack
  328. ldr r13, IRQ_STACK_START_IN @ setup our mode stack
  329. str lr, [r13] @ save caller lr in position 0 of saved stack
  330. mrs lr, spsr @ get the spsr
  331. str lr, [r13, #4] @ save spsr in position 1 of saved stack
  332. mov r13, #MODE_SVC @ prepare SVC-Mode
  333. @ msr spsr_c, r13
  334. msr spsr, r13 @ switch modes, make sure moves will execute
  335. mov lr, pc @ capture return pc
  336. movs pc, lr @ jump to next instruction & switch modes.
  337. .endm
  338. .macro get_irq_stack @ setup IRQ stack
  339. ldr sp, IRQ_STACK_START
  340. .endm
  341. .macro get_fiq_stack @ setup FIQ stack
  342. ldr sp, FIQ_STACK_START
  343. .endm
  344. /*
  345. * exception handlers
  346. */
  347. .align 5
  348. .globl undefined_instruction
  349. undefined_instruction:
  350. get_bad_stack
  351. bad_save_user_regs
  352. bl do_undefined_instruction
  353. .align 5
  354. .globl software_interrupt
  355. software_interrupt:
  356. get_bad_stack
  357. bad_save_user_regs
  358. bl do_software_interrupt
  359. .align 5
  360. .globl prefetch_abort
  361. prefetch_abort:
  362. get_bad_stack
  363. bad_save_user_regs
  364. bl do_prefetch_abort
  365. .align 5
  366. .globl data_abort
  367. data_abort:
  368. get_bad_stack
  369. bad_save_user_regs
  370. bl do_data_abort
  371. .align 5
  372. .globl not_used
  373. not_used:
  374. get_bad_stack
  375. bad_save_user_regs
  376. bl do_not_used
  377. #ifdef CONFIG_USE_IRQ
  378. .align 5
  379. .globl irq
  380. irq:
  381. get_irq_stack
  382. irq_save_user_regs
  383. bl do_irq
  384. irq_restore_user_regs
  385. .align 5
  386. .globl fiq
  387. fiq:
  388. get_fiq_stack
  389. /* someone ought to write a more effiction fiq_save_user_regs */
  390. irq_save_user_regs
  391. bl do_fiq
  392. irq_restore_user_regs
  393. #else
  394. .align 5
  395. .globl irq
  396. irq:
  397. get_bad_stack
  398. bad_save_user_regs
  399. bl do_irq
  400. .align 5
  401. .globl fiq
  402. fiq:
  403. get_bad_stack
  404. bad_save_user_regs
  405. bl do_fiq
  406. #endif