pirq_routing.h 4.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
  4. *
  5. * Ported from coreboot src/arch/x86/include/arch/pirq_routing.h
  6. */
  7. #ifndef _PIRQ_ROUTING_H_
  8. #define _PIRQ_ROUTING_H_
  9. /*
  10. * This is the maximum number on interrupt entries that a PCI device may have.
  11. * This is NOT the number of slots or devices in the system
  12. * This is NOT the number of entries in the PIRQ table
  13. *
  14. * This tells us that in the PIRQ table, we are going to have 4 link-bitmap
  15. * entries per PCI device which is fixed at 4: INTA, INTB, INTC, and INTD.
  16. *
  17. * CAUTION: If you change this, PIRQ routing will not work correctly.
  18. */
  19. #define MAX_INTX_ENTRIES 4
  20. #define PIRQ_SIGNATURE \
  21. (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
  22. #define PIRQ_VERSION 0x0100
  23. struct __packed irq_info {
  24. u8 bus; /* Bus number */
  25. u8 devfn; /* Device and function number */
  26. struct __packed {
  27. u8 link; /* IRQ line ID, 0=not routed */
  28. u16 bitmap; /* Available IRQs */
  29. } irq[MAX_INTX_ENTRIES];
  30. u8 slot; /* Slot number, 0=onboard */
  31. u8 rfu;
  32. };
  33. struct __packed irq_routing_table {
  34. u32 signature; /* PIRQ_SIGNATURE */
  35. u16 version; /* PIRQ_VERSION */
  36. u16 size; /* Table size in bytes */
  37. u8 rtr_bus; /* busno of the interrupt router */
  38. u8 rtr_devfn; /* devfn of the interrupt router */
  39. u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
  40. u16 rtr_vendor; /* Vendor ID of the interrupt router */
  41. u16 rtr_device; /* Device ID of the interrupt router */
  42. u32 miniport_data;
  43. u8 rfu[11];
  44. u8 checksum; /* Modulo 256 checksum must give zero */
  45. struct irq_info slots[CONFIG_IRQ_SLOT_COUNT];
  46. };
  47. /**
  48. * get_irq_slot_count() - Get the number of entries in the irq_info table
  49. *
  50. * This calculates the number of entries for the irq_info table.
  51. *
  52. * @rt: pointer to the base address of the struct irq_info
  53. * @return: number of entries
  54. */
  55. static inline int get_irq_slot_count(struct irq_routing_table *rt)
  56. {
  57. return (rt->size - 32) / sizeof(struct irq_info);
  58. }
  59. /**
  60. * pirq_check_irq_routed() - Check whether an IRQ is routed to 8259 PIC
  61. *
  62. * This function checks whether an IRQ is routed to 8259 PIC for a given link.
  63. *
  64. * Note: this function should be provided by the platform codes, as the
  65. * implementation of interrupt router may be different.
  66. *
  67. * @dev: irq router's udevice
  68. * @link: link number which represents a PIRQ
  69. * @irq: the 8259 IRQ number
  70. * @return: true if the irq is already routed to 8259 for a given link,
  71. * false elsewise
  72. */
  73. bool pirq_check_irq_routed(struct udevice *dev, int link, u8 irq);
  74. /**
  75. * pirq_translate_link() - Translate a link value
  76. *
  77. * This function translates a platform-specific link value to a link number.
  78. * On Intel platforms, the link value is normally a offset into the PCI
  79. * configuration space into the legacy bridge.
  80. *
  81. * Note: this function should be provided by the platform codes, as the
  82. * implementation of interrupt router may be different.
  83. *
  84. * @dev: irq router's udevice
  85. * @link: platform-specific link value
  86. * @return: link number which represents a PIRQ
  87. */
  88. int pirq_translate_link(struct udevice *dev, int link);
  89. /**
  90. * pirq_assign_irq() - Assign an IRQ to a PIRQ link
  91. *
  92. * This function assigns the IRQ to a PIRQ link so that the PIRQ is routed to
  93. * the 8259 PIC.
  94. *
  95. * Note: this function should be provided by the platform codes, as the
  96. * implementation of interrupt router may be different.
  97. *
  98. * @dev: irq router's udevice
  99. * @link: link number which represents a PIRQ
  100. * @irq: IRQ to which the PIRQ is routed
  101. */
  102. void pirq_assign_irq(struct udevice *dev, int link, u8 irq);
  103. /**
  104. * pirq_route_irqs() - Route PIRQs to 8259 PIC
  105. *
  106. * This function configures all PCI devices' interrupt pins and maps them to
  107. * PIRQs and finally 8259 PIC. The routed irq number is written to interrupt
  108. * line register in the configuration space of the PCI device for OS to use.
  109. * The configuration source is taken from a struct irq_info table, the format
  110. * of which is defined in PIRQ routing table spec and PCI BIOS spec.
  111. *
  112. * @dev: irq router's udevice
  113. * @irq: pointer to the base address of the struct irq_info
  114. * @num: number of entries in the struct irq_info
  115. */
  116. void pirq_route_irqs(struct udevice *dev, struct irq_info *irq, int num);
  117. /**
  118. * copy_pirq_routing_table() - Copy a PIRQ routing table
  119. *
  120. * This helper function copies the given PIRQ routing table to a given address.
  121. * Before copying, it does several sanity tests against the PIRQ routing table.
  122. * It also fixes up the table checksum and align the given address to a 16 byte
  123. * boundary to meet the PIRQ routing table spec requirements.
  124. *
  125. * @addr: address to store the copied PIRQ routing table
  126. * @rt: pointer to the PIRQ routing table to copy from
  127. * @return: end address of the copied PIRQ routing table
  128. */
  129. u32 copy_pirq_routing_table(u32 addr, struct irq_routing_table *rt);
  130. #endif /* _PIRQ_ROUTING_H_ */